From b1c4d89ee395e188a7288bdc8ec50e2c3acbed0d Mon Sep 17 00:00:00 2001 From: Dingxian Wen Date: Fri, 9 Dec 2022 16:37:01 +0800 Subject: [PATCH] firmware: rockchip_sip: export some interfaces for hdmirx module Signed-off-by: Dingxian Wen Change-Id: I313e5532edad7887aeb3db91ceea4929249570c1 --- drivers/firmware/rockchip_sip.c | 8 ++++++++ include/linux/rockchip/rockchip_sip.h | 2 ++ 2 files changed, 10 insertions(+) diff --git a/drivers/firmware/rockchip_sip.c b/drivers/firmware/rockchip_sip.c index 760f4c3dbeb2..fbc810011b49 100644 --- a/drivers/firmware/rockchip_sip.c +++ b/drivers/firmware/rockchip_sip.c @@ -303,6 +303,7 @@ void __iomem *sip_hdcp_request_share_memory(int id) return base + id * 1024; } +EXPORT_SYMBOL_GPL(sip_hdcp_request_share_memory); struct arm_smccc_res sip_hdcp_config(u32 arg0, u32 arg1, u32 arg2) { @@ -311,6 +312,7 @@ struct arm_smccc_res sip_hdcp_config(u32 arg0, u32 arg1, u32 arg2) res = __invoke_sip_fn_smc(SIP_HDCP_CONFIG, arg0, arg1, arg2); return res; } +EXPORT_SYMBOL_GPL(sip_hdcp_config); /************************** fiq debugger **************************************/ /* @@ -487,6 +489,12 @@ static ulong cpu_logical_map_mpidr(u32 cpu) #endif } +ulong sip_cpu_logical_map_mpidr(u32 cpu) +{ + return cpu_logical_map_mpidr(cpu); +} +EXPORT_SYMBOL_GPL(sip_cpu_logical_map_mpidr); + int sip_fiq_debugger_switch_cpu(u32 cpu) { struct arm_smccc_res res; diff --git a/include/linux/rockchip/rockchip_sip.h b/include/linux/rockchip/rockchip_sip.h index 65ca8e0ec2cf..57b6528e9089 100644 --- a/include/linux/rockchip/rockchip_sip.h +++ b/include/linux/rockchip/rockchip_sip.h @@ -223,6 +223,7 @@ struct arm_smccc_res sip_smc_get_amp_info(u32 sub_func_id, u32 arg1); void __iomem *sip_hdcp_request_share_memory(int id); struct arm_smccc_res sip_hdcp_config(u32 arg0, u32 arg1, u32 arg2); +ulong sip_cpu_logical_map_mpidr(u32 cpu); /***************************fiq debugger **************************************/ void sip_fiq_debugger_enable_fiq(bool enable, uint32_t tgt_cpu); void sip_fiq_debugger_enable_debug(bool enable); @@ -334,6 +335,7 @@ static inline struct arm_smccc_res sip_smc_get_amp_info(u32 sub_func_id, return tmp; } +static inline ulong sip_cpu_logical_map_mpidr(u32 cpu) { return 0; } /***************************fiq debugger **************************************/ static inline void sip_fiq_debugger_enable_fiq (bool enable, uint32_t tgt_cpu) { return; }