diff --git a/arch/arm/mach-rk2928/devices.c b/arch/arm/mach-rk2928/devices.c index ba673a7ac64f..e4cc759ecd00 100644 --- a/arch/arm/mach-rk2928/devices.c +++ b/arch/arm/mach-rk2928/devices.c @@ -567,7 +567,7 @@ static struct platform_device device_nand = { .num_resources = ARRAY_SIZE(resources_nand), }; #endif -#ifdef CONFIG_HDMI_RK2928 +#if defined(CONFIG_HDMI_RK2928) || defined(CONFIG_HDMI_RK616) static struct resource resource_hdmi[] = { [0] = { .start = RK2928_HDMI_PHYS, @@ -582,12 +582,17 @@ static struct resource resource_hdmi[] = { }; static struct platform_device device_hdmi = { +#ifdef CONFIG_HDMI_RK616 + .name = "rk616-hdmi", +#else .name = "rk2928-hdmi", +#endif .id = -1, .num_resources = ARRAY_SIZE(resource_hdmi), .resource = resource_hdmi, }; #endif + #ifdef CONFIG_RGA_RK30 static struct resource resource_rga[] = { [0] = { @@ -797,7 +802,7 @@ static int __init rk2928_init_devices(void) rk_serial_debug_init(DEBUG_UART_BASE, IRQ_DEBUG_UART, IRQ_UART_SIGNAL, -1); #endif rk2928_init_i2s(); -#ifdef CONFIG_HDMI_RK2928 +#if defined(CONFIG_HDMI_RK2928) || defined(CONFIG_HDMI_RK616) platform_device_register(&device_hdmi); #endif platform_device_register(&device_arm_pmu); diff --git a/drivers/net/wireless/Kconfig b/drivers/net/wireless/Kconfig index 1a4e4a3dc0d2..a6891d5d8f14 100755 --- a/drivers/net/wireless/Kconfig +++ b/drivers/net/wireless/Kconfig @@ -166,17 +166,21 @@ choice endchoice choice - depends on RKWIFI && WLAN_80211 && RK903 + depends on RKWIFI && WLAN_80211 prompt "Select the wifi module crystal freq" default RKWIFI_26M config RKWIFI_37_4M bool "37_4M" - depends on RKWIFI && WLAN_80211 && RK903 + depends on RKWIFI && WLAN_80211 config RKWIFI_26M bool "26M" - depends on RKWIFI && WLAN_80211 && RK903 + depends on RKWIFI && WLAN_80211 + + config RKWIFI_24M + bool "24M" + depends on RKWIFI && WLAN_80211 endchoice diff --git a/drivers/net/wireless/rkwifi/rk_wifi_config.c b/drivers/net/wireless/rkwifi/rk_wifi_config.c index 82a0192c0676..1816905e01d4 100644 --- a/drivers/net/wireless/rkwifi/rk_wifi_config.c +++ b/drivers/net/wireless/rkwifi/rk_wifi_config.c @@ -58,8 +58,13 @@ int rkwifi_set_firmware(char *fw, char *nvram) #ifdef CONFIG_AP6210 sprintf(fw, "%s%s", ANDROID_FW_PATH, "fw_RK901.bin"); +#ifdef CONFIG_RKWIFI_26M sprintf(nvram, "%s%s", ANDROID_FW_PATH, "nvram_AP6210.txt"); #endif +#ifdef CONFIG_RKWIFI_24M + sprintf(nvram, "%s%s", ANDROID_FW_PATH, "nvram_AP6210_24M.txt"); +#endif +#endif #ifdef CONFIG_AP6476 sprintf(fw, "%s%s", ANDROID_FW_PATH, "fw_RK901.bin"); diff --git a/drivers/video/rockchip/hdmi/chips/Kconfig b/drivers/video/rockchip/hdmi/chips/Kconfig index 69064120c159..b8797ffdeab8 100755 --- a/drivers/video/rockchip/hdmi/chips/Kconfig +++ b/drivers/video/rockchip/hdmi/chips/Kconfig @@ -39,7 +39,8 @@ endif config HDMI_RK616 bool "RK616 HDMI support" - depends on MFD_RK616 + depends on MFD_RK616 || ARCH_RK3026 + default y help Support rk616 hdmi if you say y here diff --git a/drivers/video/rockchip/hdmi/chips/rk616/Kconfig b/drivers/video/rockchip/hdmi/chips/rk616/Kconfig index dff44615ab97..68cedb7eed0c 100755 --- a/drivers/video/rockchip/hdmi/chips/rk616/Kconfig +++ b/drivers/video/rockchip/hdmi/chips/rk616/Kconfig @@ -1,6 +1,6 @@ config HDCP_RK616 bool "RK616 HDCP support" - depends on HDMI_RK616 + depends on HDMI_RK616 || ARCH_RK3026 default n help HDCP Interface. This adds the High Definition Content Protection Interface. diff --git a/drivers/video/rockchip/hdmi/chips/rk616/rk616_hdmi.c b/drivers/video/rockchip/hdmi/chips/rk616/rk616_hdmi.c index a51139a1eb00..df3ca6876b9b 100755 --- a/drivers/video/rockchip/hdmi/chips/rk616/rk616_hdmi.c +++ b/drivers/video/rockchip/hdmi/chips/rk616/rk616_hdmi.c @@ -38,29 +38,19 @@ static int rk616_hdmi_reg_show(struct seq_file *s, void *v) { int i = 0; u32 val = 0; - struct mfd_rk616 *rk616 = s->private; - if(!rk616) - { - dev_err(rk616->dev,"no mfd rk616!\n"); - return 0; - } - seq_printf(s, "\n>>>rk616_ctl reg"); for (i = 0; i < 16; i++) { seq_printf(s, " %2x", i); } seq_printf(s, "\n-----------------------------------------------------------------"); - for(i=0;i<= (PHY_PRE_DIV_RATIO << 2);i+=4) - { - rk616->read_dev(rk616,RK616_HDMI_BASE + i,&val); - //seq_printf(s,"reg%02x>>0x%08x\n",(i>>2),val); - if((i>>2)%16==0) - seq_printf(s,"\n>>>rk616_ctl %2x:",i>>2); + for(i=0; i<= PHY_PRE_DIV_RATIO; i++) { + hdmi_readl(i, &val); + if(i%16==0) + seq_printf(s,"\n>>>rk616_ctl %2x:", i); seq_printf(s," %02x",val); } - seq_printf(s, "\n-----------------------------------------------------------------\n"); return 0; @@ -68,24 +58,19 @@ static int rk616_hdmi_reg_show(struct seq_file *s, void *v) static ssize_t rk616_hdmi_reg_write (struct file *file, const char __user *buf, size_t count, loff_t *ppos) { - struct mfd_rk616 *rk616 = file->f_path.dentry->d_inode->i_private; u32 reg; u32 val; char kbuf[25]; if (copy_from_user(kbuf, buf, count)) return -EFAULT; sscanf(kbuf, "%x%x", ®, &val); - if ((reg < 0) || (reg > 0xed)) - { - printk("it is no hdmi reg\n"); + if ((reg < 0) || (reg > 0xed)) { + dev_info(hdmi->dev, "it is no hdmi reg\n"); return count; } - printk("/**********rk616 reg config******/"); - printk("\n reg=%x val=%x\n", reg, val); - - //sscanf(kbuf, "%x%x", ®, &val); - dev_dbg(rk616->dev,"%s:reg:0x%04x val:0x%08x\n",__func__,reg, val); - rk616->write_dev(rk616, RK616_HDMI_BASE + (reg << 2), &val); + dev_info(hdmi->dev, "/**********rk616 reg config******/"); + dev_info(hdmi->dev, "\n reg=%x val=%x\n", reg, val); + hdmi_writel(reg, val); return count; } @@ -166,10 +151,8 @@ static void hdmi_early_resume(struct early_suspend *h) // hdmi_irq(); rk616_hdmi_work(); } - - if (rk616_hdmi->rk616_drv->pdata->hdmi_irq == INVALID_GPIO) + if (rk616_hdmi->rk616_drv && rk616_hdmi->rk616_drv->pdata->hdmi_irq == INVALID_GPIO) queue_delayed_work(hdmi->workqueue, &rk616_hdmi->rk616_delay_work, 100); - queue_delayed_work(hdmi->workqueue, &hdmi->delay_work, msecs_to_jiffies(10)); mutex_unlock(&hdmi->enable_mutex); return; @@ -187,13 +170,13 @@ static void rk616_delay_work_func(struct work_struct *work) rk616_hdmi_work(); } - if (rk616_hdmi->rk616_drv->pdata->hdmi_irq == INVALID_GPIO) { + if (rk616_hdmi->rk616_drv && rk616_hdmi->rk616_drv->pdata->hdmi_irq == INVALID_GPIO) { queue_delayed_work(hdmi->workqueue, &rk616_hdmi->rk616_delay_work, 100); } } } -static void rk616_irq_work_func(struct work_struct *work) +static void __maybe_unused rk616_irq_work_func(struct work_struct *work) { if((hdmi->suspend == 0) && (hdmi->enable == 1)) { rk616_hdmi_work(); @@ -202,29 +185,32 @@ static void rk616_irq_work_func(struct work_struct *work) enable_irq(hdmi->irq); } -#if 1 static irqreturn_t rk616_hdmi_irq(int irq, void *dev_id) { struct work_struct *rk616_irq_work_struct; + struct rk616_hdmi *rk616_hdmi; - rk616_irq_work_struct = dev_id; - disable_irq_nosync(hdmi->irq); - //printk(KERN_INFO "rk616_hdmi_irq irq triggered.\n"); - queue_work(hdmi->workqueue, rk616_irq_work_struct); + rk616_hdmi = container_of(hdmi, struct rk616_hdmi, g_hdmi); + if(rk616_hdmi->rk616_drv) { + rk616_irq_work_struct = dev_id; + disable_irq_nosync(hdmi->irq); + queue_work(hdmi->workqueue, rk616_irq_work_struct); + } else { + /* 3028a hdmi */ + if((hdmi->suspend == 0) && (hdmi->enable == 1)) { + printk(KERN_INFO "line = %d, rk616_hdmi_irq irq triggered.\n", __LINE__); + rk616_hdmi_work(); + } + } return IRQ_HANDLED; } -#endif + static int __devinit rk616_hdmi_probe (struct platform_device *pdev) { int ret; struct rk616_hdmi *rk616_hdmi; - - struct mfd_rk616 *rk616 = dev_get_drvdata(pdev->dev.parent); - if(!rk616) - { - dev_err(&pdev->dev,"null mfd device rk616!\n"); - return -ENODEV; - } + struct resource __maybe_unused *mem; + struct resource __maybe_unused *res; rk616_hdmi = devm_kzalloc(&pdev->dev, sizeof(*rk616_hdmi), GFP_KERNEL); if(!rk616_hdmi) @@ -233,7 +219,18 @@ static int __devinit rk616_hdmi_probe (struct platform_device *pdev) return -ENOMEM; } hdmi = &rk616_hdmi->g_hdmi; - rk616_hdmi->rk616_drv = rk616; + +#ifdef CONFIG_ARCH_RK3026 + rk616_hdmi->rk616_drv = NULL; +#else + rk616_hdmi->rk616_drv = dev_get_drvdata(pdev->dev.parent); + if(!(rk616_hdmi->rk616_drv)) + { + dev_err(&pdev->dev,"null mfd device rk616!\n"); + return -ENODEV; + } + +#endif hdmi->dev = &pdev->dev; platform_set_drvdata(pdev, hdmi); @@ -251,7 +248,6 @@ static int __devinit rk616_hdmi_probe (struct platform_device *pdev) hdmi->xscale = 100; hdmi->yscale = 100; - ret = rk616_hdmi_initial(); hdmi_sys_init(); @@ -265,7 +261,6 @@ static int __devinit rk616_hdmi_probe (struct platform_device *pdev) register_early_suspend(&hdmi->early_suspend); #endif - hdmi_register_display_sysfs(hdmi, NULL); #ifdef CONFIG_SWITCH hdmi->switch_hdmi.name="hdmi"; switch_dev_register(&(hdmi->switch_hdmi)); @@ -277,39 +272,102 @@ static int __devinit rk616_hdmi_probe (struct platform_device *pdev) INIT_DELAYED_WORK(&rk616_hdmi->rk616_delay_work, rk616_delay_work_func); /* get the IRQ */ - if(rk616->pdata->hdmi_irq != INVALID_GPIO) - { - INIT_WORK(&rk616_hdmi->rk616_irq_work_struct, rk616_irq_work_func); - ret = gpio_request(rk616->pdata->hdmi_irq,"rk616_hdmi_irq"); - if(ret < 0) - { - dev_err(hdmi->dev,"request gpio for rk616 hdmi irq fail\n"); - } - gpio_direction_input(rk616->pdata->hdmi_irq); - hdmi->irq = gpio_to_irq(rk616->pdata->hdmi_irq); - if(hdmi->irq <= 0) { - dev_err(hdmi->dev, "failed to get hdmi irq resource (%d).\n", hdmi->irq); - ret = -ENXIO; - goto err1; - } - - /* request the IRQ */ - ret = request_irq(hdmi->irq, rk616_hdmi_irq, IRQF_TRIGGER_LOW, dev_name(&pdev->dev), &rk616_hdmi->rk616_irq_work_struct); - if (ret) - { - dev_err(hdmi->dev, "hdmi request_irq failed (%d).\n", ret); - goto err1; - } - } else { - - /* use roll polling method */ - hdmi->irq = 0; + // if(rk616->pdata->hdmi_irq != INVALID_GPIO) + +#ifdef CONFIG_ARCH_RK3026 + hdmi->hclk = clk_get(NULL,"pclk_hdmi"); + if(IS_ERR(hdmi->hclk)) { + dev_err(hdmi->dev, "Unable to get hdmi hclk\n"); + ret = -ENXIO; + goto err0; } + clk_enable(hdmi->hclk); + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + dev_err(hdmi->dev, "Unable to get register resource\n"); + ret = -ENXIO; + goto err0; + } + hdmi->regbase_phy = res->start; + hdmi->regsize_phy = (res->end - res->start) + 1; + mem = request_mem_region(res->start, (res->end - res->start) + 1, pdev->name); + if (!mem) { + dev_err(hdmi->dev, "failed to request mem region for hdmi\n"); + ret = -ENOENT; + goto err0; + } + + printk("res->start = 0x%x\n, xhc-------res->end = 0x%x\n", res->start, res->end); + hdmi->regbase = (int)ioremap(res->start, (res->end - res->start) + 1); + if (!hdmi->regbase) { + dev_err(hdmi->dev, "cannot ioremap registers\n"); + ret = -ENXIO; + goto err1; + } + + // rk30_mux_api_set(GPIO0A7_I2C3_SDA_HDMI_DDCSDA_NAME, GPIO0A_HDMI_DDCSDA); + // rk30_mux_api_set(GPIO0A6_I2C3_SCL_HDMI_DDCSCL_NAME, GPIO0A_HDMI_DDCSCL); + // rk30_mux_api_set(GPIO0B7_HDMI_HOTPLUGIN_NAME, GPIO0B_HDMI_HOTPLUGIN); + iomux_set(HDMI_DDCSDA); + iomux_set(HDMI_DDCSCL); + iomux_set(HDMI_HOTPLUGIN); + + ret = rk616_hdmi_initial(); + /* get the IRQ */ + hdmi->irq = platform_get_irq(pdev, 0); + if(hdmi->irq <= 0) { + dev_err(hdmi->dev, "failed to get hdmi irq resource (%d).\n", hdmi->irq); + hdmi->irq = 0; + } else { + /* request the IRQ */ + ret = request_irq(hdmi->irq, rk616_hdmi_irq, 0, dev_name(&pdev->dev), hdmi); + if (ret) { + dev_err(hdmi->dev, "hdmi request_irq failed (%d).\n", ret); + goto err1; + } + } +#else + ret = rk616_hdmi_initial(); + if(rk616_hdmi->rk616_drv->pdata->hdmi_irq != INVALID_GPIO) { + INIT_WORK(&rk616_hdmi->rk616_irq_work_struct, rk616_irq_work_func); + ret = gpio_request(rk616_hdmi->rk616_drv->pdata->hdmi_irq,"rk616_hdmi_irq"); + if(ret < 0) { + dev_err(hdmi->dev,"request gpio for rk616 hdmi irq fail\n"); + } + gpio_direction_input(rk616_hdmi->rk616_drv->pdata->hdmi_irq); + hdmi->irq = gpio_to_irq(rk616_hdmi->rk616_drv->pdata->hdmi_irq); + if(hdmi->irq <= 0) { + dev_err(hdmi->dev, "failed to get hdmi irq resource (%d).\n", hdmi->irq); + ret = -ENXIO; + goto err1; + } + + /* request the IRQ */ + ret = request_irq(hdmi->irq, rk616_hdmi_irq, IRQF_TRIGGER_LOW, dev_name(&pdev->dev), &rk616_hdmi->rk616_irq_work_struct); + if (ret) { + dev_err(hdmi->dev, "hdmi request_irq failed (%d).\n", ret); + goto err1; + } + } else { + /* use roll polling method */ + hdmi->irq = 0; + } + +#endif + hdmi_register_display_sysfs(hdmi, NULL); + #if defined(CONFIG_DEBUG_FS) - if(rk616->debugfs_dir) - { - debugfs_create_file("hdmi", S_IRUSR,rk616->debugfs_dir,rk616,&rk616_hdmi_reg_fops); - } + if(rk616_hdmi->rk616_drv && rk616_hdmi->rk616_drv->debugfs_dir) { + debugfs_create_file("hdmi", S_IRUSR, rk616_hdmi->rk616_drv->debugfs_dir, rk616_hdmi->rk616_drv, &rk616_hdmi_reg_fops); + } else { + rk616_hdmi->debugfs_dir = debugfs_create_dir("rk616", NULL); + if (IS_ERR(rk616_hdmi->debugfs_dir)) { + dev_err(hdmi->dev,"failed to create debugfs dir for rk616!\n"); + } else { + debugfs_create_file("hdmi", S_IRUSR, rk616_hdmi->debugfs_dir, rk616_hdmi, &rk616_hdmi_reg_fops); + } + } #endif // rk616_delay_work_func(NULL); queue_delayed_work(hdmi->workqueue, &rk616_hdmi->rk616_delay_work, msecs_to_jiffies(0)); diff --git a/drivers/video/rockchip/hdmi/chips/rk616/rk616_hdmi.h b/drivers/video/rockchip/hdmi/chips/rk616/rk616_hdmi.h index c2a807abfe98..2d033fa6f330 100755 --- a/drivers/video/rockchip/hdmi/chips/rk616/rk616_hdmi.h +++ b/drivers/video/rockchip/hdmi/chips/rk616/rk616_hdmi.h @@ -32,6 +32,7 @@ struct rk616_hdmi { struct delayed_work rk616_delay_work; struct work_struct rk616_irq_work_struct; struct mfd_rk616 *rk616_drv; + struct dentry *debugfs_dir; }; #endif /* __RK30_HDMI_H__ */ diff --git a/drivers/video/rockchip/hdmi/chips/rk616/rk616_hdmi_hw.c b/drivers/video/rockchip/hdmi/chips/rk616/rk616_hdmi_hw.c index ad0c16f35169..76db26bcd074 100755 --- a/drivers/video/rockchip/hdmi/chips/rk616/rk616_hdmi_hw.c +++ b/drivers/video/rockchip/hdmi/chips/rk616/rk616_hdmi_hw.c @@ -7,14 +7,13 @@ // static char edid_result = 0; - +#ifndef CONFIG_ARCH_RK3026 static int rk616_set_polarity(struct mfd_rk616 * rk616, int vic) { u32 val; int ret; u32 hdmi_polarity_mask = (3<<14); - // printk("----------xhc---------vic = %d\n", vic); switch(vic) { @@ -48,7 +47,6 @@ static int rk616_hdmi_set_vif(rk_screen * screen,bool connect) struct rk616_hdmi *rk616_hdmi; rk616_hdmi = container_of(hdmi, struct rk616_hdmi, g_hdmi); - if (connect) rk616_set_polarity(rk616_hdmi->rk616_drv, hdmi->vic); @@ -60,15 +58,18 @@ static int rk616_hdmi_init_pol_set(struct mfd_rk616 * rk616,int pol) { u32 val; int ret; - ret = rk616->read_dev(rk616,CRU_CFGMISC_CON,&val); - if(pol) - val &= 0xffffffdf; - else - val |= 0x20; - ret = rk616->write_dev(rk616,CRU_CFGMISC_CON,&val); + int int_pol_mask = (1 << 5); + + if (pol) + val = 0x0; + else + val = 0x20; + ret = rk616->write_dev_bits(rk616, CRU_CFGMISC_CON, int_pol_mask, &val); return 0; } +#endif + static inline void delay100us(void) { msleep(1); @@ -358,7 +359,6 @@ static int rk616_hdmi_config_video(struct hdmi_video_para *vpara) value = mode->vsync_len; hdmi_writel(VIDEO_EXT_VDURATION, value & 0xFF); #endif - //rk616_set_polarity(rk616_hdmi->rk616_drv, vpara->vic); if(vpara->output_mode == OUTPUT_HDMI) { rk616_hdmi_config_avi(vpara->vic, vpara->output_color); @@ -368,19 +368,15 @@ static int rk616_hdmi_config_video(struct hdmi_video_para *vpara) hdmi_dbg(hdmi->dev, "[%s] sucess output DVI.\n", __FUNCTION__); } -#if 1 - hdmi_writel(0xed, 0x0f); - hdmi_writel(0xe7, 0x96); -#else - if(hdmi->tmdsclk >= 148500000) { - hdmi_writel(0xed, 0xc); - hdmi_writel(0xe7, 0x78); - } - else { - hdmi_writel(0xed, 0x3); - hdmi_writel(0xe7, 0x1e); - } -#endif + // if(rk616_hdmi->rk616_drv) { + if (hdmi->set_vif) { + hdmi_writel(0xed, 0x0f); + hdmi_writel(0xe7, 0x96); + } else { // rk3028a + hdmi_writel(0xed, 0x1e); + hdmi_writel(0xe7, 0x2c); + hdmi_writel(0xe8, 0x01); + } return 0; } @@ -520,6 +516,7 @@ void rk616_hdmi_work(void) u32 interrupt = 0; // int value = 0; + hdmi_readl(INTERRUPT_STATUS1,&interrupt); if(interrupt){ hdmi_writel(INTERRUPT_STATUS1, interrupt); @@ -576,11 +573,16 @@ int rk616_hdmi_initial(void) hdmi->config_audio = rk616_hdmi_config_audio; hdmi->detect_hotplug = rk616_hdmi_detect_hotplug; hdmi->read_edid = rk616_hdmi_read_edid; - hdmi->set_vif = rk616_hdmi_set_vif; - - rk616_hdmi_reset(); +#ifdef CONFIG_ARCH_RK3026 + rk3028_hdmi_reset_pclk(); + rk616_hdmi_reset(); +#else + hdmi->set_vif = rk616_hdmi_set_vif; + rk616_hdmi_reset(); rk616_hdmi_init_pol_set(rk616_hdmi->rk616_drv, 0); +#endif + if(hdmi->hdcp_power_on_cb) rc = hdmi->hdcp_power_on_cb(); diff --git a/drivers/video/rockchip/hdmi/chips/rk616/rk616_hdmi_hw.h b/drivers/video/rockchip/hdmi/chips/rk616/rk616_hdmi_hw.h index c3b98ebd3e12..c998933c0bb3 100755 --- a/drivers/video/rockchip/hdmi/chips/rk616/rk616_hdmi_hw.h +++ b/drivers/video/rockchip/hdmi/chips/rk616/rk616_hdmi_hw.h @@ -285,6 +285,7 @@ enum { #define PHY_PRE_DIV_RATIO 0xed #define v_PRE_DIV_RATIO(n) (n&1f) +#ifndef CONFIG_ARCH_RK3026 static inline int hdmi_readl(u16 offset, u32 *val) { int ret; @@ -314,6 +315,37 @@ static inline int hdmi_msk_reg(u16 offset, u32 msk, u32 val) ret = rk616_hdmi->rk616_drv->write_dev_bits(rk616_hdmi->rk616_drv, (RK616_HDMI_BASE + ((offset)<<2)), msk, &val); return ret; } +#else + +static inline int hdmi_readl(u16 offset, u32 *val) +{ + int ret = 0; + *val = readl_relaxed(hdmi->regbase + (offset) * 0x04); + return ret; +} + +static inline int hdmi_writel(u16 offset, u32 val) +{ + int ret = 0; + writel_relaxed(val, hdmi->regbase + (offset) * 0x04); + return ret; +} + +static inline int hdmi_msk_reg(u16 offset, u32 msk, u32 val) +{ + int ret = 0; + u32 temp; + temp = readl_relaxed(hdmi->regbase + (offset) * 0x04) & (0xFF - (msk)); + writel_relaxed(temp | ( (val) & (msk) ), hdmi->regbase + (offset) * 0x04); + return ret; +} +static inline void rk3028_hdmi_reset_pclk(void) +{ + writel_relaxed(0x00010001,RK2928_CRU_BASE+ 0x128); + msleep(100); + writel_relaxed(0x00010000, RK2928_CRU_BASE + 0x128); +} +#endif extern int rk616_hdmi_initial(void); extern void rk616_hdmi_work(void); diff --git a/drivers/video/rockchip/screen/lcd_rk2928.c b/drivers/video/rockchip/screen/lcd_rk2928.c index 92c09b11b707..5e0c27149b02 100644 --- a/drivers/video/rockchip/screen/lcd_rk2928.c +++ b/drivers/video/rockchip/screen/lcd_rk2928.c @@ -1,78 +1,78 @@ -#include -#include -#include "../../rk29_fb.h" -#include -#include -#include -#include -#include "../../rockchip/hdmi/rk_hdmi.h" -#include "screen.h" - -enum { - OUT_TYPE_INDEX = 0, - OUT_FACE_INDEX, - OUT_CLK_INDEX, - LCDC_ACLK_INDEX, - H_PW_INDEX, - H_BP_INDEX, - H_VD_INDEX, - H_FP_INDEX, - V_PW_INDEX, - V_BP_INDEX, - V_VD_INDEX, - V_FP_INDEX, - LCD_WIDTH_INDEX, - LCD_HEIGHT_INDEX, - DCLK_POL_INDEX, - SWAP_RB_INDEX, - LCD_PARAM_MAX, -}; -uint lcd_param[LCD_PARAM_MAX] = DEF_LCD_PARAM; -module_param_array(lcd_param, uint, NULL, 0644); - -#define set_scaler_info NULL - -void set_lcd_info(struct rk29fb_screen *screen, struct rk29lcd_info *lcd_info ) -{ - /* screen type & face */ - screen->type = lcd_param[OUT_TYPE_INDEX]; - screen->face = lcd_param[OUT_FACE_INDEX]; - screen->hw_format = 1; - - /* Screen size */ - screen->x_res = lcd_param[H_VD_INDEX]; - screen->y_res = lcd_param[V_VD_INDEX]; - - screen->width = lcd_param[LCD_WIDTH_INDEX]; - screen->height = lcd_param[LCD_HEIGHT_INDEX]; - - /* Timing */ - screen->lcdc_aclk = lcd_param[LCDC_ACLK_INDEX]; - screen->pixclock = lcd_param[OUT_CLK_INDEX]; - screen->left_margin = lcd_param[H_BP_INDEX]; - screen->right_margin = lcd_param[H_FP_INDEX]; - screen->hsync_len = lcd_param[H_PW_INDEX]; - screen->upper_margin = lcd_param[V_BP_INDEX]; - screen->lower_margin = lcd_param[V_FP_INDEX]; - screen->vsync_len = lcd_param[V_PW_INDEX]; - - /* Pin polarity */ - screen->pin_hsync = 0; - screen->pin_vsync = 0; - screen->pin_den = 0; - screen->pin_dclk = lcd_param[DCLK_POL_INDEX]; - - /* Swap rule */ - screen->swap_rb = lcd_param[SWAP_RB_INDEX]; - screen->swap_rg = 0; - screen->swap_gb = 0; - screen->swap_delta = 0; - screen->swap_dumy = 0; - - /* Operation function*/ - screen->init = NULL; - screen->standby = NULL; -} - - - +#include +#include +#include "../../rk29_fb.h" +#include +#include +#include +#include +#include "../../rockchip/hdmi/rk_hdmi.h" +#include "screen.h" + +enum { + OUT_TYPE_INDEX = 0, + OUT_FACE_INDEX, + OUT_CLK_INDEX, + LCDC_ACLK_INDEX, + H_PW_INDEX, + H_BP_INDEX, + H_VD_INDEX, + H_FP_INDEX, + V_PW_INDEX, + V_BP_INDEX, + V_VD_INDEX, + V_FP_INDEX, + LCD_WIDTH_INDEX, + LCD_HEIGHT_INDEX, + DCLK_POL_INDEX, + SWAP_RB_INDEX, + LCD_PARAM_MAX, +}; +uint lcd_param[LCD_PARAM_MAX] = DEF_LCD_PARAM; +module_param_array(lcd_param, uint, NULL, 0644); + +#define set_scaler_info NULL + +void set_lcd_info(struct rk29fb_screen *screen, struct rk29lcd_info *lcd_info ) +{ + /* screen type & face */ + screen->type = lcd_param[OUT_TYPE_INDEX]; + screen->face = lcd_param[OUT_FACE_INDEX]; + screen->hw_format = 1; + + /* Screen size */ + screen->x_res = lcd_param[H_VD_INDEX]; + screen->y_res = lcd_param[V_VD_INDEX]; + + screen->width = lcd_param[LCD_WIDTH_INDEX]; + screen->height = lcd_param[LCD_HEIGHT_INDEX]; + + /* Timing */ + screen->lcdc_aclk = lcd_param[LCDC_ACLK_INDEX]; + screen->pixclock = lcd_param[OUT_CLK_INDEX]; + screen->left_margin = lcd_param[H_BP_INDEX]; + screen->right_margin = lcd_param[H_FP_INDEX]; + screen->hsync_len = lcd_param[H_PW_INDEX]; + screen->upper_margin = lcd_param[V_BP_INDEX]; + screen->lower_margin = lcd_param[V_FP_INDEX]; + screen->vsync_len = lcd_param[V_PW_INDEX]; + + /* Pin polarity */ + screen->pin_hsync = 0; + screen->pin_vsync = 0; + screen->pin_den = 0; + screen->pin_dclk = lcd_param[DCLK_POL_INDEX]; + + /* Swap rule */ + screen->swap_rb = lcd_param[SWAP_RB_INDEX]; + screen->swap_rg = 0; + screen->swap_gb = 0; + screen->swap_delta = 0; + screen->swap_dumy = 0; + + /* Operation function*/ + screen->init = NULL; + screen->standby = NULL; +} + + + diff --git a/drivers/video/rockchip/screen/lcd_rk3168_fac.c b/drivers/video/rockchip/screen/lcd_rk3168_fac.c index 23fef355de00..66bdeb52fe13 100644 --- a/drivers/video/rockchip/screen/lcd_rk3168_fac.c +++ b/drivers/video/rockchip/screen/lcd_rk3168_fac.c @@ -1,203 +1,203 @@ -/* This Lcd Driver is HSD070IDW1 write by cst 2009.10.27 */ - -#ifndef __LCD_RK3168_FAC__ -#define __LCD_RK3168_FAC__ -/* Base */ - -#ifdef CONFIG_RK610_LVDS -#include "../transmitter/rk610_lcd.h" -#endif - -#define DEN_POL 0 -#define VSYNC_POL 0 -#define HSYNC_POL 0 - -#define SWAP_RB 0 -#define SWAP_RG 0 -#define SWAP_GB 0 - -int dsp_lut[256] ={ - 0x00000000, 0x00010101, 0x00020202, 0x00030303, 0x00040404, 0x00050505, 0x00060606, 0x00070707, - 0x00080808, 0x00090909, 0x000a0a0a, 0x000b0b0b, 0x000c0c0c, 0x000d0d0d, 0x000e0e0e, 0x000f0f0f, - 0x00101010, 0x00111111, 0x00121212, 0x00131313, 0x00141414, 0x00151515, 0x00161616, 0x00171717, - 0x00181818, 0x00191919, 0x001a1a1a, 0x001b1b1b, 0x001c1c1c, 0x001d1d1d, 0x001e1e1e, 0x001f1f1f, - 0x00202020, 0x00212121, 0x00222222, 0x00232323, 0x00242424, 0x00252525, 0x00262626, 0x00272727, - 0x00282828, 0x00292929, 0x002a2a2a, 0x002b2b2b, 0x002c2c2c, 0x002d2d2d, 0x002e2e2e, 0x002f2f2f, - 0x00303030, 0x00313131, 0x00323232, 0x00333333, 0x00343434, 0x00353535, 0x00363636, 0x00373737, - 0x00383838, 0x00393939, 0x003a3a3a, 0x003b3b3b, 0x003c3c3c, 0x003d3d3d, 0x003e3e3e, 0x003f3f3f, - 0x00404040, 0x00414141, 0x00424242, 0x00434343, 0x00444444, 0x00454545, 0x00464646, 0x00474747, - 0x00484848, 0x00494949, 0x004a4a4a, 0x004b4b4b, 0x004c4c4c, 0x004d4d4d, 0x004e4e4e, 0x004f4f4f, - 0x00505050, 0x00515151, 0x00525252, 0x00535353, 0x00545454, 0x00555555, 0x00565656, 0x00575757, - 0x00585858, 0x00595959, 0x005a5a5a, 0x005b5b5b, 0x005c5c5c, 0x005d5d5d, 0x005e5e5e, 0x005f5f5f, - 0x00606060, 0x00616161, 0x00626262, 0x00636363, 0x00646464, 0x00656565, 0x00666666, 0x00676767, - 0x00686868, 0x00696969, 0x006a6a6a, 0x006b6b6b, 0x006c6c6c, 0x006d6d6d, 0x006e6e6e, 0x006f6f6f, - 0x00707070, 0x00717171, 0x00727272, 0x00737373, 0x00747474, 0x00757575, 0x00767676, 0x00777777, - 0x00787878, 0x00797979, 0x007a7a7a, 0x007b7b7b, 0x007c7c7c, 0x007d7d7d, 0x007e7e7e, 0x007f7f7f, - 0x00808080, 0x00818181, 0x00828282, 0x00838383, 0x00848484, 0x00858585, 0x00868686, 0x00878787, - 0x00888888, 0x00898989, 0x008a8a8a, 0x008b8b8b, 0x008c8c8c, 0x008d8d8d, 0x008e8e8e, 0x008f8f8f, - 0x00909090, 0x00919191, 0x00929292, 0x00939393, 0x00949494, 0x00959595, 0x00969696, 0x00979797, - 0x00989898, 0x00999999, 0x009a9a9a, 0x009b9b9b, 0x009c9c9c, 0x009d9d9d, 0x009e9e9e, 0x009f9f9f, - 0x00a0a0a0, 0x00a1a1a1, 0x00a2a2a2, 0x00a3a3a3, 0x00a4a4a4, 0x00a5a5a5, 0x00a6a6a6, 0x00a7a7a7, - 0x00a8a8a8, 0x00a9a9a9, 0x00aaaaaa, 0x00ababab, 0x00acacac, 0x00adadad, 0x00aeaeae, 0x00afafaf, - 0x00b0b0b0, 0x00b1b1b1, 0x00b2b2b2, 0x00b3b3b3, 0x00b4b4b4, 0x00b5b5b5, 0x00b6b6b6, 0x00b7b7b7, - 0x00b8b8b8, 0x00b9b9b9, 0x00bababa, 0x00bbbbbb, 0x00bcbcbc, 0x00bdbdbd, 0x00bebebe, 0x00bfbfbf, - 0x00c0c0c0, 0x00c1c1c1, 0x00c2c2c2, 0x00c3c3c3, 0x00c4c4c4, 0x00c5c5c5, 0x00c6c6c6, 0x00c7c7c7, - 0x00c8c8c8, 0x00c9c9c9, 0x00cacaca, 0x00cbcbcb, 0x00cccccc, 0x00cdcdcd, 0x00cecece, 0x00cfcfcf, - 0x00d0d0d0, 0x00d1d1d1, 0x00d2d2d2, 0x00d3d3d3, 0x00d4d4d4, 0x00d5d5d5, 0x00d6d6d6, 0x00d7d7d7, - 0x00d8d8d8, 0x00d9d9d9, 0x00dadada, 0x00dbdbdb, 0x00dcdcdc, 0x00dddddd, 0x00dedede, 0x00dfdfdf, - 0x00e0e0e0, 0x00e1e1e1, 0x00e2e2e2, 0x00e3e3e3, 0x00e4e4e4, 0x00e5e5e5, 0x00e6e6e6, 0x00e7e7e7, - 0x00e8e8e8, 0x00e9e9e9, 0x00eaeaea, 0x00ebebeb, 0x00ececec, 0x00ededed, 0x00eeeeee, 0x00efefef, - 0x00f0f0f0, 0x00f1f1f1, 0x00f2f2f2, 0x00f3f3f3, 0x00f4f4f4, 0x00f5f5f5, 0x00f6f6f6, 0x00f7f7f7, - 0x00f8f8f8, 0x00f9f9f9, 0x00fafafa, 0x00fbfbfb, 0x00fcfcfc, 0x00fdfdfd, 0x00fefefe, 0x00ffffff, -}; - -#if defined(CONFIG_ONE_LCDC_DUAL_OUTPUT_INF)&& ( defined(CONFIG_RK610_LVDS) || defined(CONFIG_RK616_LVDS)) - -/* scaler Timing */ -//1920*1080*60 - -#define S_OUT_CLK SCALE_RATE(148500000,50625000) -#define S_H_PW 10 -#define S_H_BP 10 -#define S_H_VD 1024 -#define S_H_FP 306 - -#define S_V_PW 10 -#define S_V_BP 10 -#define S_V_VD 600 -#define S_V_FP 5 - -#define S_H_ST 0 -#define S_V_ST 5 - -#define S_PLL_CFG_VAL 0x01443013//0x01842016 -#define S_FRAC 0x4d9380//0xc16c2d -#define S_SCL_VST 0x00b//0x25 -#define S_SCL_HST 0x000//0x4ba -#define S_VIF_VST 0x1//0x1 -#define S_VIF_HST 0xca//0xca - -//1920*1080*50 -#define S1_OUT_CLK SCALE_RATE(148500000,45375000) -#define S1_H_PW 10 -#define S1_H_BP 10 -#define S1_H_VD 1024 -#define S1_H_FP 408 - -#define S1_V_PW 10 -#define S1_V_BP 10 -#define S1_V_VD 600 -#define S1_V_FP 5 - -#define S1_H_ST 0 -#define S1_V_ST 5 - -#define S1_PLL_CFG_VAL 0x01843013//0x01c42016 -#define S1_FRAC 0x4d9365//0x1f9ad4 -#define S1_SCL_VST 0x00a//0x25 -#define S1_SCL_HST 0xa4f//0x5ab -#define S1_VIF_VST 0x1//0x1 -#define S1_VIF_HST 0xca//0xca - - -//1280*720*60 -#define S2_OUT_CLK SCALE_RATE(74250000,50625000) -#define S2_H_PW 10 -#define S2_H_BP 10 -#define S2_H_VD 1024 -#define S2_H_FP 306 - -#define S2_V_PW 10 -#define S2_V_BP 10 -#define S2_V_VD 600 -#define S2_V_FP 5 - -#define S2_H_ST 0 -#define S2_V_ST 3 - - -//bellow are for jettaB -#define S2_PLL_CFG_VAL 0x01423013//0x01822016 -#define S2_FRAC 0x4d9380//0xc16c2d -#define S2_SCL_VST 0x008//0x19 -#define S2_SCL_HST 0x000//0x483 -#define S2_VIF_VST 0x1//0x1 -#define S2_VIF_HST 0xcf//0xcf - - -//1280*720*50 - -#define S3_OUT_CLK SCALE_RATE(74250000,44343750) -#define S3_H_PW 10 -#define S3_H_BP 10 -#define S3_H_VD 1024 -#define S3_H_FP 375 - -#define S3_V_PW 10 -#define S3_V_BP 10 -#define S3_V_VD 600 -#define S3_V_FP 3 - -#define S3_H_ST 0 -#define S3_V_ST 3 - -#define S3_PLL_CFG_VAL 0x01823013//0x01c22016 -#define S3_FRAC 0x4d9365//0x1f9ad4 -#define S3_SCL_VST 0x007//0x19 -#define S3_SCL_HST 0x7bb//0x569 -#define S3_VIF_VST 0x1//0x1 -#define S3_VIF_HST 0xcf//0xcf - - -//720*576*50 -#define S4_OUT_CLK SCALE_RATE(27000000,46875000) -#define S4_H_PW 10 -#define S4_H_BP 10 -#define S4_H_VD 1024 -#define S4_H_FP 396 - -#define S4_V_PW 10 -#define S4_V_BP 10 -#define S4_V_VD 600 -#define S4_V_FP 31 - -#define S4_H_ST 0 -#define S4_V_ST 28 - -#define S4_PLL_CFG_VAL 0x01c12015//0x01412016 -#define S4_FRAC 0x80f04c//0xa23d09 -#define S4_SCL_VST 0x01f//0x2d -#define S4_SCL_HST 0x2b3//0x33d -#define S4_VIF_VST 0x1//0x1 -#define S4_VIF_HST 0xc1//0xc1 - - -//720*480*60 -#define S5_OUT_CLK SCALE_RATE(27000000,56250000) //m=100 n=9 no=4 -#define S5_H_PW 10 -#define S5_H_BP 10 -#define S5_H_VD 1024 -#define S5_H_FP 386 - -#define S5_V_PW 10 -#define S5_V_BP 10 -#define S5_V_VD 600 -#define S5_V_FP 35 - -#define S5_H_ST 0 -#define S5_V_ST 22 - -#define S5_PLL_CFG_VAL 0x01812016//0x01c11013 -#define S5_FRAC 0x45d17b//0x25325e -#define S5_SCL_VST 0x01a//0x26 -#define S5_SCL_HST 0x359//0x2ae -#define S5_VIF_VST 0x1//0x1 -#define S5_VIF_HST 0xc1//0xc1 - - -#define S_DCLK_POL 1 - -#endif - -#endif - +/* This Lcd Driver is HSD070IDW1 write by cst 2009.10.27 */ + +#ifndef __LCD_RK3168_FAC__ +#define __LCD_RK3168_FAC__ +/* Base */ + +#ifdef CONFIG_RK610_LVDS +#include "../transmitter/rk610_lcd.h" +#endif + +#define DEN_POL 0 +#define VSYNC_POL 0 +#define HSYNC_POL 0 + +#define SWAP_RB 0 +#define SWAP_RG 0 +#define SWAP_GB 0 + +int dsp_lut[256] ={ + 0x00000000, 0x00010101, 0x00020202, 0x00030303, 0x00040404, 0x00050505, 0x00060606, 0x00070707, + 0x00080808, 0x00090909, 0x000a0a0a, 0x000b0b0b, 0x000c0c0c, 0x000d0d0d, 0x000e0e0e, 0x000f0f0f, + 0x00101010, 0x00111111, 0x00121212, 0x00131313, 0x00141414, 0x00151515, 0x00161616, 0x00171717, + 0x00181818, 0x00191919, 0x001a1a1a, 0x001b1b1b, 0x001c1c1c, 0x001d1d1d, 0x001e1e1e, 0x001f1f1f, + 0x00202020, 0x00212121, 0x00222222, 0x00232323, 0x00242424, 0x00252525, 0x00262626, 0x00272727, + 0x00282828, 0x00292929, 0x002a2a2a, 0x002b2b2b, 0x002c2c2c, 0x002d2d2d, 0x002e2e2e, 0x002f2f2f, + 0x00303030, 0x00313131, 0x00323232, 0x00333333, 0x00343434, 0x00353535, 0x00363636, 0x00373737, + 0x00383838, 0x00393939, 0x003a3a3a, 0x003b3b3b, 0x003c3c3c, 0x003d3d3d, 0x003e3e3e, 0x003f3f3f, + 0x00404040, 0x00414141, 0x00424242, 0x00434343, 0x00444444, 0x00454545, 0x00464646, 0x00474747, + 0x00484848, 0x00494949, 0x004a4a4a, 0x004b4b4b, 0x004c4c4c, 0x004d4d4d, 0x004e4e4e, 0x004f4f4f, + 0x00505050, 0x00515151, 0x00525252, 0x00535353, 0x00545454, 0x00555555, 0x00565656, 0x00575757, + 0x00585858, 0x00595959, 0x005a5a5a, 0x005b5b5b, 0x005c5c5c, 0x005d5d5d, 0x005e5e5e, 0x005f5f5f, + 0x00606060, 0x00616161, 0x00626262, 0x00636363, 0x00646464, 0x00656565, 0x00666666, 0x00676767, + 0x00686868, 0x00696969, 0x006a6a6a, 0x006b6b6b, 0x006c6c6c, 0x006d6d6d, 0x006e6e6e, 0x006f6f6f, + 0x00707070, 0x00717171, 0x00727272, 0x00737373, 0x00747474, 0x00757575, 0x00767676, 0x00777777, + 0x00787878, 0x00797979, 0x007a7a7a, 0x007b7b7b, 0x007c7c7c, 0x007d7d7d, 0x007e7e7e, 0x007f7f7f, + 0x00808080, 0x00818181, 0x00828282, 0x00838383, 0x00848484, 0x00858585, 0x00868686, 0x00878787, + 0x00888888, 0x00898989, 0x008a8a8a, 0x008b8b8b, 0x008c8c8c, 0x008d8d8d, 0x008e8e8e, 0x008f8f8f, + 0x00909090, 0x00919191, 0x00929292, 0x00939393, 0x00949494, 0x00959595, 0x00969696, 0x00979797, + 0x00989898, 0x00999999, 0x009a9a9a, 0x009b9b9b, 0x009c9c9c, 0x009d9d9d, 0x009e9e9e, 0x009f9f9f, + 0x00a0a0a0, 0x00a1a1a1, 0x00a2a2a2, 0x00a3a3a3, 0x00a4a4a4, 0x00a5a5a5, 0x00a6a6a6, 0x00a7a7a7, + 0x00a8a8a8, 0x00a9a9a9, 0x00aaaaaa, 0x00ababab, 0x00acacac, 0x00adadad, 0x00aeaeae, 0x00afafaf, + 0x00b0b0b0, 0x00b1b1b1, 0x00b2b2b2, 0x00b3b3b3, 0x00b4b4b4, 0x00b5b5b5, 0x00b6b6b6, 0x00b7b7b7, + 0x00b8b8b8, 0x00b9b9b9, 0x00bababa, 0x00bbbbbb, 0x00bcbcbc, 0x00bdbdbd, 0x00bebebe, 0x00bfbfbf, + 0x00c0c0c0, 0x00c1c1c1, 0x00c2c2c2, 0x00c3c3c3, 0x00c4c4c4, 0x00c5c5c5, 0x00c6c6c6, 0x00c7c7c7, + 0x00c8c8c8, 0x00c9c9c9, 0x00cacaca, 0x00cbcbcb, 0x00cccccc, 0x00cdcdcd, 0x00cecece, 0x00cfcfcf, + 0x00d0d0d0, 0x00d1d1d1, 0x00d2d2d2, 0x00d3d3d3, 0x00d4d4d4, 0x00d5d5d5, 0x00d6d6d6, 0x00d7d7d7, + 0x00d8d8d8, 0x00d9d9d9, 0x00dadada, 0x00dbdbdb, 0x00dcdcdc, 0x00dddddd, 0x00dedede, 0x00dfdfdf, + 0x00e0e0e0, 0x00e1e1e1, 0x00e2e2e2, 0x00e3e3e3, 0x00e4e4e4, 0x00e5e5e5, 0x00e6e6e6, 0x00e7e7e7, + 0x00e8e8e8, 0x00e9e9e9, 0x00eaeaea, 0x00ebebeb, 0x00ececec, 0x00ededed, 0x00eeeeee, 0x00efefef, + 0x00f0f0f0, 0x00f1f1f1, 0x00f2f2f2, 0x00f3f3f3, 0x00f4f4f4, 0x00f5f5f5, 0x00f6f6f6, 0x00f7f7f7, + 0x00f8f8f8, 0x00f9f9f9, 0x00fafafa, 0x00fbfbfb, 0x00fcfcfc, 0x00fdfdfd, 0x00fefefe, 0x00ffffff, +}; + +#if defined(CONFIG_ONE_LCDC_DUAL_OUTPUT_INF)&& ( defined(CONFIG_RK610_LVDS) || defined(CONFIG_RK616_LVDS)) + +/* scaler Timing */ +//1920*1080*60 + +#define S_OUT_CLK SCALE_RATE(148500000,50625000) +#define S_H_PW 10 +#define S_H_BP 10 +#define S_H_VD 1024 +#define S_H_FP 306 + +#define S_V_PW 10 +#define S_V_BP 10 +#define S_V_VD 600 +#define S_V_FP 5 + +#define S_H_ST 0 +#define S_V_ST 5 + +#define S_PLL_CFG_VAL 0x01443013//0x01842016 +#define S_FRAC 0x4d9380//0xc16c2d +#define S_SCL_VST 0x00b//0x25 +#define S_SCL_HST 0x000//0x4ba +#define S_VIF_VST 0x1//0x1 +#define S_VIF_HST 0xca//0xca + +//1920*1080*50 +#define S1_OUT_CLK SCALE_RATE(148500000,45375000) +#define S1_H_PW 10 +#define S1_H_BP 10 +#define S1_H_VD 1024 +#define S1_H_FP 408 + +#define S1_V_PW 10 +#define S1_V_BP 10 +#define S1_V_VD 600 +#define S1_V_FP 5 + +#define S1_H_ST 0 +#define S1_V_ST 5 + +#define S1_PLL_CFG_VAL 0x01843013//0x01c42016 +#define S1_FRAC 0x4d9365//0x1f9ad4 +#define S1_SCL_VST 0x00a//0x25 +#define S1_SCL_HST 0xa4f//0x5ab +#define S1_VIF_VST 0x1//0x1 +#define S1_VIF_HST 0xca//0xca + + +//1280*720*60 +#define S2_OUT_CLK SCALE_RATE(74250000,50625000) +#define S2_H_PW 10 +#define S2_H_BP 10 +#define S2_H_VD 1024 +#define S2_H_FP 306 + +#define S2_V_PW 10 +#define S2_V_BP 10 +#define S2_V_VD 600 +#define S2_V_FP 5 + +#define S2_H_ST 0 +#define S2_V_ST 3 + + +//bellow are for jettaB +#define S2_PLL_CFG_VAL 0x01423013//0x01822016 +#define S2_FRAC 0x4d9380//0xc16c2d +#define S2_SCL_VST 0x008//0x19 +#define S2_SCL_HST 0x000//0x483 +#define S2_VIF_VST 0x1//0x1 +#define S2_VIF_HST 0xcf//0xcf + + +//1280*720*50 + +#define S3_OUT_CLK SCALE_RATE(74250000,44343750) +#define S3_H_PW 10 +#define S3_H_BP 10 +#define S3_H_VD 1024 +#define S3_H_FP 375 + +#define S3_V_PW 10 +#define S3_V_BP 10 +#define S3_V_VD 600 +#define S3_V_FP 3 + +#define S3_H_ST 0 +#define S3_V_ST 3 + +#define S3_PLL_CFG_VAL 0x01823013//0x01c22016 +#define S3_FRAC 0x4d9365//0x1f9ad4 +#define S3_SCL_VST 0x007//0x19 +#define S3_SCL_HST 0x7bb//0x569 +#define S3_VIF_VST 0x1//0x1 +#define S3_VIF_HST 0xcf//0xcf + + +//720*576*50 +#define S4_OUT_CLK SCALE_RATE(27000000,46875000) +#define S4_H_PW 10 +#define S4_H_BP 10 +#define S4_H_VD 1024 +#define S4_H_FP 396 + +#define S4_V_PW 10 +#define S4_V_BP 10 +#define S4_V_VD 600 +#define S4_V_FP 31 + +#define S4_H_ST 0 +#define S4_V_ST 28 + +#define S4_PLL_CFG_VAL 0x01c12015//0x01412016 +#define S4_FRAC 0x80f04c//0xa23d09 +#define S4_SCL_VST 0x01f//0x2d +#define S4_SCL_HST 0x2b3//0x33d +#define S4_VIF_VST 0x1//0x1 +#define S4_VIF_HST 0xc1//0xc1 + + +//720*480*60 +#define S5_OUT_CLK SCALE_RATE(27000000,56250000) //m=100 n=9 no=4 +#define S5_H_PW 10 +#define S5_H_BP 10 +#define S5_H_VD 1024 +#define S5_H_FP 386 + +#define S5_V_PW 10 +#define S5_V_BP 10 +#define S5_V_VD 600 +#define S5_V_FP 35 + +#define S5_H_ST 0 +#define S5_V_ST 22 + +#define S5_PLL_CFG_VAL 0x01812016//0x01c11013 +#define S5_FRAC 0x45d17b//0x25325e +#define S5_SCL_VST 0x01a//0x26 +#define S5_SCL_HST 0x359//0x2ae +#define S5_VIF_VST 0x1//0x1 +#define S5_VIF_HST 0xc1//0xc1 + + +#define S_DCLK_POL 1 + +#endif + +#endif +