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synced 2026-06-08 03:40:35 +09:00
vdin: optimize game mode for tl1 phase lock [1/1]
PD#SWPL-4788 Problem: sometimes hdmi source display broken in game mode Solution: use phase lock for tl1 game mode ahead 2 frames, and ahead 1 frame for previous chips. Verify: x301 Change-Id: I00df9125c9ea7869ed6e111ba99a8b755c914129 Signed-off-by: Evoke Zhang <evoke.zhang@amlogic.com>
This commit is contained in:
@@ -1551,7 +1551,7 @@ void vlock_status_init(void)
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vlock.vf_sts = false;
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vlock.vf_sts = false;
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vlock.vmd_chg = false;
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vlock.vmd_chg = false;
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vlock.md_support = false;
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vlock.md_support = false;
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vlock.phlock_percent = 40;
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/* vlock.phlock_percent = phlock_percent; */
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vlock_clear_frame_counter();
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vlock_clear_frame_counter();
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@@ -2290,5 +2290,19 @@ int vlock_notify_callback(struct notifier_block *block, unsigned long cmd,
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return 0;
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return 0;
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}
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}
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static int __init phlock_phase_config(char *str)
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{
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unsigned char *ptr = str;
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pr_info("%s: bootargs is %s.\n", __func__, str);
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if (strstr(ptr, "1"))
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vlock.phlock_percent = 99;
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else
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vlock.phlock_percent = 40;
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return 0;
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}
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__setup("video_reverse=", phlock_phase_config);
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/*video lock end*/
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/*video lock end*/
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@@ -90,8 +90,10 @@ static unsigned int pr_times;
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static int canvas_config_mode = 2;
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static int canvas_config_mode = 2;
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static bool work_mode_simple;
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static bool work_mode_simple;
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static int max_ignore_frames = 2;
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static int max_ignore_frames = 2;
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static int phase_lock_flag;
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/*game_mode_switch_frames:min num is 5 by 1080p60hz input test*/
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/*game_mode_switch_frames:min num is 5 by 1080p60hz input test*/
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static int game_mode_switch_frames = 10;
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static int game_mode_switch_frames = 10;
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static int game_mode_phlock_switch_frames = 60;
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static int ignore_frames;
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static int ignore_frames;
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static unsigned int dv_work_delby;
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static unsigned int dv_work_delby;
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/* viu isr select:
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/* viu isr select:
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@@ -121,6 +123,10 @@ MODULE_PARM_DESC(viu_hw_irq, "viu_hw_irq");
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module_param(game_mode_switch_frames, int, 0664);
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module_param(game_mode_switch_frames, int, 0664);
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MODULE_PARM_DESC(game_mode_switch_frames, "game mode switch <n> frames");
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MODULE_PARM_DESC(game_mode_switch_frames, "game mode switch <n> frames");
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module_param(game_mode_phlock_switch_frames, int, 0664);
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MODULE_PARM_DESC(game_mode_phlock_switch_frames,
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"game mode switch <n> frames for phase_lock");
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#endif
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#endif
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static bool vdin_dbg_en;
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static bool vdin_dbg_en;
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@@ -277,8 +283,14 @@ static void vdin_game_mode_check(struct vdin_dev_s *devp)
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(devp->parm.port != TVIN_PORT_CVBS3)) {
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(devp->parm.port != TVIN_PORT_CVBS3)) {
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if (devp->h_active > 720 && ((devp->parm.info.fps == 50) ||
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if (devp->h_active > 720 && ((devp->parm.info.fps == 50) ||
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(devp->parm.info.fps == 60)))
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(devp->parm.info.fps == 60)))
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devp->game_mode = (VDIN_GAME_MODE_0 | VDIN_GAME_MODE_1 |
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if (is_meson_tl1_cpu()) {
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VDIN_GAME_MODE_SWITCH_EN);
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devp->game_mode = (VDIN_GAME_MODE_0 |
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VDIN_GAME_MODE_1 |
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VDIN_GAME_MODE_SWITCH_EN);
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} else {
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devp->game_mode = (VDIN_GAME_MODE_0 |
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VDIN_GAME_MODE_1);
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}
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else
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else
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devp->game_mode = VDIN_GAME_MODE_0;
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devp->game_mode = VDIN_GAME_MODE_0;
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} else if (game_mode == 2)/*for debug force game mode*/
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} else if (game_mode == 2)/*for debug force game mode*/
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@@ -292,6 +304,9 @@ static void vdin_game_mode_check(struct vdin_dev_s *devp)
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VDIN_GAME_MODE_SWITCH_EN);
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VDIN_GAME_MODE_SWITCH_EN);
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else
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else
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devp->game_mode = 0;
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devp->game_mode = 0;
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pr_info("%s: game_mode flag=%d, game_mode=%d\n",
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__func__, game_mode, devp->game_mode);
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}
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}
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/*
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/*
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*based on the bellow parameters:
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*based on the bellow parameters:
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@@ -642,6 +657,7 @@ void vdin_start_dec(struct vdin_dev_s *devp)
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devp->irq_cnt = 0;
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devp->irq_cnt = 0;
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devp->rdma_irq_cnt = 0;
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devp->rdma_irq_cnt = 0;
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devp->frame_cnt = 0;
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devp->frame_cnt = 0;
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phase_lock_flag = 0;
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if (time_en)
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if (time_en)
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pr_info("vdin.%d start time: %ums, run time:%ums.\n",
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pr_info("vdin.%d start time: %ums, run time:%ums.\n",
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@@ -1662,11 +1678,45 @@ irqreturn_t vdin_isr(int irq, void *dev_id)
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vdin_vf_disp_mode_update(curr_wr_vfe, devp->vfp);
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vdin_vf_disp_mode_update(curr_wr_vfe, devp->vfp);
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}
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}
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/*switch to game mode 2 from game mode 1,otherwise may appear blink*/
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/*switch to game mode 2 from game mode 1,otherwise may appear blink*/
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if ((devp->frame_cnt >= game_mode_switch_frames) &&
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if (is_meson_tl1_cpu()) {
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(devp->game_mode & VDIN_GAME_MODE_SWITCH_EN)) {
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if (devp->game_mode & VDIN_GAME_MODE_SWITCH_EN) {
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if (vdin_dbg_en)
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/* make sure phase lock for next few frames */
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pr_info("switch game mode (%d-->5)\n", devp->game_mode);
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if (vlock_get_phlock_flag())
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devp->game_mode = (VDIN_GAME_MODE_0 | VDIN_GAME_MODE_2);
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phase_lock_flag++;
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if (phase_lock_flag >= game_mode_phlock_switch_frames) {
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if (vdin_dbg_en) {
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pr_info(
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"switch game mode (%d-->5), frame_cnt=%d\n",
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devp->game_mode,
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devp->frame_cnt);
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}
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devp->game_mode = (VDIN_GAME_MODE_0 |
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VDIN_GAME_MODE_2);
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}
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}
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#if 0
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if (phase_lock_flag >= game_mode_phlock_switch_frames) {
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if (!vlock_get_phlock_flag())
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phase_lock_flag = 0;
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if (vdin_dbg_en) {
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pr_info(
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"switch game mode to %d, frame_cnt=%d\n",
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devp->game_mode, devp->frame_cnt);
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}
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devp->game_mode = (VDIN_GAME_MODE_0 | VDIN_GAME_MODE_1 |
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VDIN_GAME_MODE_SWITCH_EN);
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}
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#endif
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} else {
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if ((devp->frame_cnt >= game_mode_switch_frames) &&
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(devp->game_mode & VDIN_GAME_MODE_SWITCH_EN)) {
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if (vdin_dbg_en) {
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pr_info(
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"switch game mode (%d-->5), frame_cnt=%d\n",
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devp->game_mode, devp->frame_cnt);
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}
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devp->game_mode = (VDIN_GAME_MODE_0 | VDIN_GAME_MODE_2);
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}
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}
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}
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/* prepare for next input data */
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/* prepare for next input data */
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@@ -400,5 +400,7 @@ extern bool is_dolby_vision_enable(void);
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extern void vdin_debugfs_init(struct vdin_dev_s *vdevp);
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extern void vdin_debugfs_init(struct vdin_dev_s *vdevp);
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extern void vdin_debugfs_exit(struct vdin_dev_s *vdevp);
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extern void vdin_debugfs_exit(struct vdin_dev_s *vdevp);
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extern bool vlock_get_phlock_flag(void);
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#endif /* __TVIN_VDIN_DRV_H */
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#endif /* __TVIN_VDIN_DRV_H */
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