diff --git a/arch/arm/boot/dts/exynos5422-odroidhc1-trip-points.dtsi b/arch/arm/boot/dts/exynos5422-odroidhc1-trip-points.dtsi new file mode 100644 index 000000000000..e2510b5e975a --- /dev/null +++ b/arch/arm/boot/dts/exynos5422-odroidhc1-trip-points.dtsi @@ -0,0 +1,84 @@ +/* + * Device tree sources for default OdroidXU3/Exynos5422 thermal zone definition + * + * Copyright (c) 2015 Lukasz Majewski + * Anand Moon + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#define _TOKENPASTE(x, y) x ## y +#define TOKENPASTE(x, y) _TOKENPASTE(x, y) +#define UNIQIFY(label) TOKENPASTE(label, CPU_THERMAL_ZONE_NUM) + + trips { + UNIQIFY(cpu_alert0): cpu-alert-0 { + temperature = <80000>; /* millicelsius */ + hysteresis = <2500>; /* millicelsius */ + type = "passive"; + irq-mode; + }; + UNIQIFY(cpu_alert1): cpu-alert-1 { + temperature = <85000>; /* millicelsius */ + hysteresis = <2500>; /* millicelsius */ + type = "passive"; + irq-mode; + }; + UNIQIFY(cpu_alert2): cpu-alert-2 { + temperature = <90000>; /* millicelsius */ + hysteresis = <2500>; /* millicelsius */ + type = "passive"; + irq-mode; + }; + UNIQIFY(cpu_criti0): cpu-crit-0 { + temperature = <120000>; /* millicelsius */ + hysteresis = <0>; /* millicelsius */ + type = "critical"; + irq-mode; + }; + }; + cooling-maps { + /* + * When reaching cpu_alert0, reduce A15 cores by 4 steps. + * The top frequency causes high thermals on multithreaded workloads + * so better performance is gained by managing it out early. + */ + map0 { + trip = <&UNIQIFY(cpu_alert0)>; + cooling-device = <&cpu4 0 4>, + <&cpu5 0 4>, + <&cpu6 0 4>, + <&cpu7 0 4>; + }; + /* + * When reaching cpu_alert1, reduce A15 cores by 4 more steps + * to further manage the performance level while keeping + * thermals under control. + */ + map1 { + trip = <&UNIQIFY(cpu_alert1)>; + cooling-device = <&cpu4 5 8>, + <&cpu5 5 8>, + <&cpu6 5 8>, + <&cpu7 5 8>; + }; + /* + * When reaching cpu_alert2, reduce all CPUs to ensure thermal + * safety. A7 cores don't produce much thermal load so they are + * reduced less to optimise performance. + */ + map2 { + trip = <&UNIQIFY(cpu_alert2)>; + cooling-device = <&cpu0 0 4>, + <&cpu1 0 4>, + <&cpu2 0 4>, + <&cpu3 0 4>, + <&cpu4 9 12>, + <&cpu5 9 12>, + <&cpu6 9 12>, + <&cpu7 9 12>; + }; + }; diff --git a/arch/arm/boot/dts/exynos5422-odroidhc1.dts b/arch/arm/boot/dts/exynos5422-odroidhc1.dts index d271e7548826..9a2c3638d95d 100644 --- a/arch/arm/boot/dts/exynos5422-odroidhc1.dts +++ b/arch/arm/boot/dts/exynos5422-odroidhc1.dts @@ -30,190 +30,27 @@ thermal-zones { cpu0_thermal: cpu0-thermal { thermal-sensors = <&tmu_cpu0 0>; - trips { - cpu0_alert0: cpu-alert-0 { - temperature = <70000>; /* millicelsius */ - hysteresis = <10000>; /* millicelsius */ - type = "active"; - }; - cpu0_alert1: cpu-alert-1 { - temperature = <85000>; /* millicelsius */ - hysteresis = <10000>; /* millicelsius */ - type = "active"; - }; - cpu0_crit0: cpu-crit-0 { - temperature = <120000>; /* millicelsius */ - hysteresis = <0>; /* millicelsius */ - type = "critical"; - }; - }; - - cooling-maps { - /* - * When reaching cpu0_alert0, reduce CPU - * by 2 steps. On Exynos5422/5800 that would - * be: 1600 MHz and 1100 MHz. - */ - map0 { - trip = <&cpu0_alert0>; - cooling-device = <&cpu0 0 2>, - <&cpu1 0 2>, - <&cpu2 0 2>, - <&cpu3 0 2>, - <&cpu4 0 2>, - <&cpu5 0 2>, - <&cpu6 0 2>, - <&cpu7 0 2>; - }; - /* - * When reaching cpu0_alert1, reduce CPU - * further, down to 600 MHz (12 steps for big, - * 7 steps for LITTLE). - */ - map1 { - trip = <&cpu0_alert1>; - cooling-device = <&cpu0 3 7>, - <&cpu1 3 7>, - <&cpu2 3 7>, - <&cpu3 3 7>, - <&cpu4 3 12>, - <&cpu5 3 12>, - <&cpu6 3 12>, - <&cpu7 3 12>; - }; - }; + #define CPU_THERMAL_ZONE_NUM 0 + #include "exynos5422-odroidhc1-trip-points.dtsi" + #undef CPU_THERMAL_ZONE_NUM }; cpu1_thermal: cpu1-thermal { thermal-sensors = <&tmu_cpu1 0>; - trips { - cpu1_alert0: cpu-alert-0 { - temperature = <70000>; - hysteresis = <10000>; - type = "active"; - }; - cpu1_alert1: cpu-alert-1 { - temperature = <85000>; - hysteresis = <10000>; - type = "active"; - }; - cpu1_crit0: cpu-crit-0 { - temperature = <120000>; - hysteresis = <0>; - type = "critical"; - }; - }; - cooling-maps { - map0 { - trip = <&cpu1_alert0>; - cooling-device = <&cpu0 0 2>, - <&cpu1 0 2>, - <&cpu2 0 2>, - <&cpu3 0 2>, - <&cpu4 0 2>, - <&cpu5 0 2>, - <&cpu6 0 2>, - <&cpu7 0 2>; - }; - map1 { - trip = <&cpu1_alert1>; - cooling-device = <&cpu0 3 7>, - <&cpu1 3 7>, - <&cpu2 3 7>, - <&cpu3 3 7>, - <&cpu4 3 12>, - <&cpu5 3 12>, - <&cpu6 3 12>, - <&cpu7 3 12>; - }; - }; + #define CPU_THERMAL_ZONE_NUM 1 + #include "exynos5422-odroidhc1-trip-points.dtsi" + #undef CPU_THERMAL_ZONE_NUM }; cpu2_thermal: cpu2-thermal { thermal-sensors = <&tmu_cpu2 0>; - trips { - cpu2_alert0: cpu-alert-0 { - temperature = <70000>; - hysteresis = <10000>; - type = "active"; - }; - cpu2_alert1: cpu-alert-1 { - temperature = <85000>; - hysteresis = <10000>; - type = "active"; - }; - cpu2_crit0: cpu-crit-0 { - temperature = <120000>; - hysteresis = <0>; - type = "critical"; - }; - }; - cooling-maps { - map0 { - trip = <&cpu2_alert0>; - cooling-device = <&cpu0 0 2>, - <&cpu1 0 2>, - <&cpu2 0 2>, - <&cpu3 0 2>, - <&cpu4 0 2>, - <&cpu5 0 2>, - <&cpu6 0 2>, - <&cpu7 0 2>; - }; - map1 { - trip = <&cpu2_alert1>; - cooling-device = <&cpu0 3 7>, - <&cpu1 3 7>, - <&cpu2 3 7>, - <&cpu3 3 7>, - <&cpu4 3 12>, - <&cpu5 3 12>, - <&cpu6 3 12>, - <&cpu7 3 12>; - }; - }; + #define CPU_THERMAL_ZONE_NUM 2 + #include "exynos5422-odroidhc1-trip-points.dtsi" + #undef CPU_THERMAL_ZONE_NUM }; cpu3_thermal: cpu3-thermal { thermal-sensors = <&tmu_cpu3 0>; - trips { - cpu3_alert0: cpu-alert-0 { - temperature = <70000>; - hysteresis = <10000>; - type = "active"; - }; - cpu3_alert1: cpu-alert-1 { - temperature = <85000>; - hysteresis = <10000>; - type = "active"; - }; - cpu3_crit0: cpu-crit-0 { - temperature = <120000>; - hysteresis = <0>; - type = "critical"; - }; - }; - cooling-maps { - map0 { - trip = <&cpu3_alert0>; - cooling-device = <&cpu0 0 2>, - <&cpu1 0 2>, - <&cpu2 0 2>, - <&cpu3 0 2>, - <&cpu4 0 2>, - <&cpu5 0 2>, - <&cpu6 0 2>, - <&cpu7 0 2>; - }; - map1 { - trip = <&cpu3_alert1>; - cooling-device = <&cpu0 3 7>, - <&cpu1 3 7>, - <&cpu2 3 7>, - <&cpu3 3 7>, - <&cpu4 3 12>, - <&cpu5 3 12>, - <&cpu6 3 12>, - <&cpu7 3 12>; - }; - }; + #define CPU_THERMAL_ZONE_NUM 3 + #include "exynos5422-odroidhc1-trip-points.dtsi" + #undef CPU_THERMAL_ZONE_NUM }; };