diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi b/arch/arm64/boot/dts/rockchip/rk3576.dtsi index 739c1e49de29..4d161f728e12 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi @@ -702,6 +702,56 @@ }; }; + dmc: dmc { + compatible = "rockchip,rk3576-dmc"; + interrupts = ; + interrupt-names = "complete"; + devfreq-events = <&dfi>; + clocks = <&scmi_clk SCLK_DDR>; + clock-names = "dmc_clk"; + operating-points-v2 = <&dmc_opp_table>; + upthreshold = <40>; + downdifferential = <20>; + system-status-level = < + /*system status freq level*/ + SYS_STATUS_NORMAL DMC_FREQ_LEVEL_MID_HIGH + SYS_STATUS_REBOOT DMC_FREQ_LEVEL_HIGH + SYS_STATUS_SUSPEND DMC_FREQ_LEVEL_LOW + SYS_STATUS_VIDEO_4K DMC_FREQ_LEVEL_MID_HIGH + SYS_STATUS_VIDEO_4K_10B DMC_FREQ_LEVEL_MID_HIGH + SYS_STATUS_VIDEO_SVEP DMC_FREQ_LEVEL_MID_HIGH + SYS_STATUS_BOOST DMC_FREQ_LEVEL_HIGH + SYS_STATUS_ISP DMC_FREQ_LEVEL_HIGH + SYS_STATUS_PERFORMANCE DMC_FREQ_LEVEL_HIGH + SYS_STATUS_DUALVIEW DMC_FREQ_LEVEL_HIGH + SYS_STATUS_HDMIRX DMC_FREQ_LEVEL_HIGH + SYS_STATUS_DEEP_SUSPEND DMC_FREQ_LEVEL_HIGH + >; + auto-freq-en = <1>; + status = "disabled"; + }; + + dmc_opp_table: dmc-opp-table { + compatible = "operating-points-v2"; + + opp-528000000 { + opp-hz = /bits/ 64 <528000000>; + opp-microvolt = <850000 850000 850000>; + }; + opp-1068000000 { + opp-hz = /bits/ 64 <1068000000>; + opp-microvolt = <850000 850000 850000>; + }; + opp-1560000000 { + opp-hz = /bits/ 64 <1560000000>; + opp-microvolt = <850000 850000 850000>; + }; + opp-2400000000 { + opp-hz = /bits/ 64 <2400000000>; + opp-microvolt = <850000 850000 850000>; + }; + }; + firmware { scmi: scmi { compatible = "arm,scmi-smc"; @@ -1408,6 +1458,11 @@ }; }; + pmu1_grf: syscon@26026000 { + compatible = "rockchip,rk3576-pmu1-grf", "syscon"; + reg = <0x0 0x26026000 0x0 0x1000>; + }; + pipe_phy0_grf: syscon@26028000 { compatible = "rockchip,rk3576-pipe-phy-grf", "syscon"; reg = <0x0 0x26028000 0x0 0x2000>; @@ -3363,6 +3418,13 @@ reg = <0x0 0x27f22100 0x0 0x20>; }; + dfi: dfi@2a000000 { + compatible = "rockchip,rk3576-dfi"; + reg = <0x00 0x2a000000 0x00 0x20000>; + rockchip,pmu_grf = <&pmu1_grf>; + status = "disabled"; + }; + pcie0: pcie@2a200000 { compatible = "rockchip,rk3576-pcie", "snps,dw-pcie"; #address-cells = <3>;