From b33cca16c9b093bc216d6695d35ddf7d856507fd Mon Sep 17 00:00:00 2001 From: Algea Cao Date: Thu, 27 Jun 2019 15:43:06 +0800 Subject: [PATCH] drm: rockchip: hdmi: check sink max_tmds_clock in mode_valid If sink max TMDS clock < 340MHz, we think the mode pixel clock greater than 340MHz should support YCbCr420, or it is a bad mode. Change-Id: I3930e943f5bdf7ca86b3e719c55e6aa57e8eff53 Signed-off-by: Algea Cao --- drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c index 1b832ed4afa8..1148286e8891 100644 --- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c @@ -255,6 +255,16 @@ dw_hdmi_rockchip_mode_valid(struct drm_connector *connector, */ if (mode->clock > INT_MAX / 1000) return MODE_BAD; + /* + * If sink max TMDS clock < 340MHz, we should check the mode pixel + * clock > 340MHz is YCbCr420 or not and whether the platform supports + * YCbCr420. + */ + if (mode->clock > 340000 && + connector->display_info.max_tmds_clock < 340000 && + (!drm_mode_is_420(&connector->display_info, mode) || + !connector->ycbcr_420_allowed)) + return MODE_BAD; if (!encoder) { const struct drm_connector_helper_funcs *funcs;