diff --git a/arch/arm64/boot/dts/rockchip/rk3576-test2-cam-dcphy0.dtsi b/arch/arm64/boot/dts/rockchip/rk3576-test2-cam-dcphy0.dtsi new file mode 100644 index 000000000000..e9ba8dbc2f7c --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3576-test2-cam-dcphy0.dtsi @@ -0,0 +1,173 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2024 Rockchip Electronics Co., Ltd. + * + */ + +&csi2_dcphy0 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + mipi_in_ucam5: endpoint@6 { + reg = <6>; + remote-endpoint = <&ov50c40_out>; + data-lanes = <1 2 3>; + }; + }; + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + csidcphy0_out: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi0_csi2_input>; + }; + }; + }; +}; + +&i2c8 { + status = "okay"; + pinctrl-0 = <&i2c8m3_xfer>; + + aw8601: aw8601@c { + compatible = "awinic,aw8601"; + status = "okay"; + reg = <0x0c>; + rockchip,vcm-start-current = <56>; + rockchip,vcm-rated-current = <96>; + rockchip,vcm-step-mode = <4>; + rockchip,camera-module-index = <0>; + rockchip,camera-module-facing = "back"; + }; + + ov50c40: ov50c40@36 { + compatible = "ovti,ov50c40"; + status = "okay"; + reg = <0x36>; + clocks = <&cru CLK_MIPI_CAMERAOUT_M0>; + clock-names = "xvclk"; + pinctrl-names = "default"; + pinctrl-0 = <&cam_clk0m0_clk0>; + power-domains = <&power RK3576_PD_VI>; + avdd-supply = <&vcc_mipicsi0>; + reset-gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_LOW>; + pwdn-gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_LOW>; + rockchip,camera-module-index = <0>; + rockchip,camera-module-facing = "back"; + rockchip,camera-module-name = "HZGA06"; + rockchip,camera-module-lens-name = "ZE0082C1"; + eeprom-ctrl = <&otp_eeprom>; + lens-focus = <&aw8601>; + port { + ov50c40_out: endpoint { + remote-endpoint = <&mipi_in_ucam5>; + bus-type = <1>; + data-lanes = <1 2 3>; + }; + }; + }; + + otp_eeprom: otp_eeprom@50 { + compatible = "rk,otp_eeprom"; + status = "okay"; + reg = <0x50>; + }; +}; + +&mipidcphy0 { + status = "okay"; +}; + +&mipi0_csi2 { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <0>; + + mipi0_csi2_input: endpoint@1 { + reg = <1>; + remote-endpoint = <&csidcphy0_out>; + }; + }; + + port@1 { + reg = <1>; + #address-cells = <1>; + #size-cells = <0>; + + mipi0_csi2_output: endpoint@0 { + reg = <0>; + remote-endpoint = <&cif_mipi_in0>; + }; + }; + }; +}; + +&rkcif { + status = "okay"; +}; + +&rkcif_mipi_lvds { + status = "okay"; + + port { + cif_mipi_in0: endpoint { + remote-endpoint = <&mipi0_csi2_output>; + }; + }; +}; + +&rkcif_mipi_lvds_sditf { + status = "okay"; + + port { + mipi_lvds_sditf: endpoint { + remote-endpoint = <&isp_vir0>; + }; + }; +}; + +&rkcif_mmu { + status = "okay"; +}; + +&rkisp { + status = "okay"; +}; + +&rkisp_mmu { + status = "okay"; +}; + +&rkisp_vir0 { + status = "okay"; + + port { + #address-cells = <1>; + #size-cells = <0>; + + isp_vir0: endpoint@0 { + reg = <0>; + remote-endpoint = <&mipi_lvds_sditf>; + }; + }; +}; + +&rkisp_vir0_sditf { + status = "okay"; +}; diff --git a/arch/arm64/boot/dts/rockchip/rk3576-test2-v10.dts b/arch/arm64/boot/dts/rockchip/rk3576-test2-v10.dts index 10b438f95a7d..2cb25e930114 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576-test2-v10.dts +++ b/arch/arm64/boot/dts/rockchip/rk3576-test2-v10.dts @@ -9,6 +9,7 @@ #include "rk3576.dtsi" #include "rk3576-test2.dtsi" #include "rk3576-android.dtsi" +#include "rk3576-test2-cam-dcphy0.dtsi" / { model = "Rockchip RK3576 TEST2 V10 Board"; diff --git a/arch/arm64/boot/dts/rockchip/rk3576-test2.dtsi b/arch/arm64/boot/dts/rockchip/rk3576-test2.dtsi index cc4e5984cca1..2451f0a65b63 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576-test2.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3576-test2.dtsi @@ -154,6 +154,16 @@ pinctrl-names = "default"; pinctrl-0 = <&usb_otg0_pwren>; }; + + vcc_mipicsi0: vcc-mipicsi0-regulator { + compatible = "regulator-fixed"; + gpio = <&gpio3 RK_PB6 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&mipicsi0_pwr>; + regulator-name = "vcc_mipicsi0"; + enable-active-high; + regulator-boot-on; + }; }; &backlight { @@ -806,6 +816,14 @@ }; &pinctrl { + cam { + mipicsi0_pwr: mipicsi0-pwr { + rockchip,pins = + /* camera power en */ + <3 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + lcd { lcd_rst_gpio: lcd-rst-gpio { rockchip,pins = <0 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; diff --git a/arch/arm64/boot/dts/rockchip/rk3576-vehicle-evb-v20-serdes-mfd-display-maxim-2.5k.dtsi b/arch/arm64/boot/dts/rockchip/rk3576-vehicle-evb-v20-serdes-mfd-display-maxim-2.5k.dtsi new file mode 100644 index 000000000000..9c319d96c39c --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3576-vehicle-evb-v20-serdes-mfd-display-maxim-2.5k.dtsi @@ -0,0 +1,1710 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2025 Rockchip Electronics Co., Ltd. + * + */ + +/ { + + dp2lvds_backlight0: dp2lvds_backlight0 { + compatible = "pwm-backlight"; + brightness-levels = < + 0 20 20 21 21 22 22 23 + 23 24 24 25 25 26 26 27 + 27 28 28 29 29 30 30 31 + 31 32 32 33 33 34 34 35 + 35 36 36 37 37 38 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255 + >; + default-brightness-level = <200>; + }; + + edp2lvds_backlight0: edp2lvds_backlight0 { + compatible = "pwm-backlight"; + brightness-levels = < + 0 20 20 21 21 22 22 23 + 23 24 24 25 25 26 26 27 + 27 28 28 29 29 30 30 31 + 31 32 32 33 33 34 34 35 + 35 36 36 37 37 38 38 39 + 40 41 42 43 44 45 46 47 + 48 49 50 51 52 53 54 55 + 56 57 58 59 60 61 62 63 + 64 65 66 67 68 69 70 71 + 72 73 74 75 76 77 78 79 + 80 81 82 83 84 85 86 87 + 88 89 90 91 92 93 94 95 + 96 97 98 99 100 101 102 103 + 104 105 106 107 108 109 110 111 + 112 113 114 115 116 117 118 119 + 120 121 122 123 124 125 126 127 + 128 129 130 131 132 133 134 135 + 136 137 138 139 140 141 142 143 + 144 145 146 147 148 149 150 151 + 152 153 154 155 156 157 158 159 + 160 161 162 163 164 165 166 167 + 168 169 170 171 172 173 174 175 + 176 177 178 179 180 181 182 183 + 184 185 186 187 188 189 190 191 + 192 193 194 195 196 197 198 199 + 200 201 202 203 204 205 206 207 + 208 209 210 211 212 213 214 215 + 216 217 218 219 220 221 222 223 + 224 225 226 227 228 229 230 231 + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255 + >; + default-brightness-level = <200>; + }; +}; + +&backlight { + pwms = <&pwm1_6ch_1 0 25000 0>; + //pinctrl-names = "default"; + //pinctrl-0 = <&bl0_enable_pin>; + //enable-gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&combphy0_ps { + status = "okay"; +}; + +&combphy1_psu { + status = "okay"; +}; + +&dp { + //split-mode; + force-hpd; + + status = "okay"; +}; + +&dp0 { + status = "okay"; + + ports { + port@1 { + reg = <1>; + + dp_out_i2c5_max96749: endpoint { + remote-endpoint = <&i2c5_max96749_from_dp>; + }; + }; + }; +}; + +&dp0_in_vp0 { + status = "okay"; +}; + +&dp0_in_vp1 { + status = "disabled"; +}; + +&dp0_in_vp2 { + status = "disabled"; +}; + +&dp2lvds_backlight0 { + pwms = <&i2c5_r7f701_pwm 0 25000 0>; + //pinctrl-names = "default"; + //pinctrl-0 = <&bl2_enable_pin>; + //enable-gpios = <&gpio3 RK_PC4 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +/* + * mipi_dcphy needs to be enabled + * when dsi is enabled + */ +&dsi { + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + + dsi_out_i2c8_max96789: endpoint { + remote-endpoint = <&i2c8_max96789_from_dsi>; + }; + }; + }; +}; + +&dsi_in_vp0 { + status = "disabled"; +}; + +&dsi_in_vp1 { + status = "okay"; +}; + +&dsi_in_vp2 { + status = "disabled"; +}; + +&edp { + //split-mode; + force-hpd; + status = "disabled"; + + ports { + port@1 { + reg = <1>; + + edp_out_i2c3_max96749: endpoint { + remote-endpoint = <&i2c3_max96749_from_edp>; + }; + }; + }; + +}; + +&edp_in_vp0 { + status = "disabled"; +}; + +&edp_in_vp1 { + status = "disabled"; +}; + +&edp_in_vp2 { + status = "disabled"; +}; + +&edp2lvds_backlight0 { + pwms = <&pwm0_2ch_0 0 25000 0>; + //pinctrl-names = "default"; + //pinctrl-0 = <&bl4_enable_pin>; + //enable-gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; + status = "disabled"; +}; + +&hdmi { + status = "disabled"; +}; + + +&hdptxphy { + status = "disabled"; +}; + +&hdptxphy_hdmi { + status = "okay"; +}; + + +&i2c8 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c8m2_xfer>; + clock-frequency = <400000>; + + i2c8_max96789: i2c8-max96789@42 { + compatible = "maxim,max96789"; + reg = <0x42>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c8_serdes_pins>; + lock-gpios = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>; + sel-mipi; + id-serdes-bridge-split = <0x01>; + status = "okay"; + + serdes-init-sequence = [ + //Independent 11_07_17-56 Using MAX96789/91/F (GMSL-1/2) + //Disable Video pipe + 0002 0003 + //Address Value of I2C SRC_A + 0042 008a + //Address Value of I2C DST_A + 0043 008a + //Address Value of I2C SRC_B + 0044 008c + //Address Value of I2C DST_B + 0045 008c + //Set Stream for DSI Port A && assign pipeX + 0053 0010 + //Set Stream for DSI Port B && assign pipeY + 0057 0021 + //Clock Select, X for portA, Y/Z for PortB + 0308 0076 + //Start DSI-A Port + 0311 0001 + //Set Port A Lane Mapping + 0332 004E + //Set Port B Lane Mapping + 0333 00E4 + //Set GMSL type + 0004 00F2 + //Number of Lanes + 0331 0033 + //Set phy_config + 0330 0006 + //Set soft_dtx_en + 031C 0098 + //Set soft_dtx + 0321 0024 + //Set soft_dty_en + 031D 0098 + //Set soft_dty_ + 0322 0024 + //Init Default + 0326 00E4 + //HSYNC_WIDTH_L + 0385 0038 + //VSYNC_WIDTH_L + 0386 0008 + //HSYNC_WIDTH_H/VSYNC_WIDTH_H + 0387 0000 + //VFP_L + 03A5 00C8 + //VBP_H + 03A7 0000 + //VFP_H/VBP_L + 03A6 0020 + //VRES_L + 03A8 00D0 + //VRES_H + 03A9 0002 + //HFP_L + 03AA 0038 + //HBP_H + 03AC 0002 + //HFP_H/HBP_L + 03AB 0000 + //HRES_L + 03AD 0080 + //HRES_H + 03AE 0007 + //Disable FIFO/DESKEW_EN + 03A4 00C0 + //HSYNC_WIDTH_L + 0395 0038 + //VSYNC_WIDTH_L + 0396 0008 + //HSYNC_WIDTH_H/VSYNC_WIDTH_H + 0397 0000 + //VFP_L + 03B1 00C8 + //VBP_H + 03B3 0000 + //VFP_H/VBP_L + 03B2 0020 + //VRES_L + 03B4 00D0 + //VRES_H + 03B5 0002 + //HFP_L + 03B6 0038 + //HBP_H + 03B8 0002 + //HFP_H/HBP_L + 03B7 0000 + //HRES_L + 03B9 0080 + //HRES_H + 03BA 0007 + //Disable FIFO/DESKEW_EN + 03B0 00C0 + //Turn on video pipe + 0002 0033 + //Enable splitter mode reset one shot + 0010 0021 + ffff f000 //0xf000 ms delay + ]; + + i2c8_max96789_pinctrl: i2c8-max96789-pinctrl { + compatible = "maxim,max96789-pinctrl"; + pinctrl-names = "init","sleep"; + pinctrl-0 = <&i2c8_max96789_pinctrl_pins>; + pinctrl-1 = <&i2c8_max96789_pinctrl_pins>; + status = "okay"; + i2c8_max96789_pinctrl_pins: pinctrl-pins { + i2c { + groups = "MAX96789_I2C"; + function = "MAX96789_I2C"; + }; + lcd-bl-pwm { + pins = "MAX96789_MFP7"; + function = "SER_TXID4_TO_DES"; + }; + tp-int { + pins = "MAX96789_MFP8"; + function = "DES_RXID8_TO_SER"; + }; + lcd-bl-pwm-split { + pins = "MAX96789_MFP16"; + function = "SER_TXID4_TO_DES"; + }; + tp-int-split { + pins = "MAX96789_MFP14"; + function = "DES_RXID14_TO_SER"; + }; + }; + + i2c8_max96789_gpio: i2c8-max96789-gpio { + compatible = "maxim,max96789-gpio"; + status = "okay"; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&i2c8_max96789_pinctrl 0 160 20>; + }; + }; + + i2c8_max96789_bridge: i2c8-max96789-bridge { + compatible = "maxim,max96789-bridge"; + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + i2c8_max96789_from_dsi: endpoint { + remote-endpoint = <&dsi_out_i2c8_max96789>; + }; + }; + + port@1 { + reg = <1>; + i2c8_max96789_out_i2c8_max96752: endpoint { + remote-endpoint = <&i2c8_max96752_from_i2c8_max96789>; + }; + }; + }; + }; + + }; + + i2c8_max96752: i2c8-max96752@4a { + compatible = "maxim,max96752"; + reg = <0x4a>; + //reg-hw = <0x4a>; + id-serdes-panel-split = <0x01>; + link = <0x01>; + status = "okay"; + + serdes-init-sequence = [ + /*max96752 dual oLDI output*/ + 0002 0043 + 0073 0031 + 007b 0031 + 007d 0038 + //Address Value of I2C SRC_A + 0042 008a + //Address Value of I2C DST_A + 0043 0090 + + 0050 0000 + 01ce 004e + 01ea 0004 + ]; + + i2c8_max96752_pinctrl: i2c8-max96752-pinctrl { + compatible = "maxim,max96752-pinctrl"; + pinctrl-names = "default","init","sleep"; + pinctrl-0 = <&i2c8_max96752_panel_pins>; + pinctrl-1 = <&i2c8_max96752_panel_pins>; + pinctrl-2 = <&i2c8_max96752_panel_sleep_pins>; + status = "okay"; + + i2c8_max96752_panel_pins: panel-pins { + lcd-rst-pin { + pins = "MAX96752_GPIO10"; + function = "DES_TXID10_OUTPUT_HIGH"; + }; + tp-rst { + pins = "MAX96752_GPIO5"; + function = "DES_TXID5_OUTPUT_HIGH"; + }; + lcd-bias-en { + pins = "MAX96752_GPIO7"; + function = "DES_TXID7_OUTPUT_HIGH"; + }; + lcd-vdd-en { + pins = "MAX96752_GPIO6"; + function = "DES_TXID6_OUTPUT_HIGH"; + }; + tp-int { + pins = "MAX96752_GPIO2"; + function = "DES_TXID8_TO_SER"; + }; + 40ms-delay { + pins = "MAX96752_GPIO15"; + function = "DELAY_40MS"; + }; + lcd-pwr-on { + pins = "MAX96752_GPIO3"; + function = "DES_TXID3_OUTPUT_HIGH"; + }; + lcd-bl-pwm { + pins = "MAX96752_GPIO4"; + function = "SER_TO_DES_RXID4"; + }; + }; + + i2c8_max96752_panel_sleep_pins: panel-sleep-pins { + lcd-rst-pin { + pins = "MAX96752_GPIO10"; + function = "DES_TXID10_OUTPUT_LOW"; + }; + tp-rst { + pins = "MAX96752_GPIO5"; + function = "DES_TXID5_OUTPUT_LOW"; + }; + lcd-pwr-on { + pins = "MAX96752_GPIO3"; + function = "DES_TXID3_OUTPUT_LOW"; + }; + }; + + i2c8_max96752_gpio: i2c8-max96752-gpio { + compatible = "maxim,max96752-gpio"; + status = "okay"; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&i2c8_max96752_pinctrl 0 180 15>; + }; + }; + + i2c8_max96752_panel: i2c8-max96752-panel { + compatible = "maxim,max96752-panel"; + status = "okay"; + + backlight = <&backlight>; + panel-size= <346 194>; + + panel-timing { + clock-frequency = <115000000>; + hactive = <1920>; + vactive = <720>; + hfront-porch = <56>; + hsync-len = <32>; + hback-porch = <56>; + vfront-porch = <200>; + vsync-len = <2>; + vback-porch = <8>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + i2c8_max96752_from_i2c8_max96789: endpoint { + remote-endpoint = <&i2c8_max96789_out_i2c8_max96752>; + }; + }; + }; + }; + }; + + + i2c8_himax: i2c8-himax@45 { + compatible = "himax,hxcommon"; + reg = <0x45>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&touch_gpio_dsi>; + pinctrl-1 = <&touch_gpio_dsi>; + himax,location = "himax-touch-dsi"; + himax,irq-gpio = <&gpio3 RK_PA3 IRQ_TYPE_EDGE_FALLING>; + himax,rst-gpio = <&i2c8_max96752_gpio 5 GPIO_ACTIVE_LOW>; + himax,panel-coords = <0 1920 0 720>; + himax,display-coords = <0 1920 0 720>; + status = "okay"; + }; +}; + +&i2c5 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c5m3_xfer>; + clock-frequency = <400000>; + status = "okay"; + + i2c5_max96749: i2c5-max96749@42 { + compatible = "maxim,max96749"; + reg = <0x42>; + dual-link; + pinctrl-names = "default"; + pinctrl-0 = <&i2c5_serdes_pins>; + lock-gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + serdes-init-sequence = [ + //Set TX_STR_SEL_X to 0 + 00A3 0000 + //Set TX_STR_SEL_Y to 1 + 00A7 0001 + //Set TX_STR_SEL_Z to 2 + 00AB 0002 + //Set TX_STR_SEL_U to 3 + 00AF 0003 + + //INFOFR TX_SRC_ID0:1:2 + 00C2 0001 + //CC TX_SRC_ID0:1:2 + 00D2 0002 + //IIC X TX_SRC_ID0:1:2 + 00EA 0001 + //IIC Y TX_SRC_ID0:1:2 + 00F2 0002 + + 00B2 0003 + 00BA 0003 + 00CA 0003 + 00C2 0003 + 00D2 0003 + 00DA 0003 + 00E2 0003 + 00EA 0003 + 00F2 0003 + //Set X_VID_LINK_SEL to 0 + 0100 0061 + //Set Y_VID_LINK_SEL to 1 + 0110 0063 + //Set Z_VID_LINK_SEL to 0 + 0120 0061 + //Set U_VID_LINK_SEL to 1 + 0130 0063 + + //ASYM_WR_B_MUX_Y + 05CE 0037 + //ASYM_WAIT_LINE_FOR_READ_X + 04D1 00F8 + //ASYM_WAIT_LINE_FOR_READ_Y + 05D1 00F8 + //ASYM_VID_EN_W_VS_X + 04CF 00BF + //ASYM_VID_EN_W_VS_Y + 05CF 00BF + //ASYM_FR2FR_CTRL_EN_X + 04D1 00FC + //ASYM_FR2FR_CTRL_EN_Y + 05D1 00FC + //ALT_VTG_EN_X + 04CE 002F + //AUTO_VTG_CFG_X + 04CE 000F + //ALT_VTG_EN_Y + 05CE 0027 + //AUTO_VTG_CFG_Y + 05CE 0007 + //X_M_l + 04C0 0000 + //X_M_m + 04C1 00E1 + //X_M_h + 04C2 004B + //X_N_l + 04C3 00C8 + //X_N_m + 04C4 0008 + //X_N_h + 04C5 0007 + //X_X_OFFSET_l + 04C6 0000 + //X_X_OFFSET_h + 04C7 0000 + //X_X_MAX_l + 04C8 0000 + //X_X_MAX_h + 04C9 000A + //X_Y_MAX_l + 04CA 0040 + //X_Y_MAX_h + 04CB 0006 + //X_vs_dly_l + 04D8 00E0 + //X_vs_dly_m + 04D9 009E + //X_vs_dly_h + 04DA 0049 + //X_vs_high_l + 04DB 00B0 + //X_vs_high_m + 04DC 0022 + //X_vs_high_h + 04DD 0000 + //X_vs_low_l + 04DE 0070 + //X_vs_low_m + 04DF 001F + //X_vs_low_h + 04E0 0002 + //X_hs_dly_l + 04E1 0000 + //X_hs_dly_m + 04E2 0000 + //X_hs_dly_h + 04E3 0000 + //X_hs_high_l + 04E4 0020 + //X_hs_high_h + 04E5 0000 + //X_hs_low_l + 04E6 0070 + //X_hs_low_h + 04E7 000B + //X_hs_cnt_l + 04E8 0090 + //X_hs_cnt_h + 04E9 0006 + //X_hs_llow_l + 04EA 0000 + //X_hs_llow_m + 04EB 0000 + //X_hs_llow_h + 04EC 0000 + //X_de_dly_l + 04ED 0060 + //X_de_dly_m + 04EE 0001 + //X_de_dly_h + 04EF 0000 + //X_de_high_l + 04F0 0000 + //X_de_high_h + 04F1 000A + //X_de_low_l + 04F2 0090 + //X_de_low_h + 04F3 0001 + //X_de_cnt_l + 04F4 0040 + //X_de_cnt_h + 04F5 0006 + //X_de_llow_l + 04F6 00A0 + //X_de_llow_m + 04F7 009B + //X_de_llow_h + 04F8 0003 + //Y_M + 05C0 0000 + //Y_M_h + 05C1 00E1 + //Y_M_h + 05C2 004B + //Y_N_l + 05C3 00C8 + //Y_N_m + 05C4 0008 + //Y_N_h + 05C5 0007 + //Y_X_OFFSET_l + 05C6 0000 + //Y_X_OFFSET_h + 05C7 000A + //Y_X_MAX_l + 05C8 0000 + //Y_X_MAX_h + 05C9 0014 + //Y_Y_MAX_l + 05CA 0040 + //Y_Y_MAX_h + 05CB 0006 + //Y_vs_dly_l + 05D8 00E0 + //Y_vs_dly_m + 05D9 009E + //Y_vs_dly_h + 05DA 0049 + //Y_vs_high_l + 05DB 00B0 + //Y_vs_high_m + 05DC 0022 + //Y_vs_high_h + 05DD 0000 + //Y_vs_low_l + 05DE 0070 + //Y_vs_low_m + 05DF 001F + //Y_vs_low_h + 05E0 0002 + //Y_hs_dly_l + 05E1 0000 + //Y_hs_dly_m + 05E2 0000 + //Y_hs_dly_h + 05E3 0000 + //Y_hs_high_l + 05E4 0020 + //Y_hs_high_h + 05E5 0000 + //Y_hs_low_l + 05E6 0070 + //Y_hs_low_h + 05E7 000B + //Y_hs_cnt_l + 05E8 0090 + //Y_hs_cnt_h + 05E9 0006 + //Y_hs_llow_l + 05EA 0000 + //Y_hs_llow_m + 05EB 0000 + //Y_hs_llow_h + 05EC 0000 + //Y_de_dly_l + 05ED 0060 + //Y_de_dly_m + 05EE 0001 + //Y_de_dly_h + 05EF 0000 + //Y_de_high_l + 05F0 0000 + //Y_de_high_h + 05F1 000A + //Y_de_low_l + 05F2 0090 + //Y_de_low_h + 05F3 0001 + //Y_de_cnt_l + 05F4 0040 + //Y_de_cnt_h + 05F5 0006 + //Y_de_llow_l + 05F6 00A0 + //Y_de_llow_m + 05F7 009B + //Y_de_llow_h + 05F8 0003 + //X_LUT_TEMPLATE_SEL + 04CD 0014 + //Y_LUT_TEMPLATE_SEL + 05CD 0014 + + //Turn off video + 6420 0010 + //Disable MST mode + 7019 0000 + //7019 0001 //Set MST_FUNCTION_ENABLE to 1 + //7904 0001 // Set MST_PAYLOAD_ID_0 to 01 + //7908 0002 // Set MST_PAYLOAD_ID_1 to 01 + //Disable MST_VS0_DTG_ENABLE + 7A14 0000 + //Disable LINK_ENABLE + 7000 0000 + //Reset DPRX core (VIDEO_INPUT_RESET) + 7054 0001 + ffff f000 //delay 0xf000 us + //Set MAX_LINK_RATE to 2.7Gb/s + 7074 000A + //Set MAX_LINK_COUNT to 4 + 7070 0004 + //Set ASYM_CTRL_PROP_GAIN to 000A + 04D0 000A + 05D0 000A + //Set AEQ time to 16ms + 6064 0000 + 6065 0000 + 6164 0000 + 6165 0000 + 6264 0000 + 6265 0000 + 6364 0000 + 6365 0000 + //Enable LINK_ENABLE + 7000 0001 + //delay 1000 + //Disable MSA reset + 7A18 0005 + //Adjust VS0_DMA_HSYNC + 7A28 00FF + 7A2A 00FF + //Adjust VS0_DMA_VSYNC + 7A24 00FF + 7A27 000F + //Enable MST_VS0_DTG_ENABLE + 7A14 0001 + //set EDP Video Control + 6421 0001 + //Turn on video + 6420 0013 + //delay 100 + //Turn off video + 6420 0010 + //delay 100 + //Turn on video + 6420 0013 + 6421 0003 + ]; + + i2c5_max96749_pinctrl: i2c5-max96749-pinctrl { + compatible = "maxim,max96749-pinctrl"; + pinctrl-names = "init", "sleep"; + pinctrl-0 = <&i2c5_max96749_pinctrl_pins>; + pinctrl-1 = <&i2c5_max96749_pinctrl_pins>; + status = "okay"; + + i2c5_max96749_pinctrl_pins: pinctrl-pins { + i2c { + groups = "MAX96749_I2C"; + function = "MAX96749_I2C"; + }; + tp-int { + pins = "MAX96749_MFP1"; + function = "DES_RXID1_TO_SER_LINKA"; + }; + }; + + i2c5_max96749_gpio: i2c5-max96749-gpio { + compatible = "maxim,max96749-gpio"; + status = "okay"; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&i2c5_max96749_pinctrl 0 220 25>; + }; + }; + + i2c5_max96749_bridge: i2c5-max96749-bridge { + compatible = "maxim,max96749-bridge"; + status = "okay"; + }; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + i2c5_max96749_from_dp: endpoint { + remote-endpoint = <&dp_out_i2c5_max96749>; + }; + }; + + port@1 { + reg = <1>; + + i2c5_max96749_out_i2c5_max96772: endpoint { + remote-endpoint = <&i2c5_max96772_from_i2c5_max96749>; + }; + }; + }; + }; + + i2c5_max96772: i2c5-max96772@48 { + compatible = "maxim,max96772"; + reg = <0x48>; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + serdes-init-sequence = [ + + ]; + + i2c5_max96772_pinctrl: i2c5-max96772-pinctrl { + compatible = "maxim,max96772-pinctrl"; + status = "okay"; + + pinctrl-names = "init","sleep"; + pinctrl-0 = <&i2c5_max96772_panel_pins>; + pinctrl-1 = <&i2c5_max96772_panel_pins>; + + i2c5_max96772_panel_pins: panel-pins { + tp-int { + pins = "MAX96772_GPIO10"; + function = "DES_TXID1_TO_SER"; + }; + }; + + i2c5_max96772_gpio: i2c5-max96772-gpio { + compatible = "maxim,max96772-gpio"; + status = "okay"; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&i2c5_max96772_pinctrl 0 250 15>; + }; + }; + + i2c5_max96772_panel: i2c5-max96772-panel { + compatible = "maxim,max96772-panel"; + status = "okay"; + + backlight = <&dp2lvds_backlight0>; + panel-size= <324 202>; + rate-count-ssc= <10 4 0>; + + panel-timing { + clock-frequency = <298400000>; + hactive = <2560>; + vactive = <1600>; + hfront-porch = <48>; + hsync-len = <32>; + hback-porch = <320>; + vfront-porch = <30>; + vsync-len = <3>; + vback-porch = <47>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; + }; + + port { + i2c5_max96772_from_i2c5_max96749: endpoint { + remote-endpoint = <&i2c5_max96749_out_i2c5_max96772>; + }; + }; + }; + }; + + i2c5_r7f701_pwm: i2c5-r7f701-pwm@77 { + compatible = "r7f701-pwm"; + #pwm-cells = <3>; + reg = <0x77>; + status = "okay"; + }; + + i2c5_cyttsp7: i2c5-cyttsp7@24 { + compatible = "cy,cyttsp7_i2c_adapter"; + reg = <0x24>; + + status = "okay"; + cy,core { + pinctrl-names = "default"; + pinctrl-0 = <&touch_gpio_dp>; + cy,irq_gpio = <&gpio4 RK_PA0 GPIO_ACTIVE_HIGH>; + cy,rst_gpio = <&i2c5_max96772_gpio 7 GPIO_ACTIVE_HIGH>; + + cy,max_xfer_len = <0x100>; + + /* CY_CORE_FLAG_WAKE_ON_GESTURE */ + /* cy,flags = <1>; */ + /* CY_CORE_EWG_TAP_TAP | CY_CORE_EWG_TWO_FINGER_SLIDE */ + /* cy,easy_wakeup_gesture = <3>; */ + cy,btn_keys = <172 /* KEY_HOMEPAGE */ + /* previously was KEY_HOME, new Android versions use KEY_HOMEPAGE */ + 139 /* KEY_MENU */ + 158 /* KEY_BACK */ + 217 /* KEY_SEARCH */ + 114 /* KEY_VOLUMEDOWN */ + 115 /* KEY_VOLUMEUP */ + 212 /* KEY_CAMERA */ + 116>; /* KEY_POWER */ + cy,btn_keys-tag = <0>; + + cy,mt { + cy,inp_dev_name = "cyttsp7-mt-dp"; + /* CY_MT_FLAG_FLIP | CY_MT_FLAG_INV_X | CY_MT_FLAG_INV_Y */ + cy,flags = <0x20>; + cy,abs = + /* ABS_MT_POSITION_X, CY_ABS_MIN_X, CY_ABS_MAX_X, 0, 0 */ + < + 0x35 0 2560 0 0 + /* ABS_MT_POSITION_Y, CY_ABS_MIN_Y, CY_ABS_MAX_Y, 0, 0 */ + 0x36 0 1600 0 0 + /* ABS_MT_PRESSURE, CY_ABS_MIN_P, CY_ABS_MAX_P, 0, 0 */ + 0x3a 0 255 0 0 + /* CY_IGNORE_VALUE, CY_ABS_MIN_W, CY_ABS_MAX_W, 0, 0 */ + 0xffff 0 255 0 0 + /* ABS_MT_TRACKING_ID, CY_ABS_MIN_T, CY_ABS_MAX_T, 0, 0 */ + 0x39 0 15 0 0 + /* ABS_MT_TOUCH_MAJOR, 0, 255, 0, 0 */ + 0x30 0 255 0 0 + /* ABS_MT_TOUCH_MINOR, 0, 255, 0, 0 */ + 0x31 0 255 0 0 + /* ABS_MT_ORIENTATION, -127, 127, 0, 0 */ + 0x34 0xffffff81 127 0 0 + /* ABS_MT_TOOL_TYPE, 0, MT_TOOL_MAX, 0, 0 */ + 0x37 0 1 0 0 + /* ABS_DISTANCE, 0, 255, 0, 0 */ + 0x19 0 255 0 0 + /* SRI:ABS_MT_DISTANCE, 0,MAX, 0, 0 */ + 0x3b 0 255 0 0>; + + cy,vkeys_x = <2560>; + cy,vkeys_y = <1600>; + + cy,virtual_keys = /* KeyCode CenterX CenterY Width Height */ + /* KEY_BACK */ + <158 1360 90 160 180 + /* KEY_MENU */ + 139 1360 270 160 180 + /* KEY_HOMEPAGE */ + 172 1360 450 160 180 + /* KEY SEARCH */ + 217 1360 630 160 180>; + }; + + cy,btn { + cy,inp_dev_name = "cyttsp7-btn-dp"; + }; + + cy,proximity { + cy,inp_dev_name = "cyttsp7-proximity-dp"; + cy,abs = + /* ABS_DISTANCE, CY_PROXIMITY_MIN_VAL, CY_PROXIMITY_MAX_VAL, 0, 0 */ + <0x19 0 1 0 0>; + }; + }; + }; +}; + +&i2c3 { + pinctrl-0 = <&i2c3m0_xfer>; + clock-frequency = <400000>; + status = "okay"; + + i2c3_max96749: i2c3-max96749@42 { + compatible = "maxim,max96749"; + reg = <0x42>; + pinctrl-names = "default"; + pinctrl-0 = <&i2c3_serdes_pins>; + lock-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; + #address-cells = <1>; + #size-cells = <0>; + id-serdes-bridge-split = <0x02>; + status = "disabled"; + + serdes-init-sequence = [ + //Address Value of I2C SRC_A + 0042 008a + //Address Value of I2C DST_A + 0043 008a + //Address Value of I2C SRC_B + 0044 008c + //Address Value of I2C DST_B + 0045 008c + //Set TX_STR_SEL_X to 0 + 00A3 0000 + //Set TX_STR_SEL_Y to 1 + 00A7 0001 + //Set TX_STR_SEL_Z to 2 + 00AB 0002 + //Set TX_STR_SEL_U to 3 + 00AF 0003 + + //INFOFR TX_SRC_ID0:1:2 + 00C2 0001 + //CC TX_SRC_ID0:1:2 + 00D2 0002 + //IIC X TX_SRC_ID0:1:2 + 00EA 0001 + //IIC Y TX_SRC_ID0:1:2 + 00F2 0002 + + 00B2 0003 + 00BA 0003 + 00CA 0003 + 00C2 0003 + 00D2 0003 + 00DA 0003 + 00E2 0003 + 00EA 0003 + 00F2 0003 + //Set X_VID_LINK_SEL to 0 + 0100 0061 + //Set Y_VID_LINK_SEL to 1 + 0110 0063 + //Set Z_VID_LINK_SEL to 0 + 0120 0061 + //Set U_VID_LINK_SEL to 1 + 0130 0063 + //ASYM_WR_B_MUX_Y of SER will be written 1 + 05CE 003F + //ASYM_WAIT_LINE_FOR_READ_X of SER will be written 1 + 04D1 00F8 + //ASYM_WAIT_LINE_FOR_READ_Y of SER will be written 1 + 05D1 00F8 + //ASYM_VID_EN_W_VS_X of SER will be written 1 + 04CF 00BF + //ASYM_VID_EN_W_VS_Y of SER will be written 1 + 05CF 00BF + //ASYM_FR2FR_CTRL_EN_X of SER will be written 1 + 04D1 00FC + //ASYM_FR2FR_CTRL_EN_Y of SER will be written 1 + 05D1 00FC + //ALT_VTG_EN_X + 04CE 002F + //AUTO_VTG_CFG_X + 04CE 000F + //ALT_VTG_EN_Y + 05CE 0027 + //AUTO_VTG_CFG_Y + 05CE 0007 + //X_M_l + 04C0 0020 + //X_M_m + 04C1 004A + //X_M_h + 04C2 001D + //X_N_l + 04C3 00C8 + //X_N_m + 04C4 0008 + //X_N_h + 04C5 0007 + //X_X_OFFSET_l + 04C6 0000 + //X_X_OFFSET_h + 04C7 0000 + //X_X_MAX_l + 04C8 0080 + //X_X_MAX_h + 04C9 0007 + //X_Y_MAX_l + 04CA 00D0 + //X_Y_MAX_h + 04CB 0002 + //Y_M + 05C0 0020 + //Y_M_h + 05C1 004A + //Y_M_h + 05C2 001D + //Y_N_l + 05C3 00C8 + //Y_N_m + 05C4 0008 + //Y_N_h + 05C5 0007 + //Y_X_OFFSET_l + 05C6 0080 + //Y_X_OFFSET_h + 05C7 0007 + //Y_X_MAX_l + 05C8 0000 + //Y_X_MAX_h + 05C9 000F + //Y_Y_MAX_l + 05CA 00D0 + //Y_Y_MAX_h + 05CB 0002 + //X_LUT_TEMPLATE_SEL + 04CD 0014 + //X_vs_dly_l + 04D8 0080 + //X_vs_dly_m + 04D9 00F9 + //X_vs_dly_h + 04DA 001C + //X_vs_high_l + 04DB 0080 + //X_vs_high_m + 04DC 0040 + //X_vs_high_h + 04DD 0000 + //X_vs_low_l + 04DE 0020 + //X_vs_low_m + 04DF 0010 + //X_vs_low_h + 04E0 0000 + //X_hs_dly_l + 04E1 0000 + //X_hs_dly_m + 04E2 0000 + //X_hs_dly_h + 04E3 0000 + //X_hs_high_l + 04E4 0038 + //X_hs_high_h + 04E5 0000 + //X_hs_low_l + 04E6 00D8 + //X_hs_low_h + 04E7 0007 + //X_hs_cnt_l + 04E8 00A2 + //X_hs_cnt_h + 04E9 0003 + //X_hs_llow_l + 04EA 0000 + //X_hs_llow_m + 04EB 0000 + //X_hs_llow_h + 04EC 0000 + //X_de_dly_l + 04ED 0058 + //X_de_dly_m + 04EE 0000 + //X_de_dly_h + 04EF 0000 + //X_de_high_l + 04F0 0080 + //X_de_high_h + 04F1 0007 + //X_de_low_l + 04F2 0090 + //X_de_low_h + 04F3 0000 + //X_de_cnt_l + 04F4 00D0 + //X_de_cnt_h + 04F5 0002 + //X_de_llow_l + 04F6 00C8 + //X_de_llow_m + 04F7 009C + //X_de_llow_h + 04F8 0006 + //Y_vs_dly_l + 05D8 0080 + //Y_vs_dly_m + 05D9 00F9 + //Y_vs_dly_h + 05DA 001C + //Y_vs_high_l + 05DB 0080 + //Y_vs_high_m + 05DC 0040 + //Y_vs_high_h + 05DD 0000 + //Y_vs_low_l + 05DE 0020 + //Y_vs_low_m + 05DF 0010 + //Y_vs_low_h + 05E0 0000 + //Y_hs_dly_l + 05E1 0000 + //Y_hs_dly_m + 05E2 0000 + //Y_hs_dly_h + 05E3 0000 + //Y_hs_high_l + 05E4 0038 + //Y_hs_high_h + 05E5 0000 + //Y_hs_low_l + 05E6 00D8 + //Y_hs_low_h + 05E7 0007 + //Y_hs_cnt_l + 05E8 00A2 + //Y_hs_cnt_h + 05E9 0003 + //Y_hs_llow_l + 05EA 0000 + //Y_hs_llow_m + 05EB 0000 + //Y_hs_llow_h + 05EC 0000 + //Y_de_dly_l + 05ED 0058 + //Y_de_dly_m + 05EE 0000 + //Y_de_dly_h + 05EF 0000 + //Y_de_high_l + 05F0 0080 + //Y_de_high_h + 05F1 0007 + //Y_de_low_l + 05F2 0090 + //Y_de_low_h + 05F3 0000 + //Y_de_cnt_l + 05F4 00D0 + //Y_de_cnt_h + 05F5 0002 + //Y_de_llow_l + 05F6 00C8 + //Y_de_llow_m + 05F7 009C + //Y_de_llow_h + 05F8 0006 + //Y_LUT_TEMPLATE_SEL + 05CD 0014 + //Turn off video + 6420 0010 + //Disable MST mode + 7019 0000 + //7019 0001 //Set MST_FUNCTION_ENABLE to 1 + //7904 0001 // Set MST_PAYLOAD_ID_0 to 01 + //7908 0002 // Set MST_PAYLOAD_ID_1 to 01 + //Disable MST_VS0_DTG_ENABLE + 7A14 0000 + //Disable LINK_ENABLE + 7000 0000 + //Reset DPRX core (VIDEO_INPUT_RESET) + 7054 0001 + ffff f000 //delay 0xf000 us + //Set MAX_LINK_RATE to 2.7Gb/s + 7074 000A + //Set MAX_LINK_COUNT to 4 + 7070 0004 + //Set ASYM_CTRL_PROP_GAIN to 000A + 04D0 000A + 05D0 000A + //Set AEQ time to 16ms + 6064 0000 + 6065 0000 + 6164 0000 + 6165 0000 + 6264 0000 + 6265 0000 + 6364 0000 + 6365 0000 + //Enable LINK_ENABLE + 7000 0001 + //delay 1000 + //Disable MSA reset + 7A18 0005 + //Adjust VS0_DMA_HSYNC + 7A28 00FF + 7A2A 00FF + //Adjust VS0_DMA_VSYNC + 7A24 00FF + 7A27 000F + //Enable MST_VS0_DTG_ENABLE + 7A14 0001 + //set EDP Video Control + 6421 0001 + //Turn on video + 6420 0013 + //delay 100 + //Turn off video + 6420 0010 + //delay 100 + //Turn on video + 6420 0013 + 6421 0003 + ]; + + i2c3_max96749_pinctrl: i2c3-max96749-pinctrl { + compatible = "maxim,max96749-pinctrl"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c45_max96749_pinctrl_pins>; + status = "disabled"; + + i2c45_max96749_pinctrl_pins: pinctrl-pins { + i2c { + groups = "MAX96749_I2C"; + function = "MAX96749_I2C"; + }; + lcd-bl-pwm { + pins = "MAX96749_MFP0"; + function = "SER_TXID4_TO_DES_LINKA"; + }; + tp-int { + pins = "MAX96749_MFP1"; + function = "DES_RXID1_TO_SER_LINKA"; + }; + lcd-bl-pwm-split { + pins = "MAX96749_MFP4"; + function = "SER_TXID4_TO_DES_LINKB"; + }; + tp-int-split { + pins = "MAX96749_MFP5"; + function = "DES_RXID5_TO_SER_LINKB"; + }; + }; + + i2c3_max96749_gpio: i2c3-max96749-gpio { + compatible = "maxim,max96749-gpio"; + status = "disabled"; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&i2c3_max96749_pinctrl 0 280 25>; + }; + }; + + i2c3_max96749_bridge: i2c3-max96749-bridge { + compatible = "maxim,max96749-bridge"; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + i2c3_max96749_from_edp: endpoint { + remote-endpoint = <&edp_out_i2c3_max96749>; + }; + }; + + port@1 { + reg = <1>; + + i2c3_max96749_out_i2c3_max96752: endpoint { + remote-endpoint = <&i2c3_max96752_from_i2c3_max96749>; + }; + }; + }; + }; + }; + + i2c3_max96752: i2c3-max96752@4a { + compatible = "maxim,max96752"; + reg = <0x4a>; + #address-cells = <1>; + #size-cells = <0>; + id-serdes-panel-split = <0x02>; + link = <0x01>; + status = "disabled"; + + serdes-init-sequence = [ + /*max96752 dual oLDI output*/ + 0002 0043 + 0073 0031 + 007b 0031 + 007d 0038 + //Address Value of I2C SRC_A + 0042 008a + //Address Value of I2C DST_A + 0043 0090 + + 0050 0000 + 01ce 004e + 01ea 0004 + ]; + + i2c3_max96752_pinctrl: i2c3-max96752-pinctrl { + compatible = "maxim,max96752-pinctrl"; + status = "disabled"; + + pinctrl-names = "default","init","sleep"; + pinctrl-0 = <&i2c3_max96752_panel_pins>; + pinctrl-1 = <&i2c3_max96752_panel_pins>; + pinctrl-2 = <&i2c3_max96752_panel_sleep_pins>; + + i2c3_max96752_panel_pins: panel-pins { + lcd-rst-pin { + pins = "MAX96752_GPIO10"; + function = "DES_TXID10_OUTPUT_HIGH"; + }; + tp-rst { + pins = "MAX96752_GPIO5"; + function = "DES_TXID5_OUTPUT_HIGH"; + }; + tp-int { + pins = "MAX96752_GPIO2"; + function = "DES_TXID1_TO_SER"; + }; + 40ms-delay { + pins = "MAX96752_GPIO15"; + function = "DELAY_40MS"; + }; + lcd-pwr-on { + pins = "MAX96752_GPIO3"; + function = "DES_TXID3_OUTPUT_HIGH"; + }; + lcd-bl-pwm { + pins = "MAX96752_GPIO4"; + function = "SER_TO_DES_RXID4"; + }; + lcd_bias_en { + pins = "MAX96752_GPIO7"; + function = "DES_TXID7_OUTPUT_HIGH"; + }; + lcd_vdd_en { + pins = "MAX96752_GPIO6"; + function = "DES_TXID6_OUTPUT_HIGH"; + }; + }; + + i2c3_max96752_panel_sleep_pins: panel-sleep-pins { + lcd-rst-pin { + pins = "MAX96752_GPIO10"; + function = "DES_TXID10_OUTPUT_LOW"; + }; + + tp-rst { + pins = "MAX96752_GPIO5"; + function = "DES_TXID5_OUTPUT_LOW"; + }; + + lcd-pwr-on { + pins = "MAX96752_GPIO3"; + function = "DES_TXID3_OUTPUT_LOW"; + }; + }; + + i2c3_max96752_gpio: i2c3-max96752-gpio { + compatible = "maxim,max96752-gpio"; + status = "disabled"; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&i2c3_max96752_pinctrl 0 305 15>; + }; + }; + + i2c3_max96752_panel: i2c3-max96752-panel { + compatible = "maxim,max96752-panel"; + status = "disabled"; + + backlight = <&edp2lvds_backlight0>; + panel-size= <346 194>; + + panel-timing { + clock-frequency = <115000000>; + hactive = <1920>; + vactive = <720>; + hfront-porch = <56>; + hsync-len = <32>; + hback-porch = <56>; + vfront-porch = <200>; + vsync-len = <2>; + vback-porch = <8>; + hsync-active = <0>; + vsync-active = <0>; + de-active = <0>; + pixelclk-active = <0>; + }; + + port { + i2c3_max96752_from_i2c3_max96749: endpoint { + remote-endpoint = <&i2c3_max96749_out_i2c3_max96752>; + }; + }; + }; + }; + + i2c3_himax: i2c3-himax@45 { + compatible = "himax,hxcommon"; + reg = <0x45>; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&touch_gpio_edp>; + pinctrl-1 = <&touch_gpio_edp>; + himax,location = "himax-touch-edp"; + himax,irq-gpio = <&gpio3 RK_PD6 IRQ_TYPE_EDGE_FALLING>; + himax,rst-gpio = <&i2c3_max96752_gpio 5 GPIO_ACTIVE_LOW>; + himax,panel-coords = <0 1920 0 720>; + himax,display-coords = <0 1920 0 720>; + status = "disabled"; + }; +}; + +&mipidcphy0 { + status = "okay"; +}; + +&pinctrl { + serdes { + /*EDP*/ + i2c3_serdes_pins: i2c3-serdes-pins { + rockchip,pins = + <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>,/*lock*/ + <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>;/*err*/ + }; + /*DP*/ + i2c5_serdes_pins: i2c5-serdes-pins { + rockchip,pins = + <0 RK_PC3 RK_FUNC_GPIO &pcfg_pull_up>,/*err*/ + <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;/*lock*/ + }; + /*DSI*/ + i2c8_serdes_pins: i2c8-serdes-pins { + rockchip,pins = + <2 RK_PD7 RK_FUNC_GPIO &pcfg_pull_up>,/*err*/ + <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>;/*lock*/ + }; + }; +}; + +/* dsi->serdes->lvds_panel */ +&pwm1_6ch_1 { + status = "okay"; + pinctrl-0 = <&pwm1m2_ch1>; +}; + +/* dp->serdes->lvds_panel */ +&pwm2_8ch_7 { + pinctrl-0 = <&pwm2m3_ch7>; + status = "okay"; +}; + + +/* edp->serdes->lvds_panel */ +&pwm0_2ch_0 { + pinctrl-0 = <&pwm0m3_ch0>; + status = "disabled"; +}; + +&route_dp0 { + status = "disabled"; + connect = <&vp2_out_dp0>; + logo,uboot = "logo2.bmp"; + logo,kernel = "logo2.bmp"; +}; + +&route_dsi { + status = "okay"; + connect = <&vp1_out_dsi>; + logo,uboot = "logo1.bmp"; + logo,kernel = "logo1.bmp"; +}; + +&route_edp { + status = "disabled"; + connect = <&vp0_out_edp>; + logo,uboot = "logo2.bmp"; + logo,kernel = "logo2.bmp"; +}; + +&usbdp_phy { + rockchip,dp-lane-mux = <0 1 2 3>; + status = "okay"; +}; + +&usbdp_phy_dp { + status = "okay"; +}; + +&usbdp_phy_u3 { + maximum-speed = "high-speed"; + status = "okay"; +}; + +&vp0 { + assigned-clocks = <&cru DCLK_VP0>; + assigned-clock-parents = <&hdptxphy_hdmi>; +}; + +//dsi +&vp1 { + assigned-clocks = <&cru DCLK_VP1_SRC>; + assigned-clock-parents = <&cru PLL_VPLL>; +}; diff --git a/arch/arm64/configs/rk3576_vehicle.config b/arch/arm64/configs/rk3576_vehicle.config index 48d2fa06cb71..e49df7c51019 100644 --- a/arch/arm64/configs/rk3576_vehicle.config +++ b/arch/arm64/configs/rk3576_vehicle.config @@ -48,6 +48,7 @@ CONFIG_MALI_BIFROST=y # CONFIG_MFD_RKX110_X120 is not set CONFIG_MFD_SERDES_DISPLAY=y # CONFIG_PROXIMITY_DEVICE is not set +CONFIG_PWM_R7F701=y # CONFIG_R8168 is not set CONFIG_REALTEK_PHY=y # CONFIG_REGULATOR_ACT8865 is not set @@ -148,6 +149,7 @@ CONFIG_PAGE_MIGRATION_SUPPORT=y # CONFIG_ROCKCHIP_DRM_SELF_TEST is not set CONFIG_SERDES_DISPLAY_CHIP_MAXIM=y CONFIG_SERDES_DISPLAY_CHIP_MAXIM_MAX96745=y +CONFIG_SERDES_DISPLAY_CHIP_MAXIM_MAX96749=y CONFIG_SERDES_DISPLAY_CHIP_MAXIM_MAX96752=y CONFIG_SERDES_DISPLAY_CHIP_MAXIM_MAX96755=y CONFIG_SERDES_DISPLAY_CHIP_MAXIM_MAX96772=y diff --git a/drivers/gpu/drm/rockchip/dw-dp.c b/drivers/gpu/drm/rockchip/dw-dp.c index d77c05ccd6c2..53f55c73a229 100644 --- a/drivers/gpu/drm/rockchip/dw-dp.c +++ b/drivers/gpu/drm/rockchip/dw-dp.c @@ -4675,7 +4675,7 @@ static u32 *dw_dp_bridge_atomic_get_output_bus_fmts(struct drm_bridge *bridge, continue; } - if (dw_dp_is_hdr_eotf(dp->eotf_type) && fmt->bpc < 10) + if (dw_dp_is_hdr_eotf(dp->eotf_type) && fmt->bpc < 8) continue; output_fmts[j++] = fmt->bus_format; diff --git a/drivers/media/i2c/gc2093.c b/drivers/media/i2c/gc2093.c index 40a802282d20..e2592e43362c 100644 --- a/drivers/media/i2c/gc2093.c +++ b/drivers/media/i2c/gc2093.c @@ -1858,7 +1858,7 @@ static void __exit sensor_mod_exit(void) i2c_del_driver(&gc2093_i2c_driver); } -#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) && !defined(CONFIG_INITCALL_ASYNC) +#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) subsys_initcall(sensor_mod_init); #else device_initcall_sync(sensor_mod_init); diff --git a/drivers/media/i2c/gc3003.c b/drivers/media/i2c/gc3003.c index f74b27e24313..71b3bcd6870c 100644 --- a/drivers/media/i2c/gc3003.c +++ b/drivers/media/i2c/gc3003.c @@ -2056,7 +2056,7 @@ static void __exit sensor_mod_exit(void) i2c_del_driver(&gc3003_i2c_driver); } -#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) && !defined(CONFIG_INITCALL_ASYNC) +#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) subsys_initcall(sensor_mod_init); #else device_initcall_sync(sensor_mod_init); diff --git a/drivers/media/i2c/mis2031.c b/drivers/media/i2c/mis2031.c index 16f310d787c4..f2c01166f568 100644 --- a/drivers/media/i2c/mis2031.c +++ b/drivers/media/i2c/mis2031.c @@ -1640,7 +1640,7 @@ static void __exit sensor_mod_exit(void) i2c_del_driver(&mis2031_i2c_driver); } -#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) && !defined(CONFIG_INITCALL_ASYNC) +#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) subsys_initcall(sensor_mod_init); #else device_initcall_sync(sensor_mod_init); diff --git a/drivers/media/i2c/os02k10.c b/drivers/media/i2c/os02k10.c index 0a064cdd50dd..c8cb0139ab98 100644 --- a/drivers/media/i2c/os02k10.c +++ b/drivers/media/i2c/os02k10.c @@ -2282,7 +2282,7 @@ static void __exit sensor_mod_exit(void) i2c_del_driver(&os02k10_i2c_driver); } -#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) && !defined(CONFIG_INITCALL_ASYNC) +#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) subsys_initcall(sensor_mod_init); #else device_initcall_sync(sensor_mod_init); diff --git a/drivers/media/i2c/os04d10.c b/drivers/media/i2c/os04d10.c index 8527df381f75..d8c73c8dfbad 100644 --- a/drivers/media/i2c/os04d10.c +++ b/drivers/media/i2c/os04d10.c @@ -1904,7 +1904,7 @@ static void __exit sensor_mod_exit(void) i2c_del_driver(&os04d10_i2c_driver); } -#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) && !defined(CONFIG_INITCALL_ASYNC) +#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) subsys_initcall(sensor_mod_init); #else device_initcall_sync(sensor_mod_init); diff --git a/drivers/media/i2c/ps5458.c b/drivers/media/i2c/ps5458.c index 7e8f013854dd..06678f5c5544 100644 --- a/drivers/media/i2c/ps5458.c +++ b/drivers/media/i2c/ps5458.c @@ -2158,7 +2158,7 @@ static void __exit sensor_mod_exit(void) i2c_del_driver(&ps5458_i2c_driver); } -#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) && !defined(CONFIG_INITCALL_ASYNC) +#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) subsys_initcall(sensor_mod_init); #else device_initcall_sync(sensor_mod_init); diff --git a/drivers/media/i2c/sc1346.c b/drivers/media/i2c/sc1346.c index e57de10b1805..b9afb3b4d20a 100644 --- a/drivers/media/i2c/sc1346.c +++ b/drivers/media/i2c/sc1346.c @@ -1494,7 +1494,7 @@ static void __exit sensor_mod_exit(void) i2c_del_driver(&sc1346_i2c_driver); } -#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) && !defined(CONFIG_INITCALL_ASYNC) +#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) subsys_initcall(sensor_mod_init); #else device_initcall_sync(sensor_mod_init); diff --git a/drivers/media/i2c/sc200ai.c b/drivers/media/i2c/sc200ai.c index 361cc82e1314..c3dc5859d86b 100644 --- a/drivers/media/i2c/sc200ai.c +++ b/drivers/media/i2c/sc200ai.c @@ -2185,7 +2185,7 @@ static void __exit sensor_mod_exit(void) i2c_del_driver(&sc200ai_i2c_driver); } -#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) && !defined(CONFIG_INITCALL_ASYNC) +#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) subsys_initcall(sensor_mod_init); #else device_initcall_sync(sensor_mod_init); diff --git a/drivers/media/i2c/sc223a.c b/drivers/media/i2c/sc223a.c index fd82b3e854ab..566f93250148 100644 --- a/drivers/media/i2c/sc223a.c +++ b/drivers/media/i2c/sc223a.c @@ -1869,7 +1869,7 @@ static void __exit sensor_mod_exit(void) i2c_del_driver(&sc223a_i2c_driver); } -#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) && !defined(CONFIG_INITCALL_ASYNC) +#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) subsys_initcall(sensor_mod_init); #else device_initcall_sync(sensor_mod_init); diff --git a/drivers/media/i2c/sc230ai.c b/drivers/media/i2c/sc230ai.c index cf7b93f3476b..f760e61eb833 100644 --- a/drivers/media/i2c/sc230ai.c +++ b/drivers/media/i2c/sc230ai.c @@ -1888,7 +1888,7 @@ static void __exit sensor_mod_exit(void) i2c_del_driver(&sc230ai_i2c_driver); } -#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) && !defined(CONFIG_INITCALL_ASYNC) +#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) subsys_initcall(sensor_mod_init); #else device_initcall_sync(sensor_mod_init); diff --git a/drivers/media/i2c/sc2336.c b/drivers/media/i2c/sc2336.c index d2a7ca50a3b2..2ed890320e9d 100644 --- a/drivers/media/i2c/sc2336.c +++ b/drivers/media/i2c/sc2336.c @@ -1547,7 +1547,7 @@ static void __exit sensor_mod_exit(void) i2c_del_driver(&sc2336_i2c_driver); } -#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) && !defined(CONFIG_INITCALL_ASYNC) +#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) subsys_initcall(sensor_mod_init); #else device_initcall_sync(sensor_mod_init); diff --git a/drivers/media/i2c/sc301iot.c b/drivers/media/i2c/sc301iot.c index c1694b64b5c3..de2a610a9d64 100644 --- a/drivers/media/i2c/sc301iot.c +++ b/drivers/media/i2c/sc301iot.c @@ -2321,7 +2321,7 @@ static void __exit sensor_mod_exit(void) i2c_del_driver(&sc301iot_i2c_driver); } -#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) && !defined(CONFIG_INITCALL_ASYNC) +#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) subsys_initcall(sensor_mod_init); #else device_initcall_sync(sensor_mod_init); diff --git a/drivers/media/i2c/sc3336.c b/drivers/media/i2c/sc3336.c index 5d29ae76f8c3..a793df2bb7e5 100644 --- a/drivers/media/i2c/sc3336.c +++ b/drivers/media/i2c/sc3336.c @@ -1723,7 +1723,7 @@ static void __exit sensor_mod_exit(void) i2c_del_driver(&sc3336_i2c_driver); } -#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) && !defined(CONFIG_INITCALL_ASYNC) +#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) subsys_initcall(sensor_mod_init); #else device_initcall_sync(sensor_mod_init); diff --git a/drivers/media/i2c/sc3336p.c b/drivers/media/i2c/sc3336p.c index efa3b68d5e32..266b7c990fb8 100644 --- a/drivers/media/i2c/sc3336p.c +++ b/drivers/media/i2c/sc3336p.c @@ -1910,7 +1910,7 @@ static void __exit sensor_mod_exit(void) i2c_del_driver(&sc3336p_i2c_driver); } -#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) && !defined(CONFIG_INITCALL_ASYNC) +#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) subsys_initcall(sensor_mod_init); #else device_initcall_sync(sensor_mod_init); diff --git a/drivers/media/i2c/sc3338.c b/drivers/media/i2c/sc3338.c index 354c9d1e8fee..39c49b3f43e6 100644 --- a/drivers/media/i2c/sc3338.c +++ b/drivers/media/i2c/sc3338.c @@ -716,7 +716,7 @@ static long sc3338_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg) memcpy(&sc3338->cam_sw_inf->hdr_ae, (struct preisp_hdrae_exp_s *)(arg), sizeof(struct preisp_hdrae_exp_s)); break; - case RKMODULE_SET_QUICK_STREAM: + case RKMODULE_SET_QUICK_STREAM:; stream = *((u32 *)arg); @@ -1591,7 +1591,7 @@ static void __exit sensor_mod_exit(void) i2c_del_driver(&sc3338_i2c_driver); } -#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) && !defined(CONFIG_INITCALL_ASYNC) +#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) subsys_initcall(sensor_mod_init); #else device_initcall_sync(sensor_mod_init); diff --git a/drivers/media/i2c/sc401ai.c b/drivers/media/i2c/sc401ai.c index 2a3cfbe8812e..41617b3db171 100644 --- a/drivers/media/i2c/sc401ai.c +++ b/drivers/media/i2c/sc401ai.c @@ -1761,7 +1761,7 @@ static void __exit sensor_mod_exit(void) i2c_del_driver(&sc401ai_i2c_driver); } -#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) && !defined(CONFIG_INITCALL_ASYNC) +#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) subsys_initcall(sensor_mod_init); #else device_initcall_sync(sensor_mod_init); diff --git a/drivers/media/i2c/sc4336.c b/drivers/media/i2c/sc4336.c index aea5b36534ab..401a3244b8c7 100644 --- a/drivers/media/i2c/sc4336.c +++ b/drivers/media/i2c/sc4336.c @@ -1582,7 +1582,7 @@ static void __exit sensor_mod_exit(void) i2c_del_driver(&sc4336_i2c_driver); } -#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) && !defined(CONFIG_INITCALL_ASYNC) +#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) subsys_initcall(sensor_mod_init); #else device_initcall_sync(sensor_mod_init); diff --git a/drivers/media/i2c/sc4336p.c b/drivers/media/i2c/sc4336p.c index 2aa017814add..24f08209bd01 100644 --- a/drivers/media/i2c/sc4336p.c +++ b/drivers/media/i2c/sc4336p.c @@ -1575,7 +1575,7 @@ static void __exit sensor_mod_exit(void) i2c_del_driver(&sc4336p_i2c_driver); } -#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) && !defined(CONFIG_INITCALL_ASYNC) +#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) subsys_initcall(sensor_mod_init); #else device_initcall_sync(sensor_mod_init); diff --git a/drivers/media/i2c/sc450ai.c b/drivers/media/i2c/sc450ai.c index e2fbce66d7be..7bb7fd924819 100644 --- a/drivers/media/i2c/sc450ai.c +++ b/drivers/media/i2c/sc450ai.c @@ -3139,7 +3139,7 @@ static void __exit sensor_mod_exit(void) i2c_del_driver(&sc450ai_i2c_driver); } -#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) && !defined(CONFIG_INITCALL_ASYNC) +#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) subsys_initcall(sensor_mod_init); #else device_initcall_sync(sensor_mod_init); diff --git a/drivers/media/i2c/sc501ai.c b/drivers/media/i2c/sc501ai.c index 2652b8576b14..7e9468463b02 100644 --- a/drivers/media/i2c/sc501ai.c +++ b/drivers/media/i2c/sc501ai.c @@ -1422,7 +1422,7 @@ static void __exit sensor_mod_exit(void) i2c_del_driver(&sc501ai_i2c_driver); } -#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) && !defined(CONFIG_INITCALL_ASYNC) +#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) subsys_initcall(sensor_mod_init); #else device_initcall_sync(sensor_mod_init); diff --git a/drivers/media/i2c/sc5336.c b/drivers/media/i2c/sc5336.c index 9420ac158fbe..28cc740ecb16 100644 --- a/drivers/media/i2c/sc5336.c +++ b/drivers/media/i2c/sc5336.c @@ -1595,7 +1595,7 @@ static void __exit sensor_mod_exit(void) i2c_del_driver(&sc5336_i2c_driver); } -#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) && !defined(CONFIG_INITCALL_ASYNC) +#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) subsys_initcall(sensor_mod_init); #else device_initcall_sync(sensor_mod_init); diff --git a/drivers/media/i2c/sc635hai.c b/drivers/media/i2c/sc635hai.c index 2f9a4ea8a7d7..39af548b8b82 100644 --- a/drivers/media/i2c/sc635hai.c +++ b/drivers/media/i2c/sc635hai.c @@ -2964,7 +2964,7 @@ static void __exit sensor_mod_exit(void) i2c_del_driver(&sc635hai_i2c_driver); } -#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) && !defined(CONFIG_INITCALL_ASYNC) +#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) subsys_initcall(sensor_mod_init); #else device_initcall_sync(sensor_mod_init); diff --git a/drivers/media/platform/rockchip/cif/hw.c b/drivers/media/platform/rockchip/cif/hw.c index f4207b56b352..814c4555bc09 100644 --- a/drivers/media/platform/rockchip/cif/hw.c +++ b/drivers/media/platform/rockchip/cif/hw.c @@ -2076,8 +2076,8 @@ static void __exit rk_cif_plat_drv_exit(void) rkcif_csi2_hw_plat_drv_exit(); } -#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) && !defined(CONFIG_INITCALL_ASYNC) -subsys_initcall(rk_cif_plat_drv_init); +#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) +subsys_initcall_sync(rk_cif_plat_drv_init); #else #if !defined(CONFIG_VIDEO_REVERSE_IMAGE) module_init(rk_cif_plat_drv_init); diff --git a/drivers/media/platform/rockchip/isp/hw.c b/drivers/media/platform/rockchip/isp/hw.c index a450b9e35ea2..d1a8f6ffa8d2 100644 --- a/drivers/media/platform/rockchip/isp/hw.c +++ b/drivers/media/platform/rockchip/isp/hw.c @@ -1682,8 +1682,8 @@ static void __exit rkisp_hw_drv_exit(void) platform_driver_unregister(&rkisp_hw_drv); } -#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) && !defined(CONFIG_INITCALL_ASYNC) -subsys_initcall(rkisp_hw_drv_init); +#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) +subsys_initcall_sync(rkisp_hw_drv_init); #else module_init(rkisp_hw_drv_init); #endif diff --git a/drivers/media/platform/rockchip/isp/isp_params.c b/drivers/media/platform/rockchip/isp/isp_params.c index e4d159d20e75..9d7b1d657920 100644 --- a/drivers/media/platform/rockchip/isp/isp_params.c +++ b/drivers/media/platform/rockchip/isp/isp_params.c @@ -304,7 +304,6 @@ static void rkisp_params_vb2_stop_streaming(struct vb2_queue *vq) params_vdev->first_cfg_params = true; return; } - rkisp_params_disable_isp(params_vdev); /* clean module params */ params_vdev->ops->clear_first_param(params_vdev); params_vdev->rdbk_times = 0; @@ -566,9 +565,12 @@ void rkisp_params_meshbuf_free(struct rkisp_isp_params_vdev *params_vdev, u64 id void rkisp_params_stream_stop(struct rkisp_isp_params_vdev *params_vdev) { + rkisp_params_disable_isp(params_vdev); /* isp stop to free buf */ if (params_vdev->ops->stream_stop) params_vdev->ops->stream_stop(params_vdev); + if (!atomic_read(¶ms_vdev->open_cnt) && params_vdev->ops->fop_release) + params_vdev->ops->fop_release(params_vdev); } bool rkisp_params_check_bigmode(struct rkisp_isp_params_vdev *params_vdev) diff --git a/drivers/media/platform/rockchip/isp/isp_params_v32.c b/drivers/media/platform/rockchip/isp/isp_params_v32.c index 8c927f6be903..50d7631c2f39 100644 --- a/drivers/media/platform/rockchip/isp/isp_params_v32.c +++ b/drivers/media/platform/rockchip/isp/isp_params_v32.c @@ -5066,9 +5066,9 @@ static int rkisp_init_mesh_buf(struct rkisp_isp_params_vdev *params_vdev, rkisp_free_buffer(params_vdev->dev, buf); } else { is_alloc = false; - buf->dma_fd = dma_buf_fd(buf->dbuf, O_CLOEXEC); - if (buf->dma_fd < 0) + if (rkisp_buf_get_fd(ispdev, buf, false) < 0) goto err; + mesh_head = (struct isp2x_mesh_head *)buf->vaddr; } } if (is_alloc) { @@ -5079,9 +5079,9 @@ static int rkisp_init_mesh_buf(struct rkisp_isp_params_vdev *params_vdev, goto err; } mesh_head = (struct isp2x_mesh_head *)buf->vaddr; - mesh_head->stat = MESH_BUF_INIT; - mesh_head->data_oft = ALIGN(sizeof(struct isp2x_mesh_head), 16); } + mesh_head->stat = MESH_BUF_INIT; + mesh_head->data_oft = ALIGN(sizeof(struct isp2x_mesh_head), 16); buf++; } diff --git a/drivers/media/platform/rockchip/isp/isp_params_v33.c b/drivers/media/platform/rockchip/isp/isp_params_v33.c index 626f85ce1ba5..c8207681a8ce 100644 --- a/drivers/media/platform/rockchip/isp/isp_params_v33.c +++ b/drivers/media/platform/rockchip/isp/isp_params_v33.c @@ -4055,9 +4055,9 @@ static int rkisp_init_mesh_buf(struct rkisp_isp_params_vdev *params_vdev, rkisp_free_buffer(params_vdev->dev, buf); } else { is_alloc = false; - buf->dma_fd = dma_buf_fd(buf->dbuf, O_CLOEXEC); - if (buf->dma_fd < 0) + if (rkisp_buf_get_fd(ispdev, buf, false) < 0) goto err; + mesh_head = (struct isp2x_mesh_head *)buf->vaddr; } } if (is_alloc) { @@ -4068,9 +4068,9 @@ static int rkisp_init_mesh_buf(struct rkisp_isp_params_vdev *params_vdev, goto err; } mesh_head = (struct isp2x_mesh_head *)buf->vaddr; - mesh_head->stat = MESH_BUF_INIT; - mesh_head->data_oft = ALIGN(sizeof(struct isp2x_mesh_head), 16); } + mesh_head->stat = MESH_BUF_INIT; + mesh_head->data_oft = ALIGN(sizeof(struct isp2x_mesh_head), 16); buf++; } diff --git a/drivers/media/platform/rockchip/isp/isp_params_v35.c b/drivers/media/platform/rockchip/isp/isp_params_v35.c index ab834ddc5d80..177b5f600f34 100644 --- a/drivers/media/platform/rockchip/isp/isp_params_v35.c +++ b/drivers/media/platform/rockchip/isp/isp_params_v35.c @@ -4988,9 +4988,9 @@ static int rkisp_init_mesh_buf(struct rkisp_isp_params_vdev *params_vdev, rkisp_free_buffer(params_vdev->dev, buf); } else { is_alloc = false; - buf->dma_fd = dma_buf_fd(buf->dbuf, O_CLOEXEC); - if (buf->dma_fd < 0) + if (rkisp_buf_get_fd(ispdev, buf, false) < 0) goto err; + mesh_head = (struct isp2x_mesh_head *)buf->vaddr; } } if (is_alloc) { @@ -5001,11 +5001,12 @@ static int rkisp_init_mesh_buf(struct rkisp_isp_params_vdev *params_vdev, goto err; } mesh_head = (struct isp2x_mesh_head *)buf->vaddr; - mesh_head->stat = MESH_BUF_INIT; - mesh_head->data_oft = ALIGN(sizeof(struct isp2x_mesh_head), 16); + } + mesh_head->stat = MESH_BUF_INIT; + mesh_head->data_oft = ALIGN(sizeof(struct isp2x_mesh_head), 16); + if (meshsize->module_id == ISP35_MODULE_BAY3D) mesh_head->data1_oft = mesh_head->data_oft + ALIGN(priv->b3dldc_hsize * 4 * priv->b3dldch_vsize, 16); - } buf++; } diff --git a/drivers/media/platform/rockchip/isp/isp_params_v39.c b/drivers/media/platform/rockchip/isp/isp_params_v39.c index e152770dd3fd..41fecc0794fc 100644 --- a/drivers/media/platform/rockchip/isp/isp_params_v39.c +++ b/drivers/media/platform/rockchip/isp/isp_params_v39.c @@ -4430,9 +4430,9 @@ static int rkisp_init_mesh_buf(struct rkisp_isp_params_vdev *params_vdev, rkisp_free_buffer(params_vdev->dev, buf); } else { is_alloc = false; - buf->dma_fd = dma_buf_fd(buf->dbuf, O_CLOEXEC); - if (buf->dma_fd < 0) + if (rkisp_buf_get_fd(ispdev, buf, false) < 0) goto err; + mesh_head = (struct isp2x_mesh_head *)buf->vaddr; } } if (is_alloc) { @@ -4443,9 +4443,9 @@ static int rkisp_init_mesh_buf(struct rkisp_isp_params_vdev *params_vdev, goto err; } mesh_head = (struct isp2x_mesh_head *)buf->vaddr; - mesh_head->stat = MESH_BUF_INIT; - mesh_head->data_oft = ALIGN(sizeof(struct isp2x_mesh_head), 16); } + mesh_head->stat = MESH_BUF_INIT; + mesh_head->data_oft = ALIGN(sizeof(struct isp2x_mesh_head), 16); buf++; } diff --git a/drivers/media/platform/rockchip/isp/isp_params_v3x.c b/drivers/media/platform/rockchip/isp/isp_params_v3x.c index a727ab68bee2..310a4a6d1aaa 100644 --- a/drivers/media/platform/rockchip/isp/isp_params_v3x.c +++ b/drivers/media/platform/rockchip/isp/isp_params_v3x.c @@ -4497,6 +4497,7 @@ static int rkisp_init_mesh_buf(struct rkisp_isp_params_vdev *params_vdev, u32 mesh_size, buf_size; int i, ret, id = meshsize->unite_isp_id; int buf_cnt = meshsize->buf_cnt; + bool is_alloc; priv_val = params_vdev->priv_val; if (!priv_val) { @@ -4529,14 +4530,26 @@ static int rkisp_init_mesh_buf(struct rkisp_isp_params_vdev *params_vdev, buf->is_need_vaddr = true; buf->is_need_dbuf = true; buf->is_need_dmafd = true; - buf->size = buf_size; - ret = rkisp_alloc_buffer(params_vdev->dev, buf); - if (ret) { - dev_err(dev, "%s failed\n", __func__); - goto err; + is_alloc = true; + if (buf->mem_priv) { + if (buf_size > buf->size) { + rkisp_free_buffer(params_vdev->dev, buf); + } else { + is_alloc = false; + if (rkisp_buf_get_fd(ispdev, buf, false) < 0) + goto err; + mesh_head = (struct isp2x_mesh_head *)buf->vaddr; + } + } + if (is_alloc) { + buf->size = buf_size; + ret = rkisp_alloc_buffer(params_vdev->dev, buf); + if (ret) { + dev_err(dev, "%s failed\n", __func__); + goto err; + } + mesh_head = (struct isp2x_mesh_head *)buf->vaddr; } - - mesh_head = (struct isp2x_mesh_head *)buf->vaddr; mesh_head->stat = MESH_BUF_INIT; mesh_head->data_oft = ALIGN(sizeof(struct isp2x_mesh_head), 16); buf++; diff --git a/drivers/media/platform/rockchip/isp/isp_stats.c b/drivers/media/platform/rockchip/isp/isp_stats.c index 170a3a4e0e60..cc75c0dcdcb3 100644 --- a/drivers/media/platform/rockchip/isp/isp_stats.c +++ b/drivers/media/platform/rockchip/isp/isp_stats.c @@ -219,6 +219,8 @@ static void rkisp_stats_vb2_stop_streaming(struct vb2_queue *vq) stats_vdev->ae_meas_done_next = false; stats_vdev->af_meas_done_next = false; + if (stats_vdev->ops->stats_stop) + stats_vdev->ops->stats_stop(stats_vdev); } static int diff --git a/drivers/media/platform/rockchip/isp/isp_stats.h b/drivers/media/platform/rockchip/isp/isp_stats.h index 962e8c073f8d..aea0e5d1ffa1 100644 --- a/drivers/media/platform/rockchip/isp/isp_stats.h +++ b/drivers/media/platform/rockchip/isp/isp_stats.h @@ -38,6 +38,7 @@ struct rkisp_isp_stats_ops { void (*first_ddr_cfg)(struct rkisp_isp_stats_vdev *stats_vdev); void (*next_ddr_cfg)(struct rkisp_isp_stats_vdev *stats_vdev); int (*stats_tb)(struct rkisp_isp_stats_vdev *stats_vdev, struct rkisp_buffer *stats_buf); + void (*stats_stop)(struct rkisp_isp_stats_vdev *stats_vdev); }; /* diff --git a/drivers/media/platform/rockchip/isp/isp_stats_v32.c b/drivers/media/platform/rockchip/isp/isp_stats_v32.c index 9fe55848abbd..d411bac50e66 100644 --- a/drivers/media/platform/rockchip/isp/isp_stats_v32.c +++ b/drivers/media/platform/rockchip/isp/isp_stats_v32.c @@ -1146,6 +1146,21 @@ rkisp_stats_next_ddr_config_v32(struct rkisp_isp_stats_vdev *stats_vdev) rkisp_stats_update_buf(stats_vdev); } +static void rkisp_stats_stop_v32(struct rkisp_isp_stats_vdev *stats_vdev) +{ + struct rkisp_device *dev = stats_vdev->dev; + u32 val, addr; + + /* aiq crash or exit first */ + if (dev->isp_state & ISP_START && + stats_vdev->stats_buf[0].mem_priv) { + rkisp_stats_update_buf(stats_vdev); + addr = stats_vdev->stats_buf[0].dma_addr; + readl_poll_timeout(dev->hw_dev->base_addr + ISP3X_MI_3A_WR_BASE, + val, val == addr, 5000, 50000); + } +} + static struct rkisp_isp_stats_ops rkisp_isp_stats_ops_tbl = { .isr_hdl = rkisp_stats_isr_v32, .send_meas = rkisp_stats_send_meas_v32, @@ -1154,6 +1169,7 @@ static struct rkisp_isp_stats_ops rkisp_isp_stats_ops_tbl = { .stats_tb = rkisp_stats_tb_v32, .first_ddr_cfg = rkisp_stats_first_ddr_config_v32, .next_ddr_cfg = rkisp_stats_next_ddr_config_v32, + .stats_stop = rkisp_stats_stop_v32, }; void rkisp_init_stats_vdev_v32(struct rkisp_isp_stats_vdev *stats_vdev) @@ -1167,6 +1183,7 @@ void rkisp_init_stats_vdev_v32(struct rkisp_isp_stats_vdev *stats_vdev) rkisp_isp_stats_ops_tbl.stats_tb = NULL; rkisp_isp_stats_ops_tbl.first_ddr_cfg = NULL; rkisp_isp_stats_ops_tbl.next_ddr_cfg = NULL; + rkisp_isp_stats_ops_tbl.stats_stop = NULL; } stats_vdev->ops = &rkisp_isp_stats_ops_tbl; } diff --git a/drivers/media/platform/rockchip/isp/isp_stats_v33.c b/drivers/media/platform/rockchip/isp/isp_stats_v33.c index 887f90f7d487..1c77c480c8f1 100644 --- a/drivers/media/platform/rockchip/isp/isp_stats_v33.c +++ b/drivers/media/platform/rockchip/isp/isp_stats_v33.c @@ -568,6 +568,21 @@ rkisp_stats_next_ddr_config_v33(struct rkisp_isp_stats_vdev *stats_vdev) rkisp_stats_update_buf(stats_vdev); } +static void rkisp_stats_stop_v33(struct rkisp_isp_stats_vdev *stats_vdev) +{ + struct rkisp_device *dev = stats_vdev->dev; + u32 val, addr; + + /* aiq crash or exit first */ + if (dev->isp_state & ISP_START && + stats_vdev->stats_buf[0].mem_priv) { + rkisp_stats_update_buf(stats_vdev); + addr = stats_vdev->stats_buf[0].dma_addr; + readl_poll_timeout(dev->hw_dev->base_addr + ISP39_W3A_AEBIG_ADDR_SHD, + val, val == addr, 5000, 50000); + } +} + static struct rkisp_isp_stats_ops rkisp_isp_stats_ops_tbl = { .isr_hdl = rkisp_stats_isr_v33, .send_meas = rkisp_stats_send_meas_v33, @@ -575,6 +590,7 @@ static struct rkisp_isp_stats_ops rkisp_isp_stats_ops_tbl = { .stats_tb = rkisp_stats_tb_v33, .first_ddr_cfg = rkisp_stats_first_ddr_config_v33, .next_ddr_cfg = rkisp_stats_next_ddr_config_v33, + .stats_stop = rkisp_stats_stop_v33, }; void rkisp_init_stats_vdev_v33(struct rkisp_isp_stats_vdev *stats_vdev) diff --git a/drivers/media/platform/rockchip/isp/isp_stats_v35.c b/drivers/media/platform/rockchip/isp/isp_stats_v35.c index d6cf5eb7c64c..6d53d32891a4 100644 --- a/drivers/media/platform/rockchip/isp/isp_stats_v35.c +++ b/drivers/media/platform/rockchip/isp/isp_stats_v35.c @@ -862,12 +862,28 @@ rkisp_stats_next_ddr_config_v35(struct rkisp_isp_stats_vdev *stats_vdev) } } +static void rkisp_stats_stop_v35(struct rkisp_isp_stats_vdev *stats_vdev) +{ + struct rkisp_device *dev = stats_vdev->dev; + u32 val, addr; + + /* aiq crash or exit first */ + if (dev->isp_state & ISP_START && + stats_vdev->stats_buf[0].mem_priv) { + rkisp_stats_update_buf(stats_vdev); + addr = stats_vdev->stats_buf[0].dma_addr; + readl_poll_timeout(dev->hw_dev->base_addr + ISP39_W3A_AEBIG_ADDR_SHD, + val, val == addr, 5000, 50000); + } +} + static struct rkisp_isp_stats_ops rkisp_isp_stats_ops_tbl = { .isr_hdl = rkisp_stats_isr_v35, .get_stat_size = rkisp_get_stat_size_v35, .stats_tb = rkisp_stats_tb_v35, .first_ddr_cfg = rkisp_stats_first_ddr_config_v35, .next_ddr_cfg = rkisp_stats_next_ddr_config_v35, + .stats_stop = rkisp_stats_stop_v35, }; void rkisp_init_stats_vdev_v35(struct rkisp_isp_stats_vdev *stats_vdev) diff --git a/drivers/media/platform/rockchip/isp/isp_stats_v39.c b/drivers/media/platform/rockchip/isp/isp_stats_v39.c index 69672a06cb9b..48eb65ba12ad 100644 --- a/drivers/media/platform/rockchip/isp/isp_stats_v39.c +++ b/drivers/media/platform/rockchip/isp/isp_stats_v39.c @@ -536,11 +536,27 @@ rkisp_stats_next_ddr_config_v39(struct rkisp_isp_stats_vdev *stats_vdev) } } +static void rkisp_stats_stop_v39(struct rkisp_isp_stats_vdev *stats_vdev) +{ + struct rkisp_device *dev = stats_vdev->dev; + u32 val, addr; + + /* aiq crash or exit first */ + if (dev->isp_state & ISP_START && + stats_vdev->stats_buf[0].mem_priv) { + rkisp_stats_update_buf(stats_vdev); + addr = stats_vdev->stats_buf[0].dma_addr; + readl_poll_timeout(dev->hw_dev->base_addr + ISP39_W3A_AEBIG_ADDR_SHD, + val, val == addr, 5000, 50000); + } +} + static struct rkisp_isp_stats_ops rkisp_isp_stats_ops_tbl = { .isr_hdl = rkisp_stats_isr_v39, .get_stat_size = rkisp_get_stat_size_v39, .first_ddr_cfg = rkisp_stats_first_ddr_config_v39, .next_ddr_cfg = rkisp_stats_next_ddr_config_v39, + .stats_stop = rkisp_stats_stop_v39, }; void rkisp_init_stats_vdev_v39(struct rkisp_isp_stats_vdev *stats_vdev) diff --git a/drivers/misc/rockchip/Kconfig b/drivers/misc/rockchip/Kconfig index 3329c6cd9c2b..259b4f386a9d 100644 --- a/drivers/misc/rockchip/Kconfig +++ b/drivers/misc/rockchip/Kconfig @@ -10,10 +10,3 @@ config PCIE_FUNC_RKEP help Enable this configuration option to enable the host side function driver for Rockchip's EP demo function driver. - -config PCIE_FUNC_RKEP_USERPAGES - bool "EP function driver reserve continuous physical space for user layer" - depends on PCIE_FUNC_RKEP=y - help - Enable this configuration option to reserve continuous physical space - for user layer in Rockchip's EP demo function driver. diff --git a/drivers/misc/rockchip/pcie-rkep.c b/drivers/misc/rockchip/pcie-rkep.c index 5a84887d477c..5bb21adf8c33 100644 --- a/drivers/misc/rockchip/pcie-rkep.c +++ b/drivers/misc/rockchip/pcie-rkep.c @@ -89,7 +89,7 @@ static DEFINE_MUTEX(rkep_mutex); #define PCIE_DMA_CHANEL_MAX_NUM 2 -#define RKEP_USER_MEM_SIZE SZ_64M +#define RKEP_USER_MEM_SIZE SZ_4M #define PCIE_CFG_ELBI_APP_OFFSET 0xe00 #define PCIE_CFG_ELBI_USER_DATA_OFF 0x10 @@ -1333,9 +1333,7 @@ static int pcie_rkep_probe(struct pci_dev *pdev, const struct pci_device_id *id) } } -#if IS_ENABLED(CONFIG_PCIE_FUNC_RKEP_USERPAGES) - pcie_rkep->user_pages = - alloc_contig_pages(RKEP_USER_MEM_SIZE >> PAGE_SHIFT, GFP_KERNEL, 0, NULL); + pcie_rkep->user_pages = alloc_pages(GFP_KERNEL, get_order(RKEP_USER_MEM_SIZE)); if (!pcie_rkep->user_pages) { dev_err(&pcie_rkep->pdev->dev, "failed to allocate contiguous pages\n"); ret = -EINVAL; @@ -1344,8 +1342,7 @@ static int pcie_rkep_probe(struct pci_dev *pdev, const struct pci_device_id *id) goto err_register_obj; } pcie_rkep->cur_mmap_res = PCIE_EP_MMAP_RESOURCE_USER_MEM; - dev_err(&pdev->dev, "successfully allocate continuouse buffer for userspace\n"); -#endif + dev_info(&pdev->dev, "successfully allocate continuouse buffer for userspace\n"); pci_read_config_word(pcie_rkep->pdev, PCI_VENDOR_ID, &val); dev_info(&pdev->dev, "vid=%x\n", val); @@ -1387,9 +1384,7 @@ static void pcie_rkep_remove(struct pci_dev *pdev) pcie_dw_dmatest_unregister(pcie_rkep->dma_obj); device_remove_file(&pdev->dev, &dev_attr_rkep); -#if IS_ENABLED(CONFIG_PCIE_FUNC_RKEP_USERPAGES) - free_contig_range(page_to_pfn(pcie_rkep->user_pages), RKEP_USER_MEM_SIZE >> PAGE_SHIFT); -#endif + __free_pages(pcie_rkep->user_pages, get_order(RKEP_USER_MEM_SIZE)); pcie_rkep_release_irq(pcie_rkep); if (pcie_rkep->bar0) @@ -1445,6 +1440,7 @@ static const struct pci_error_handlers pcie_rkep_err_handler = { static const struct pci_device_id pcie_rkep_pcidev_id[] = { { PCI_VDEVICE(ROCKCHIP, 0x356a), 1, }, + { PCI_VDEVICE(ROCKCHIP, 0x182a), 1, }, { } }; MODULE_DEVICE_TABLE(pcie_rkep, pcie_rkep_pcidev_id); diff --git a/drivers/phy/rockchip/phy-rockchip-csi2-dphy-hw.c b/drivers/phy/rockchip/phy-rockchip-csi2-dphy-hw.c index db265f27bcd3..4e96b19ac333 100644 --- a/drivers/phy/rockchip/phy-rockchip-csi2-dphy-hw.c +++ b/drivers/phy/rockchip/phy-rockchip-csi2-dphy-hw.c @@ -1394,7 +1394,7 @@ int rockchip_csi2_dphy_hw_init(void) return platform_driver_register(&rockchip_csi2_dphy_hw_driver); } -#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) && !defined(CONFIG_INITCALL_ASYNC) +#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) subsys_initcall(rockchip_csi2_dphy_hw_init); #else #if !defined(CONFIG_VIDEO_REVERSE_IMAGE) diff --git a/drivers/phy/rockchip/phy-rockchip-csi2-dphy.c b/drivers/phy/rockchip/phy-rockchip-csi2-dphy.c index b4a976e06f18..895d0d8fe849 100644 --- a/drivers/phy/rockchip/phy-rockchip-csi2-dphy.c +++ b/drivers/phy/rockchip/phy-rockchip-csi2-dphy.c @@ -1276,8 +1276,8 @@ int rockchip_csi2_dphy_init(void) return platform_driver_register(&rockchip_csi2_dphy_driver); } -#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) && !defined(CONFIG_INITCALL_ASYNC) -subsys_initcall(rockchip_csi2_dphy_init); +#if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) +subsys_initcall_sync(rockchip_csi2_dphy_init); #else #if !defined(CONFIG_VIDEO_REVERSE_IMAGE) module_platform_driver(rockchip_csi2_dphy_driver);