diff --git a/arch/arm/boot/dts/px3se-evb.dts b/arch/arm/boot/dts/px3se-evb.dts index a5eb2b543ca0..ff8922f3c691 100644 --- a/arch/arm/boot/dts/px3se-evb.dts +++ b/arch/arm/boot/dts/px3se-evb.dts @@ -262,7 +262,7 @@ status = "okay"; }; - lvds-panel { + panel { compatible = "samsung,lsl070nl01", "simple-panel"; power-supply = <&vcc33_lcd>; backlight = <&backlight>; @@ -270,10 +270,11 @@ rockchip,data-mapping = "vesa"; rockchip,data-width = <24>; rockchip,output = "lvds"; - status = "okay"; display-timings { - timing { + native-mode = <&timing0>; + + timing0: timing0 { clock-frequency = <48000000>; hactive = <1024>; vactive = <600>; diff --git a/arch/arm/boot/dts/rk3126-bnd-d708.dtsi b/arch/arm/boot/dts/rk3126-bnd-d708.dtsi index 11eb72f07e94..fd21470f0ed6 100644 --- a/arch/arm/boot/dts/rk3126-bnd-d708.dtsi +++ b/arch/arm/boot/dts/rk3126-bnd-d708.dtsi @@ -237,6 +237,10 @@ }; }; +&route_dsi { + status = "okay"; +}; + &dmc { center-supply = <&vdd_log>; }; @@ -513,10 +517,6 @@ status = "okay"; }; -&mipi_dphy { - status = "okay"; -}; - &nandc { status = "okay"; }; @@ -579,10 +579,6 @@ status = "okay"; }; -&route_dsi { - status = "okay"; -}; - &saradc { status = "okay"; vref-supply = <&vccadc_ref>; diff --git a/arch/arm/boot/dts/rk3128-fireprime.dts b/arch/arm/boot/dts/rk3128-fireprime.dts index 8a8ace4b66d6..af0f5b28da4a 100644 --- a/arch/arm/boot/dts/rk3128-fireprime.dts +++ b/arch/arm/boot/dts/rk3128-fireprime.dts @@ -61,15 +61,6 @@ status = "okay"; }; - lvds_panel: lvds-panel { - status = "disabled"; - ports { - panel_in_lvds: endpoint { - remote-endpoint = <&lvds_out_panel>; - }; - }; - }; - clkin_gmac: external-gmac-clock { compatible = "fixed-clock"; clock-frequency = <125000000>; @@ -127,15 +118,6 @@ cpu-supply = <&vdd_arm>; }; -&display_subsystem { - status = "okay"; - route { - route_lvds: route-lvds { - status = "disabled"; - }; - }; -}; - &emmc { bus-width = <8>; cap-mmc-highspeed; @@ -358,50 +340,7 @@ }; }; -&lvds { - status = "disabled"; - pinctrl-names = "default"; - pinctrl-0 = <&lcdc_lcdc>; - ports { - lvds_out: port@1 { - reg = <1>; - #address-cells = <1>; - #size-cells = <0>; - - lvds_out_panel: endpoint@0 { - reg = <0>; - remote-endpoint = <&panel_in_lvds>; - }; - }; - }; -}; - &pinctrl { - lcdc { - lcdc_lcdc: lcdc-lcdc { - rockchip,pins = - /* depend on the hardware */ - <2 RK_PB0 1 &pcfg_pull_none>, /* DCLK */ - /* <2 RK_PB1 1 &pcfg_pull_none>, /* HSYNC */ - /* <2 RK_PB2 1 &pcfg_pull_none>, /* VSYNC */ - <2 RK_PB3 1 &pcfg_pull_none>, /* DEN */ - <2 RK_PB4 1 &pcfg_pull_none>, /* DATA10 */ - <2 RK_PB5 1 &pcfg_pull_none>, /* DATA11 */ - <2 RK_PB6 1 &pcfg_pull_none>, /* DATA12 */ - <2 RK_PB7 1 &pcfg_pull_none>, /* DATA13 */ - <2 RK_PC0 1 &pcfg_pull_none>, /* DATA14 */ - <2 RK_PC1 1 &pcfg_pull_none>, /* DATA15 */ - <2 RK_PC2 1 &pcfg_pull_none>, /* DATA16 */ - <2 RK_PC3 1 &pcfg_pull_none>; /* DATA17 */ - /* <2 RK_PC4 1 &pcfg_pull_none>, /* DATA18 */ - /* <2 RK_PC5 1 &pcfg_pull_none>, /* DATA19 */ - /* <2 RK_PC6 1 &pcfg_pull_none>, /* DATA20 */ - /* <2 RK_PC7 1 &pcfg_pull_none>, /* DATA21 */ - /* <2 RK_PD0 1 &pcfg_pull_none>, /* DATA22 */ - /* <2 RK_PD1 1 &pcfg_pull_none>; /* DATA23 */ - }; - }; - pmic { pmic_int_l: pmic-int-l { rockchip,pins = ;