From b67987fa85635eba1541cf463bd4f804d62d0edc Mon Sep 17 00:00:00 2001 From: Huibin Hong Date: Tue, 8 May 2018 15:46:30 +0800 Subject: [PATCH] serial: 8250: set fifo rx trigger 1/2 of fifo To reduce the uart interrupts, which may cause: serial8250: too much work for irq xx Change-Id: I89e0d990677e4cffae431e60521b3e16e8381f05 Signed-off-by: Huibin Hong --- drivers/tty/serial/8250/8250_port.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/8250_port.c index 56343cca2f38..1505f8deffab 100644 --- a/drivers/tty/serial/8250/8250_port.c +++ b/drivers/tty/serial/8250/8250_port.c @@ -2358,10 +2358,7 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios, serial8250_set_divisor(port, baud, quot, frac); #ifdef CONFIG_ARCH_ROCKCHIP - if (up->dma) - up->fcr = UART_FCR_ENABLE_FIFO | UART_FCR_T_TRIG_10 | UART_FCR_R_TRIG_10; - else - up->fcr = UART_FCR_ENABLE_FIFO | UART_FCR_T_TRIG_10 | UART_FCR_R_TRIG_00; + up->fcr = UART_FCR_ENABLE_FIFO | UART_FCR_T_TRIG_10 | UART_FCR_R_TRIG_10; #endif /* * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR