From b6f99be6dfa9c34c47239369fb22276d618f8df3 Mon Sep 17 00:00:00 2001 From: Ding Wei Date: Mon, 14 Mar 2022 15:16:41 +0800 Subject: [PATCH] iommu/rockchip: fix issue for read the value for the MMU_DTE_ADDR The register of MMU_DTE_ADDR may effect for delay several us. Change-Id: I74397a914313d9fe3d7c93de7b94b4b38dc61c7b Signed-off-by: Ding Wei --- drivers/iommu/rockchip-iommu.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c index bf63d27970ec..93208193ca78 100644 --- a/drivers/iommu/rockchip-iommu.c +++ b/drivers/iommu/rockchip-iommu.c @@ -586,6 +586,11 @@ read_wa: return ret; } +static u32 rk_iommu_read_dte_addr(void __iomem *base) +{ + return rk_iommu_read(base, RK_MMU_DTE_ADDR); +} + static int rk_iommu_force_reset(struct rk_iommu *iommu) { int ret, i; @@ -614,8 +619,10 @@ static int rk_iommu_force_reset(struct rk_iommu *iommu) address_mask = RK_DTE_PT_ADDRESS_MASK_V2; else address_mask = RK_DTE_PT_ADDRESS_MASK; - dte_addr = rk_iommu_read(iommu->bases[i], RK_MMU_DTE_ADDR); - if (dte_addr != (DTE_ADDR_DUMMY & address_mask)) { + ret = readx_poll_timeout(rk_iommu_read_dte_addr, iommu->bases[i], dte_addr, + dte_addr == (DTE_ADDR_DUMMY & address_mask), + RK_MMU_POLL_PERIOD_US, RK_MMU_POLL_TIMEOUT_US); + if (ret) { dev_err(iommu->dev, "Error during raw reset. MMU_DTE_ADDR is not functioning\n"); return -EFAULT; } @@ -627,8 +634,8 @@ read_wa: return 0; ret = readx_poll_timeout(rk_iommu_is_reset_done, iommu, val, - val, RK_MMU_FORCE_RESET_TIMEOUT_US, - RK_MMU_POLL_TIMEOUT_US); + val, RK_MMU_POLL_TIMEOUT_US, + RK_MMU_FORCE_RESET_TIMEOUT_US); if (ret) { dev_err(iommu->dev, "FORCE_RESET command timed out\n"); return ret;