From b8cd786892113379a811479bf56bb0a098768f10 Mon Sep 17 00:00:00 2001 From: Brian Zhu Date: Sat, 2 Mar 2019 20:52:35 +0800 Subject: [PATCH] vpp: refresh the vd/osd blend ctrl when enable/disable video [1/1] PD#SWPL-4932 Problem: The vd/osd blend ctrl is not correct when disable video Solution: Refresh the vd/osd blend ctrl for that case Verify: Verified on tl1 Change-Id: I6a7bfc58c810279cdfbf55f3d6a51e94890b4899 Signed-off-by: Brian Zhu --- drivers/amlogic/media/video_sink/video.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/amlogic/media/video_sink/video.c b/drivers/amlogic/media/video_sink/video.c index 7d28d55e1943..7bb35696f169 100644 --- a/drivers/amlogic/media/video_sink/video.c +++ b/drivers/amlogic/media/video_sink/video.c @@ -5936,6 +5936,7 @@ static irqreturn_t vsync_isr_in(int irq, void *dev_id) int video2_off_req = 0; struct vframe_s *cur_dispbuf_back = cur_dispbuf; static struct vframe_s *pause_vf; + int force_flush = 0; if (debug_flag & DEBUG_FLAG_VSYNC_DONONE) return IRQ_HANDLED; @@ -7336,6 +7337,7 @@ SET_FILTER: pr_info("VsyncEnableVideoLayer\n"); vpu_delay_work_flag |= VPU_VIDEO_LAYER1_CHANGED; + force_flush = 1; } else if (video_onoff_state == VIDEO_ENABLE_STATE_OFF_REQ) { vpp_misc_set &= ~(VPP_VD1_PREBLEND | VPP_VD1_POSTBLEND); @@ -7355,6 +7357,7 @@ SET_FILTER: if (debug_flag & DEBUG_FLAG_BLACKOUT) pr_info("VsyncDisableVideoLayer\n"); video1_off_req = 1; + force_flush = 1; } spin_unlock_irqrestore(&video_onoff_lock, flags); @@ -7405,6 +7408,7 @@ SET_FILTER: if (debug_flag & DEBUG_FLAG_BLACKOUT) pr_info("VsyncEnableVideoLayer2\n"); + force_flush = 1; } else if (video2_onoff_state == VIDEO_ENABLE_STATE_OFF_REQ) { vpp_misc_set &= ~(VPP_VD2_PREBLEND | VPP_VD2_POSTBLEND | VPP_PREBLEND_EN @@ -7415,6 +7419,7 @@ SET_FILTER: if (debug_flag & DEBUG_FLAG_BLACKOUT) pr_info("VsyncDisableVideoLayer2\n"); video2_off_req = 1; + force_flush = 1; } spin_unlock_irqrestore(&video2_onoff_lock, flags); } @@ -7458,7 +7463,7 @@ SET_FILTER: if (!legacy_vpp) { u32 set_value = 0; - int force_flush = vpp_zorder_check(); + force_flush |= vpp_zorder_check(); vpp_misc_set &= ((1 << 29) | VPP_CM_ENABLE |