From ba3cbacee706ae81b7287905f16e6910154cddf2 Mon Sep 17 00:00:00 2001
From: Xing Zheng <zhengxing@rock-chips.com>
Date: Fri, 25 Jul 2025 18:21:46 +0800
Subject: [PATCH] arm64: dts: rockchip: rv1126b: Add
 aoa/dma-lp/aoa_mmap/aoa_sram for AOA feature

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Change-Id: Ie5dfb9b8add09ffa4bb9a79a455c969c51811b4a
---
 arch/arm64/boot/dts/rockchip/rv1126b.dtsi | 29 +++++++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rv1126b.dtsi b/arch/arm64/boot/dts/rockchip/rv1126b.dtsi
index fa046cdc5f6f..3c89c7feeab9 100644
--- a/arch/arm64/boot/dts/rockchip/rv1126b.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rv1126b.dtsi
@@ -1629,6 +1629,16 @@
 		};
 	};
 
+	dmac_lp: dma-controller@20880000 {
+		compatible = "rockchip,rv1126b-dma", "rockchip,dma";
+		reg = <0x20880000 0x2000>;
+		interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&xin24m>;
+		clock-names = "aclk";
+		#dma-cells = <1>;
+		status = "disabled";
+	};
+
 	audio_codec_pmu: audio-codec@20898000 {
 		compatible = "rockchip,rv1126b-codec", "rockchip,rk3506-codec";
 		reg = <0x20898000 0x1000>;
@@ -1642,6 +1652,16 @@
 		status = "disabled";
 	};
 
+	aoa: aoa@208b0000 {
+		compatible = "rockchip,rv1126b-aoa", "rockchip,aoa";
+		reg = <0x208b0000 0x1000>;
+		interrupts = <GIC_SPI 242 IRQ_TYPE_LEVEL_HIGH>;
+		resets = <&cru SRST_PRESETN_AOA_TDD>, <&cru SRST_PRESETN_AOA_FE>,
+			 <&cru SRST_PRESETN_AOA_AAD>, <&cru SRST_PRESETN_AOA_APB>;
+		reset-names = "atd", "afe", "aad", "apb";
+		status = "disabled";
+	};
+
 	fspi1: spi@208c0000 {
 		compatible = "rockchip,rv1126b-fspi", "rockchip,fspi";
 		reg = <0x208c0000 0x4000>;
@@ -3556,6 +3576,15 @@
 		      <0x22710000 0x1000>;
 	};
 
+	aoa_sram: sram@3ff20000 {
+		compatible = "mmio-sram";
+		reg = <0x3ff20000 0x10000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0 0x3ff20000 0x10000>;
+		status = "disabled";
+	};
+
 	system_sram: sram@3ffb0000 {
 		compatible = "mmio-sram";
 		reg = <0x3ffb0000 0x10000>;