From bb6015af1d6f05abaf9c449be527b02a40ed86be Mon Sep 17 00:00:00 2001
From: Wyon Bi <bivvy.bi@rock-chips.com>
Date: Thu, 18 Nov 2021 19:01:29 +0800
Subject: [PATCH] arm64: dts: rockchip: rk3588-evb1-lp4: Fix dp2vga display

Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: Ib764a9cc64d38e1e3d1e66da03796c31d324391e
---
 .../boot/dts/rockchip/rk3588-evb1-lp4.dtsi      | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-evb1-lp4.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-evb1-lp4.dtsi
index 2114c9777dfc..a0c8e8aeda4c 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-evb1-lp4.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-evb1-lp4.dtsi
@@ -196,6 +196,8 @@
 };
 
 &dp1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&dp1_hpd>;
 	hpd-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
 	status = "okay";
 };
@@ -471,6 +473,13 @@
 				<2 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 	};
+
+	dp {
+		dp1_hpd: dp1-hpd {
+			rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
 	headphone {
 		hp_det: hp-det {
 			rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
@@ -607,3 +616,11 @@
 &usbhost_dwc3_0 {
 	status = "disabled";
 };
+
+&vop {
+	assigned-clocks = <&cru DCLK_VOP0_SRC>,
+			  <&cru DCLK_VOP1_SRC>,
+			  <&cru DCLK_VOP2_SRC>,
+			  <&cru DCLK_VOP3>;
+	assigned-clock-parents = <0>, <0>, <&cru PLL_V0PLL>, <0>;
+};