mirror of
https://github.com/hardkernel/linux.git
synced 2026-03-25 20:10:23 +09:00
Merge 5.15.140 into android14-5.15-lts
Changes in 5.15.140 locking/ww_mutex/test: Fix potential workqueue corruption perf/core: Bail out early if the request AUX area is out of bound clocksource/drivers/timer-imx-gpt: Fix potential memory leak clocksource/drivers/timer-atmel-tcb: Fix initialization on SAM9 hardware workqueue: Provide one lock class key per work_on_cpu() callsite x86/mm: Drop the 4 MB restriction on minimal NUMA node memory size wifi: mac80211_hwsim: fix clang-specific fortify warning wifi: mac80211: don't return unset power in ieee80211_get_tx_power() atl1c: Work around the DMA RX overflow issue bpf: Detect IP == ksym.end as part of BPF program wifi: ath9k: fix clang-specific fortify warnings wifi: ath10k: fix clang-specific fortify warning net: annotate data-races around sk->sk_tx_queue_mapping net: annotate data-races around sk->sk_dst_pending_confirm wifi: ath10k: Don't touch the CE interrupt registers after power up Bluetooth: btusb: Add date->evt_skb is NULL check Bluetooth: Fix double free in hci_conn_cleanup platform/x86: thinkpad_acpi: Add battery quirk for Thinkpad X120e drm/komeda: drop all currently held locks if deadlock happens drm/amdkfd: Fix a race condition of vram buffer unref in svm code drm/amd/display: use full update for clip size increase of large plane source string.h: add array-wrappers for (v)memdup_user() kernel: kexec: copy user-array safely kernel: watch_queue: copy user-array safely drm: vmwgfx_surface.c: copy user-array safely drm/msm/dp: skip validity check for DP CTS EDID checksum drm/amd: Fix UBSAN array-index-out-of-bounds for SMU7 drm/amd: Fix UBSAN array-index-out-of-bounds for Polaris and Tonga drm/amdgpu: Fix potential null pointer derefernce drm/panel: fix a possible null pointer dereference drm/panel/panel-tpo-tpg110: fix a possible null pointer dereference drm/amdgpu/vkms: fix a possible null pointer dereference drm/panel: st7703: Pick different reset sequence drm/amdkfd: Fix shift out-of-bounds issue drm/amdgpu: Fix a null pointer access when the smc_rreg pointer is NULL arm64: dts: ls208xa: use a pseudo-bus to constrain usb dma size selftests/efivarfs: create-read: fix a resource leak ASoC: soc-card: Add storage for PCI SSID crypto: pcrypt - Fix hungtask for PADATA_RESET RDMA/hfi1: Use FIELD_GET() to extract Link Width scsi: hisi_sas: Set debugfs_dir pointer to NULL after removing debugfs scsi: ibmvfc: Remove BUG_ON in the case of an empty event pool fs/jfs: Add check for negative db_l2nbperpage fs/jfs: Add validity check for db_maxag and db_agpref jfs: fix array-index-out-of-bounds in dbFindLeaf jfs: fix array-index-out-of-bounds in diAlloc HID: lenovo: Detect quirk-free fw on cptkbd and stop applying workaround ARM: 9320/1: fix stack depot IRQ stack filter ALSA: hda: Fix possible null-ptr-deref when assigning a stream PCI: tegra194: Use FIELD_GET()/FIELD_PREP() with Link Width fields atm: iphase: Do PCI error checks on own line scsi: libfc: Fix potential NULL pointer dereference in fc_lport_ptp_setup() PCI: Use FIELD_GET() to extract Link Width PCI: Extract ATS disabling to a helper function PCI: Disable ATS for specific Intel IPU E2000 devices misc: pci_endpoint_test: Add Device ID for R-Car S4-8 PCIe controller PCI: Use FIELD_GET() in Sapphire RX 5600 XT Pulse quirk HID: Add quirk for Dell Pro Wireless Keyboard and Mouse KM5221W exfat: support handle zero-size directory tty: vcc: Add check for kstrdup() in vcc_probe() usb: gadget: f_ncm: Always set current gadget in ncm_bind() 9p/trans_fd: Annotate data-racy writes to file::f_flags 9p: v9fs_listxattr: fix %s null argument warning i3c: mipi-i3c-hci: Fix out of bounds access in hci_dma_irq_handler i2c: sun6i-p2wi: Prevent potential division by zero virtio-blk: fix implicit overflow on virtio_max_dma_size i3c: master: mipi-i3c-hci: Fix a kernel panic for accessing DAT_data. media: gspca: cpia1: shift-out-of-bounds in set_flicker media: vivid: avoid integer overflow gfs2: ignore negated quota changes gfs2: fix an oops in gfs2_permission media: cobalt: Use FIELD_GET() to extract Link Width media: ccs: Fix driver quirk struct documentation media: imon: fix access to invalid resource for the second interface drm/amd/display: Avoid NULL dereference of timing generator kgdb: Flush console before entering kgdb on panic i2c: dev: copy userspace array safely ASoC: ti: omap-mcbsp: Fix runtime PM underflow warnings drm/qxl: prevent memory leak drm/amdgpu: fix software pci_unplug on some chips pwm: Fix double shift bug wifi: iwlwifi: Use FW rate for non-data frames tracing: Reuse logic from perf's get_recursion_context() tracing/perf: Add interrupt_context_level() helper sched/core: Optimize in_task() and in_interrupt() a bit media: cadence: csi2rx: Unregister v4l2 async notifier media: cec: meson: always include meson sub-directory in Makefile SUNRPC: ECONNRESET might require a rebind SUNRPC: Add an IS_ERR() check back to where it was NFSv4.1: fix SP4_MACH_CRED protection for pnfs IO SUNRPC: Fix RPC client cleaned up the freed pipefs dentries gfs2: Silence "suspicious RCU usage in gfs2_permission" warning mptcp: diag: switch to context structure mptcp: listen diag dump support net: inet: Remove count from inet_listen_hashbucket net: inet: Open code inet_hash2 and inet_unhash2 net: inet: Retire port only listening_hash net: set SOCK_RCU_FREE before inserting socket into hashtable ipvlan: add ipvlan_route_v6_outbound() helper tty: Fix uninit-value access in ppp_sync_receive() net: hns3: fix add VLAN fail issue net: hns3: refine the definition for struct hclge_pf_to_vf_msg net: hns3: add byte order conversion for PF to VF mailbox message net: hns3: add barrier in vf mailbox reply process net: hns3: fix incorrect capability bit display for copper port net: hns3: fix variable may not initialized problem in hns3_init_mac_addr() net: hns3: fix VF reset fail issue net: hns3: fix VF wrong speed and duplex issue tipc: Fix kernel-infoleak due to uninitialized TLV value ppp: limit MRU to 64K xen/events: fix delayed eoi list handling ptp: annotate data-race around q->head and q->tail bonding: stop the device in bond_setup_by_slave() net: ethernet: cortina: Fix max RX frame define net: ethernet: cortina: Handle large frames net: ethernet: cortina: Fix MTU max setting af_unix: fix use-after-free in unix_stream_read_actor() netfilter: nf_conntrack_bridge: initialize err to 0 netfilter: nf_tables: use the correct get/put helpers netfilter: nf_tables: add and use BE register load-store helpers netfilter: nf_tables: fix pointer math issue in nft_byteorder_eval() net: stmmac: fix rx budget limit check net/mlx5e: fix double free of encap_header net/mlx5e: fix double free of encap_header in update funcs net/mlx5e: Remove incorrect addition of action fwd flag net/mlx5e: Move mod hdr allocation to a single place net/mlx5e: Refactor mod header management API net/mlx5e: Fix pedit endianness net/mlx5e: Reduce the size of icosq_str net/mlx5e: Check return value of snprintf writing to fw_version buffer for representors macvlan: Don't propagate promisc change to lower dev in passthru tools/power/turbostat: Fix a knl bug tools/power/turbostat: Enable the C-state Pre-wake printing cifs: spnego: add ';' in HOST_KEY_LEN cifs: fix check of rc in function generate_smb3signingkey xfs: refactor buffer cancellation table allocation xfs: don't leak xfs_buf_cancel structures when recovery fails xfs: convert buf_cancel_table allocation to kmalloc_array xfs: use invalidate_lock to check the state of mmap_lock xfs: prevent a UAF when log IO errors race with unmount xfs: flush inode gc workqueue before clearing agi bucket xfs: fix use-after-free in xattr node block inactivation xfs: don't leak memory when attr fork loading fails xfs: fix intermittent hang during quotacheck xfs: add missing cmap->br_state = XFS_EXT_NORM update xfs: Fix false ENOSPC when performing direct write on a delalloc extent in cow fork xfs: fix inode reservation space for removing transaction xfs: avoid a UAF when log intent item recovery fails xfs: fix exception caused by unexpected illegal bestcount in leaf dir xfs: fix memory leak in xfs_errortag_init xfs: Fix unreferenced object reported by kmemleak in xfs_sysfs_init() i915/perf: Fix NULL deref bugs with drm_dbg() calls media: venus: hfi: add checks to perform sanity on queue pointers powerpc/perf: Fix disabling BHRB and instruction sampling randstruct: Fix gcc-plugin performance mode to stay in group bpf: Fix check_stack_write_fixed_off() to correctly spill imm bpf: Fix precision tracking for BPF_ALU | BPF_TO_BE | BPF_END scsi: mpt3sas: Fix loop logic scsi: megaraid_sas: Increase register read retry rount from 3 to 30 for selected registers scsi: qla2xxx: Fix system crash due to bad pointer access crypto: x86/sha - load modules based on CPU features x86/cpu/hygon: Fix the CPU topology evaluation for real KVM: x86: hyper-v: Don't auto-enable stimer on write from user-space KVM: x86: Ignore MSR_AMD64_TW_CFG access audit: don't take task_lock() in audit_exe_compare() code path audit: don't WARN_ON_ONCE(!current->mm) in audit_exe_compare() tty/sysrq: replace smp_processor_id() with get_cpu() hvc/xen: fix console unplug hvc/xen: fix error path in xen_hvc_init() to always register frontend driver hvc/xen: fix event channel handling for secondary consoles PCI/sysfs: Protect driver's D3cold preference from user space watchdog: move softlockup_panic back to early_param ACPI: resource: Do IRQ override on TongFang GMxXGxx arm64: Restrict CPU_BIG_ENDIAN to GNU as or LLVM IAS 15.x or newer parisc/pdc: Add width field to struct pdc_model clk: socfpga: Fix undefined behavior bug in struct stratix10_clock_data clk: qcom: ipq8074: drop the CLK_SET_RATE_PARENT flag from PLL clocks clk: qcom: ipq6018: drop the CLK_SET_RATE_PARENT flag from PLL clocks mmc: vub300: fix an error code mmc: sdhci_am654: fix start loop index for TAP value parsing PCI/ASPM: Fix L1 substate handling in aspm_attr_store_common() PCI: exynos: Don't discard .remove() callback wifi: wilc1000: use vmm_table as array in wilc struct svcrdma: Drop connection after an RDMA Read error rcu/tree: Defer setting of jiffies during stall reset arm64: dts: qcom: ipq6018: Fix hwlock index for SMEM PM: hibernate: Use __get_safe_page() rather than touching the list PM: hibernate: Clean up sync_read handling in snapshot_write_next() rcu: kmemleak: Ignore kmemleak false positives when RCU-freeing objects btrfs: don't arbitrarily slow down delalloc if we're committing firmware: qcom_scm: use 64-bit calling convention only when client is 64-bit ACPI: FPDT: properly handle invalid FPDT subtables ima: annotate iint mutex to avoid lockdep false positive warnings ima: detect changes to the backing overlay file wifi: ath11k: fix temperature event locking wifi: ath11k: fix dfs radar event locking wifi: ath11k: fix htt pktlog locking mmc: meson-gx: Remove setting of CMD_CFG_ERROR genirq/generic_chip: Make irq_remove_generic_chip() irqdomain aware KEYS: trusted: Rollback init_trusted() consistently PCI: keystone: Don't discard .remove() callback PCI: keystone: Don't discard .probe() callback netfilter: nf_tables: remove catchall element in GC sync path netfilter: nf_tables: split async and sync catchall in two functions selftests/resctrl: Remove duplicate feature check from CMT test selftests/resctrl: Reduce failures due to outliers in MBA/MBM tests ASoC: codecs: wsa-macro: fix uninitialized stack variables with name prefix jbd2: fix potential data lost in recovering journal raced with synchronizing fs bdev quota: explicitly forbid quota files from being encrypted kernel/reboot: emergency_restart: Set correct system_state i2c: core: Run atomic i2c xfer when !preemptible tracing: Have the user copy of synthetic event address use correct context mcb: fix error handling for different scenarios when parsing dmaengine: stm32-mdma: correct desc prep when channel running s390/cmma: fix detection of DAT pages mm/cma: use nth_page() in place of direct struct page manipulation mm/memory_hotplug: use pfn math in place of direct struct page manipulation mtd: cfi_cmdset_0001: Byte swap OTP info i3c: master: cdns: Fix reading status register i3c: master: svc: fix race condition in ibi work thread i3c: master: svc: fix wrong data return when IBI happen during start frame i3c: master: svc: fix ibi may not return mandatory data byte i3c: master: svc: fix check wrong status register in irq handler i3c: master: svc: fix SDA keep low when polling IBIWON timeout happen parisc: Prevent booting 64-bit kernels on PA1.x machines parisc/pgtable: Do not drop upper 5 address bits of physical address xhci: Enable RPM on controllers that support low-power states ALSA: info: Fix potential deadlock at disconnection ALSA: hda/realtek - Add Dell ALC295 to pin fall back table ALSA: hda/realtek - Enable internal speaker of ASUS K6500ZC serial: meson: Use platform_get_irq() to get the interrupt tty: serial: meson: fix hard LOCKUP on crtscts mode regmap: Ensure range selector registers are updated after cache sync cpufreq: stats: Fix buffer overflow detection in trans_stats() Bluetooth: btusb: Add Realtek RTL8852BE support ID 0x0cb8:0xc559 bluetooth: Add device 0bda:887b to device tables bluetooth: Add device 13d3:3571 to device tables Bluetooth: btusb: Add RTW8852BE device 13d3:3570 to device tables Bluetooth: btusb: Add 0bda:b85b for Fn-Link RTL8852BE ksmbd: fix slab out of bounds write in smb_inherit_dacl() arm64: dts: qcom: ipq6018: switch TCSR mutex to MMIO arm64: dts: qcom: ipq6018: Fix tcsr_mutex register size powerpc/pseries/ddw: simplify enable_ddw() Revert ncsi: Propagate carrier gain/loss events to the NCSI controller Revert "i2c: pxa: move to generic GPIO recovery" lsm: fix default return value for vm_enough_memory lsm: fix default return value for inode_getsecctx sbsa_gwdt: Calculate timeout with 64-bit math i2c: designware: Disable TX_EMPTY irq while waiting for block length byte s390/ap: fix AP bus crash on early config change callback invocation net: ethtool: Fix documentation of ethtool_sprintf() net: dsa: lan9303: consequently nested-lock physical MDIO net: phylink: initialize carrier state at creation i2c: i801: fix potential race in i801_block_transaction_byte_by_byte f2fs: avoid format-overflow warning media: lirc: drop trailing space from scancode transmit media: sharp: fix sharp encoding media: venus: hfi_parser: Add check to keep the number of codecs within range media: venus: hfi: fix the check to handle session buffer requirement media: venus: hfi: add checks to handle capabilities from firmware media: ccs: Correctly initialise try compose rectangle nfsd: fix file memleak on client_opens_release riscv: kprobes: allow writing to x0 mmc: sdhci-pci-gli: A workaround to allow GL9750 to enter ASPM L1.2 mm: kmem: drop __GFP_NOFAIL when allocating objcg vectors r8169: fix network lost after resume on DASH systems mmc: sdhci-pci-gli: GL9750: Mask the replay timer timeout of AER media: qcom: camss: Fix pm_domain_on sequence in probe media: qcom: camss: Fix vfe_get() error jump media: qcom: camss: Fix VFE-17x vfe_disable_output() media: qcom: camss: Fix missing vfe_lite clocks check Revert "net: r8169: Disable multicast filter for RTL8168H and RTL8107E" ext4: apply umask if ACL support is disabled ext4: correct offset of gdb backup in non meta_bg group to update_backups ext4: correct return value of ext4_convert_meta_bg ext4: correct the start block of counting reserved clusters ext4: remove gdb backup copy for meta bg in setup_new_flex_group_blocks ext4: add missed brelse in update_backups drm/amd/pm: Handle non-terminated overdrive commands. drm/i915: Fix potential spectre vulnerability drm/amdgpu: don't use ATRM for external devices drm/amdgpu: fix error handling in amdgpu_bo_list_get() drm/amd/display: Change the DMCUB mailbox memory location from FB to inbox io_uring/fdinfo: lock SQ thread while retrieving thread cpu/pid powerpc/powernv: Fix fortify source warnings in opal-prd.c tracing: Have trace_event_file have ref counters Input: xpad - add VID for Turtle Beach controllers driver core: Release all resources during unbind before updating device links Linux 5.15.140 Change-Id: Ie738d72b0c30212abc4aae8f965d78bf9d480ffe Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
This commit is contained in:
2
Makefile
2
Makefile
@@ -1,7 +1,7 @@
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# SPDX-License-Identifier: GPL-2.0
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VERSION = 5
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PATCHLEVEL = 15
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SUBLEVEL = 139
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SUBLEVEL = 140
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EXTRAVERSION =
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NAME = Trick or Treat
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@@ -10,10 +10,6 @@
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#include <linux/interrupt.h>
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#ifdef CONFIG_FUNCTION_GRAPH_TRACER
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#define __exception_irq_entry __irq_entry
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#else
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#define __exception_irq_entry
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#endif
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#endif /* __ASM_ARM_EXCEPTION_H */
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@@ -1308,6 +1308,8 @@ choice
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config CPU_BIG_ENDIAN
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bool "Build big-endian kernel"
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depends on !LD_IS_LLD || LLD_VERSION >= 130000
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# https://github.com/llvm/llvm-project/commit/1379b150991f70a5782e9a143c2ba5308da1161c
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depends on AS_IS_GNU || AS_VERSION >= 150000
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help
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Say Y if you plan on running a kernel with a big-endian userspace.
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@@ -1179,26 +1179,34 @@
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dma-coherent;
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};
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usb0: usb@3100000 {
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status = "disabled";
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compatible = "snps,dwc3";
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reg = <0x0 0x3100000 0x0 0x10000>;
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interrupts = <0 80 0x4>; /* Level high type */
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dr_mode = "host";
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snps,quirk-frame-length-adjustment = <0x20>;
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snps,dis_rxdet_inp3_quirk;
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snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
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};
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bus: bus {
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#address-cells = <2>;
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#size-cells = <2>;
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compatible = "simple-bus";
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ranges;
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dma-ranges = <0x0 0x0 0x0 0x0 0x100 0x00000000>;
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usb1: usb@3110000 {
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status = "disabled";
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compatible = "snps,dwc3";
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reg = <0x0 0x3110000 0x0 0x10000>;
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interrupts = <0 81 0x4>; /* Level high type */
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dr_mode = "host";
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snps,quirk-frame-length-adjustment = <0x20>;
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snps,dis_rxdet_inp3_quirk;
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snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
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usb0: usb@3100000 {
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compatible = "snps,dwc3";
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reg = <0x0 0x3100000 0x0 0x10000>;
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interrupts = <0 80 0x4>; /* Level high type */
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dr_mode = "host";
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snps,quirk-frame-length-adjustment = <0x20>;
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snps,dis_rxdet_inp3_quirk;
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snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
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status = "disabled";
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};
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usb1: usb@3110000 {
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compatible = "snps,dwc3";
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reg = <0x0 0x3110000 0x0 0x10000>;
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interrupts = <0 81 0x4>; /* Level high type */
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dr_mode = "host";
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snps,quirk-frame-length-adjustment = <0x20>;
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snps,dis_rxdet_inp3_quirk;
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snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
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status = "disabled";
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};
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};
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ccn@4000000 {
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@@ -129,12 +129,6 @@
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};
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};
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tcsr_mutex: hwlock {
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compatible = "qcom,tcsr-mutex";
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syscon = <&tcsr_mutex_regs 0 0x80>;
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#hwlock-cells = <1>;
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};
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pmuv8: pmu {
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compatible = "arm,cortex-a53-pmu";
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interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(4) |
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@@ -175,7 +169,7 @@
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smem {
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compatible = "qcom,smem";
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memory-region = <&smem_region>;
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hwlocks = <&tcsr_mutex 0>;
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hwlocks = <&tcsr_mutex 3>;
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};
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soc: soc {
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@@ -253,9 +247,10 @@
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#reset-cells = <1>;
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};
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tcsr_mutex_regs: syscon@1905000 {
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compatible = "syscon";
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reg = <0x0 0x01905000 0x0 0x8000>;
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tcsr_mutex: hwlock@1905000 {
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compatible = "qcom,ipq6018-tcsr-mutex", "qcom,tcsr-mutex";
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reg = <0x0 0x01905000 0x0 0x20000>;
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#hwlock-cells = <1>;
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};
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tcsr: syscon@1937000 {
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@@ -465,6 +465,7 @@ struct pdc_model { /* for PDC_MODEL */
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unsigned long arch_rev;
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unsigned long pot_key;
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unsigned long curr_key;
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unsigned long width; /* default of PSW_W bit (1=enabled) */
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};
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struct pdc_cache_cf { /* for PDC_CACHE (I/D-caches) */
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@@ -497,13 +497,13 @@
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* to a CPU TLB 4k PFN (4k => 12 bits to shift) */
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#define PAGE_ADD_SHIFT (PAGE_SHIFT-12)
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#define PAGE_ADD_HUGE_SHIFT (REAL_HPAGE_SHIFT-12)
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#define PFN_START_BIT (63-ASM_PFN_PTE_SHIFT+(63-58)-PAGE_ADD_SHIFT)
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/* Drop prot bits and convert to page addr for iitlbt and idtlbt */
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.macro convert_for_tlb_insert20 pte,tmp
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#ifdef CONFIG_HUGETLB_PAGE
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copy \pte,\tmp
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extrd,u \tmp,(63-ASM_PFN_PTE_SHIFT)+(63-58)+PAGE_ADD_SHIFT,\
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64-PAGE_SHIFT-PAGE_ADD_SHIFT,\pte
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extrd,u \tmp,PFN_START_BIT,PFN_START_BIT+1,\pte
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depdi _PAGE_SIZE_ENCODING_DEFAULT,63,\
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(63-58)+PAGE_ADD_SHIFT,\pte
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@@ -511,8 +511,7 @@
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depdi _HUGE_PAGE_SIZE_ENCODING_DEFAULT,63,\
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(63-58)+PAGE_ADD_HUGE_SHIFT,\pte
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#else /* Huge pages disabled */
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extrd,u \pte,(63-ASM_PFN_PTE_SHIFT)+(63-58)+PAGE_ADD_SHIFT,\
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64-PAGE_SHIFT-PAGE_ADD_SHIFT,\pte
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extrd,u \pte,PFN_START_BIT,PFN_START_BIT+1,\pte
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depdi _PAGE_SIZE_ENCODING_DEFAULT,63,\
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(63-58)+PAGE_ADD_SHIFT,\pte
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#endif
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@@ -69,9 +69,8 @@ $bss_loop:
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stw,ma %arg2,4(%r1)
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stw,ma %arg3,4(%r1)
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#if !defined(CONFIG_64BIT) && defined(CONFIG_PA20)
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/* This 32-bit kernel was compiled for PA2.0 CPUs. Check current CPU
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* and halt kernel if we detect a PA1.x CPU. */
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#if defined(CONFIG_PA20)
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/* check for 64-bit capable CPU as required by current kernel */
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ldi 32,%r10
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mtctl %r10,%cr11
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.level 2.0
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@@ -1342,8 +1342,7 @@ static void power_pmu_disable(struct pmu *pmu)
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/*
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* Disable instruction sampling if it was enabled
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*/
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if (cpuhw->mmcr.mmcra & MMCRA_SAMPLE_ENABLE)
|
||||
val &= ~MMCRA_SAMPLE_ENABLE;
|
||||
val &= ~MMCRA_SAMPLE_ENABLE;
|
||||
|
||||
/* Disable BHRB via mmcra (BHRBRD) for p10 */
|
||||
if (ppmu->flags & PPMU_ARCH_31)
|
||||
@@ -1354,7 +1353,7 @@ static void power_pmu_disable(struct pmu *pmu)
|
||||
* instruction sampling or BHRB.
|
||||
*/
|
||||
if (val != mmcra) {
|
||||
mtspr(SPRN_MMCRA, mmcra);
|
||||
mtspr(SPRN_MMCRA, val);
|
||||
mb();
|
||||
isync();
|
||||
}
|
||||
|
||||
@@ -24,13 +24,20 @@
|
||||
#include <linux/uaccess.h>
|
||||
|
||||
|
||||
struct opal_prd_msg {
|
||||
union {
|
||||
struct opal_prd_msg_header header;
|
||||
DECLARE_FLEX_ARRAY(u8, data);
|
||||
};
|
||||
};
|
||||
|
||||
/*
|
||||
* The msg member must be at the end of the struct, as it's followed by the
|
||||
* message data.
|
||||
*/
|
||||
struct opal_prd_msg_queue_item {
|
||||
struct list_head list;
|
||||
struct opal_prd_msg_header msg;
|
||||
struct list_head list;
|
||||
struct opal_prd_msg msg;
|
||||
};
|
||||
|
||||
static struct device_node *prd_node;
|
||||
@@ -156,7 +163,7 @@ static ssize_t opal_prd_read(struct file *file, char __user *buf,
|
||||
int rc;
|
||||
|
||||
/* we need at least a header's worth of data */
|
||||
if (count < sizeof(item->msg))
|
||||
if (count < sizeof(item->msg.header))
|
||||
return -EINVAL;
|
||||
|
||||
if (*ppos)
|
||||
@@ -186,7 +193,7 @@ static ssize_t opal_prd_read(struct file *file, char __user *buf,
|
||||
return -EINTR;
|
||||
}
|
||||
|
||||
size = be16_to_cpu(item->msg.size);
|
||||
size = be16_to_cpu(item->msg.header.size);
|
||||
if (size > count) {
|
||||
err = -EINVAL;
|
||||
goto err_requeue;
|
||||
@@ -352,7 +359,7 @@ static int opal_prd_msg_notifier(struct notifier_block *nb,
|
||||
if (!item)
|
||||
return -ENOMEM;
|
||||
|
||||
memcpy(&item->msg, msg->params, msg_size);
|
||||
memcpy(&item->msg.data, msg->params, msg_size);
|
||||
|
||||
spin_lock_irqsave(&opal_prd_msg_queue_lock, flags);
|
||||
list_add_tail(&item->list, &opal_prd_msg_queue);
|
||||
|
||||
@@ -1241,7 +1241,6 @@ static bool enable_ddw(struct pci_dev *dev, struct device_node *pdn)
|
||||
u32 ddw_avail[DDW_APPLICABLE_SIZE];
|
||||
struct dma_win *window;
|
||||
struct property *win64;
|
||||
bool ddw_enabled = false;
|
||||
struct failed_ddw_pdn *fpdn;
|
||||
bool default_win_removed = false, direct_mapping = false;
|
||||
bool pmem_present;
|
||||
@@ -1256,7 +1255,6 @@ static bool enable_ddw(struct pci_dev *dev, struct device_node *pdn)
|
||||
|
||||
if (find_existing_ddw(pdn, &dev->dev.archdata.dma_offset, &len)) {
|
||||
direct_mapping = (len >= max_ram_len);
|
||||
ddw_enabled = true;
|
||||
goto out_unlock;
|
||||
}
|
||||
|
||||
@@ -1411,8 +1409,8 @@ static bool enable_ddw(struct pci_dev *dev, struct device_node *pdn)
|
||||
dev_info(&dev->dev, "failed to map DMA window for %pOF: %d\n",
|
||||
dn, ret);
|
||||
|
||||
/* Make sure to clean DDW if any TCE was set*/
|
||||
clean_dma_window(pdn, win64->value);
|
||||
/* Make sure to clean DDW if any TCE was set*/
|
||||
clean_dma_window(pdn, win64->value);
|
||||
goto out_del_list;
|
||||
}
|
||||
} else {
|
||||
@@ -1459,7 +1457,6 @@ static bool enable_ddw(struct pci_dev *dev, struct device_node *pdn)
|
||||
spin_unlock(&dma_win_list_lock);
|
||||
|
||||
dev->dev.archdata.dma_offset = win_addr;
|
||||
ddw_enabled = true;
|
||||
goto out_unlock;
|
||||
|
||||
out_del_list:
|
||||
@@ -1495,10 +1492,10 @@ out_unlock:
|
||||
* as RAM, then we failed to create a window to cover persistent
|
||||
* memory and need to set the DMA limit.
|
||||
*/
|
||||
if (pmem_present && ddw_enabled && direct_mapping && len == max_ram_len)
|
||||
if (pmem_present && direct_mapping && len == max_ram_len)
|
||||
dev->dev.bus_dma_limit = dev->dev.archdata.dma_offset + (1ULL << len);
|
||||
|
||||
return ddw_enabled && direct_mapping;
|
||||
return direct_mapping;
|
||||
}
|
||||
|
||||
static void pci_dma_dev_setup_pSeriesLP(struct pci_dev *dev)
|
||||
|
||||
@@ -24,7 +24,7 @@ static inline bool rv_insn_reg_set_val(struct pt_regs *regs, u32 index,
|
||||
unsigned long val)
|
||||
{
|
||||
if (index == 0)
|
||||
return false;
|
||||
return true;
|
||||
else if (index <= 31)
|
||||
*((unsigned long *)regs + index) = val;
|
||||
else
|
||||
|
||||
@@ -131,7 +131,7 @@ static void mark_kernel_pud(p4d_t *p4d, unsigned long addr, unsigned long end)
|
||||
continue;
|
||||
if (!pud_folded(*pud)) {
|
||||
page = phys_to_page(pud_val(*pud));
|
||||
for (i = 0; i < 3; i++)
|
||||
for (i = 0; i < 4; i++)
|
||||
set_bit(PG_arch_1, &page[i].flags);
|
||||
}
|
||||
mark_kernel_pmd(pud, addr, next);
|
||||
@@ -152,7 +152,7 @@ static void mark_kernel_p4d(pgd_t *pgd, unsigned long addr, unsigned long end)
|
||||
continue;
|
||||
if (!p4d_folded(*p4d)) {
|
||||
page = phys_to_page(p4d_val(*p4d));
|
||||
for (i = 0; i < 3; i++)
|
||||
for (i = 0; i < 4; i++)
|
||||
set_bit(PG_arch_1, &page[i].flags);
|
||||
}
|
||||
mark_kernel_pud(p4d, addr, next);
|
||||
@@ -174,7 +174,7 @@ static void mark_kernel_pgd(void)
|
||||
continue;
|
||||
if (!pgd_folded(*pgd)) {
|
||||
page = phys_to_page(pgd_val(*pgd));
|
||||
for (i = 0; i < 3; i++)
|
||||
for (i = 0; i < 4; i++)
|
||||
set_bit(PG_arch_1, &page[i].flags);
|
||||
}
|
||||
mark_kernel_p4d(pgd, addr, next);
|
||||
|
||||
@@ -24,8 +24,17 @@
|
||||
#include <linux/types.h>
|
||||
#include <crypto/sha1.h>
|
||||
#include <crypto/sha1_base.h>
|
||||
#include <asm/cpu_device_id.h>
|
||||
#include <asm/simd.h>
|
||||
|
||||
static const struct x86_cpu_id module_cpu_ids[] = {
|
||||
X86_MATCH_FEATURE(X86_FEATURE_AVX2, NULL),
|
||||
X86_MATCH_FEATURE(X86_FEATURE_AVX, NULL),
|
||||
X86_MATCH_FEATURE(X86_FEATURE_SSSE3, NULL),
|
||||
{}
|
||||
};
|
||||
MODULE_DEVICE_TABLE(x86cpu, module_cpu_ids);
|
||||
|
||||
static int sha1_update(struct shash_desc *desc, const u8 *data,
|
||||
unsigned int len, sha1_block_fn *sha1_xform)
|
||||
{
|
||||
@@ -301,6 +310,9 @@ static inline void unregister_sha1_ni(void) { }
|
||||
|
||||
static int __init sha1_ssse3_mod_init(void)
|
||||
{
|
||||
if (!x86_match_cpu(module_cpu_ids))
|
||||
return -ENODEV;
|
||||
|
||||
if (register_sha1_ssse3())
|
||||
goto fail;
|
||||
|
||||
|
||||
@@ -38,11 +38,20 @@
|
||||
#include <crypto/sha2.h>
|
||||
#include <crypto/sha256_base.h>
|
||||
#include <linux/string.h>
|
||||
#include <asm/cpu_device_id.h>
|
||||
#include <asm/simd.h>
|
||||
|
||||
asmlinkage void sha256_transform_ssse3(struct sha256_state *state,
|
||||
const u8 *data, int blocks);
|
||||
|
||||
static const struct x86_cpu_id module_cpu_ids[] = {
|
||||
X86_MATCH_FEATURE(X86_FEATURE_AVX2, NULL),
|
||||
X86_MATCH_FEATURE(X86_FEATURE_AVX, NULL),
|
||||
X86_MATCH_FEATURE(X86_FEATURE_SSSE3, NULL),
|
||||
{}
|
||||
};
|
||||
MODULE_DEVICE_TABLE(x86cpu, module_cpu_ids);
|
||||
|
||||
static int _sha256_update(struct shash_desc *desc, const u8 *data,
|
||||
unsigned int len, sha256_block_fn *sha256_xform)
|
||||
{
|
||||
@@ -366,6 +375,9 @@ static inline void unregister_sha256_ni(void) { }
|
||||
|
||||
static int __init sha256_ssse3_mod_init(void)
|
||||
{
|
||||
if (!x86_match_cpu(module_cpu_ids))
|
||||
return -ENODEV;
|
||||
|
||||
if (register_sha256_ssse3())
|
||||
goto fail;
|
||||
|
||||
|
||||
@@ -511,6 +511,7 @@
|
||||
#define MSR_AMD64_CPUID_FN_1 0xc0011004
|
||||
#define MSR_AMD64_LS_CFG 0xc0011020
|
||||
#define MSR_AMD64_DC_CFG 0xc0011022
|
||||
#define MSR_AMD64_TW_CFG 0xc0011023
|
||||
|
||||
#define MSR_AMD64_DE_CFG 0xc0011029
|
||||
#define MSR_AMD64_DE_CFG_LFENCE_SERIALIZE_BIT 1
|
||||
|
||||
@@ -12,13 +12,6 @@
|
||||
|
||||
#define NR_NODE_MEMBLKS (MAX_NUMNODES*2)
|
||||
|
||||
/*
|
||||
* Too small node sizes may confuse the VM badly. Usually they
|
||||
* result from BIOS bugs. So dont recognize nodes as standalone
|
||||
* NUMA entities that have less than this amount of RAM listed:
|
||||
*/
|
||||
#define NODE_MIN_SIZE (4*1024*1024)
|
||||
|
||||
extern int numa_off;
|
||||
|
||||
/*
|
||||
|
||||
@@ -86,8 +86,12 @@ static void hygon_get_topology(struct cpuinfo_x86 *c)
|
||||
if (!err)
|
||||
c->x86_coreid_bits = get_count_order(c->x86_max_cores);
|
||||
|
||||
/* Socket ID is ApicId[6] for these processors. */
|
||||
c->phys_proc_id = c->apicid >> APICID_SOCKET_ID_BIT;
|
||||
/*
|
||||
* Socket ID is ApicId[6] for the processors with model <= 0x3
|
||||
* when running on host.
|
||||
*/
|
||||
if (!boot_cpu_has(X86_FEATURE_HYPERVISOR) && c->x86_model <= 0x3)
|
||||
c->phys_proc_id = c->apicid >> APICID_SOCKET_ID_BIT;
|
||||
|
||||
cacheinfo_hygon_init_llc_id(c, cpu);
|
||||
} else if (cpu_has(c, X86_FEATURE_NODEID_MSR)) {
|
||||
|
||||
@@ -701,10 +701,12 @@ static int stimer_set_count(struct kvm_vcpu_hv_stimer *stimer, u64 count,
|
||||
|
||||
stimer_cleanup(stimer);
|
||||
stimer->count = count;
|
||||
if (stimer->count == 0)
|
||||
stimer->config.enable = 0;
|
||||
else if (stimer->config.auto_enable)
|
||||
stimer->config.enable = 1;
|
||||
if (!host) {
|
||||
if (stimer->count == 0)
|
||||
stimer->config.enable = 0;
|
||||
else if (stimer->config.auto_enable)
|
||||
stimer->config.enable = 1;
|
||||
}
|
||||
|
||||
if (stimer->config.enable)
|
||||
stimer_mark_pending(stimer, false);
|
||||
|
||||
@@ -3392,6 +3392,7 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
|
||||
case MSR_AMD64_PATCH_LOADER:
|
||||
case MSR_AMD64_BU_CFG2:
|
||||
case MSR_AMD64_DC_CFG:
|
||||
case MSR_AMD64_TW_CFG:
|
||||
case MSR_F15H_EX_CFG:
|
||||
break;
|
||||
|
||||
@@ -3732,6 +3733,7 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
|
||||
case MSR_AMD64_BU_CFG2:
|
||||
case MSR_IA32_PERF_CTL:
|
||||
case MSR_AMD64_DC_CFG:
|
||||
case MSR_AMD64_TW_CFG:
|
||||
case MSR_F15H_EX_CFG:
|
||||
/*
|
||||
* Intel Sandy Bridge CPUs must support the RAPL (running average power
|
||||
|
||||
@@ -601,13 +601,6 @@ static int __init numa_register_memblks(struct numa_meminfo *mi)
|
||||
if (start >= end)
|
||||
continue;
|
||||
|
||||
/*
|
||||
* Don't confuse VM with a node that doesn't have the
|
||||
* minimum amount of memory:
|
||||
*/
|
||||
if (end && (end - start) < NODE_MIN_SIZE)
|
||||
continue;
|
||||
|
||||
alloc_node_data(nid);
|
||||
}
|
||||
|
||||
|
||||
@@ -117,6 +117,8 @@ static int pcrypt_aead_encrypt(struct aead_request *req)
|
||||
err = padata_do_parallel(ictx->psenc, padata, &ctx->cb_cpu);
|
||||
if (!err)
|
||||
return -EINPROGRESS;
|
||||
if (err == -EBUSY)
|
||||
return -EAGAIN;
|
||||
|
||||
return err;
|
||||
}
|
||||
@@ -164,6 +166,8 @@ static int pcrypt_aead_decrypt(struct aead_request *req)
|
||||
err = padata_do_parallel(ictx->psdec, padata, &ctx->cb_cpu);
|
||||
if (!err)
|
||||
return -EINPROGRESS;
|
||||
if (err == -EBUSY)
|
||||
return -EAGAIN;
|
||||
|
||||
return err;
|
||||
}
|
||||
|
||||
@@ -194,12 +194,19 @@ static int fpdt_process_subtable(u64 address, u32 subtable_type)
|
||||
record_header = (void *)subtable_header + offset;
|
||||
offset += record_header->length;
|
||||
|
||||
if (!record_header->length) {
|
||||
pr_err(FW_BUG "Zero-length record found in FPTD.\n");
|
||||
result = -EINVAL;
|
||||
goto err;
|
||||
}
|
||||
|
||||
switch (record_header->type) {
|
||||
case RECORD_S3_RESUME:
|
||||
if (subtable_type != SUBTABLE_S3PT) {
|
||||
pr_err(FW_BUG "Invalid record %d for subtable %s\n",
|
||||
record_header->type, signature);
|
||||
return -EINVAL;
|
||||
result = -EINVAL;
|
||||
goto err;
|
||||
}
|
||||
if (record_resume) {
|
||||
pr_err("Duplicate resume performance record found.\n");
|
||||
@@ -208,7 +215,7 @@ static int fpdt_process_subtable(u64 address, u32 subtable_type)
|
||||
record_resume = (struct resume_performance_record *)record_header;
|
||||
result = sysfs_create_group(fpdt_kobj, &resume_attr_group);
|
||||
if (result)
|
||||
return result;
|
||||
goto err;
|
||||
break;
|
||||
case RECORD_S3_SUSPEND:
|
||||
if (subtable_type != SUBTABLE_S3PT) {
|
||||
@@ -223,13 +230,14 @@ static int fpdt_process_subtable(u64 address, u32 subtable_type)
|
||||
record_suspend = (struct suspend_performance_record *)record_header;
|
||||
result = sysfs_create_group(fpdt_kobj, &suspend_attr_group);
|
||||
if (result)
|
||||
return result;
|
||||
goto err;
|
||||
break;
|
||||
case RECORD_BOOT:
|
||||
if (subtable_type != SUBTABLE_FBPT) {
|
||||
pr_err(FW_BUG "Invalid %d for subtable %s\n",
|
||||
record_header->type, signature);
|
||||
return -EINVAL;
|
||||
result = -EINVAL;
|
||||
goto err;
|
||||
}
|
||||
if (record_boot) {
|
||||
pr_err("Duplicate boot performance record found.\n");
|
||||
@@ -238,7 +246,7 @@ static int fpdt_process_subtable(u64 address, u32 subtable_type)
|
||||
record_boot = (struct boot_performance_record *)record_header;
|
||||
result = sysfs_create_group(fpdt_kobj, &boot_attr_group);
|
||||
if (result)
|
||||
return result;
|
||||
goto err;
|
||||
break;
|
||||
|
||||
default:
|
||||
@@ -247,6 +255,18 @@ static int fpdt_process_subtable(u64 address, u32 subtable_type)
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
|
||||
err:
|
||||
if (record_boot)
|
||||
sysfs_remove_group(fpdt_kobj, &boot_attr_group);
|
||||
|
||||
if (record_suspend)
|
||||
sysfs_remove_group(fpdt_kobj, &suspend_attr_group);
|
||||
|
||||
if (record_resume)
|
||||
sysfs_remove_group(fpdt_kobj, &resume_attr_group);
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
static int __init acpi_init_fpdt(void)
|
||||
@@ -255,6 +275,7 @@ static int __init acpi_init_fpdt(void)
|
||||
struct acpi_table_header *header;
|
||||
struct fpdt_subtable_entry *subtable;
|
||||
u32 offset = sizeof(*header);
|
||||
int result;
|
||||
|
||||
status = acpi_get_table(ACPI_SIG_FPDT, 0, &header);
|
||||
|
||||
@@ -263,8 +284,8 @@ static int __init acpi_init_fpdt(void)
|
||||
|
||||
fpdt_kobj = kobject_create_and_add("fpdt", acpi_kobj);
|
||||
if (!fpdt_kobj) {
|
||||
acpi_put_table(header);
|
||||
return -ENOMEM;
|
||||
result = -ENOMEM;
|
||||
goto err_nomem;
|
||||
}
|
||||
|
||||
while (offset < header->length) {
|
||||
@@ -272,8 +293,10 @@ static int __init acpi_init_fpdt(void)
|
||||
switch (subtable->type) {
|
||||
case SUBTABLE_FBPT:
|
||||
case SUBTABLE_S3PT:
|
||||
fpdt_process_subtable(subtable->address,
|
||||
result = fpdt_process_subtable(subtable->address,
|
||||
subtable->type);
|
||||
if (result)
|
||||
goto err_subtable;
|
||||
break;
|
||||
default:
|
||||
/* Other types are reserved in ACPI 6.4 spec. */
|
||||
@@ -282,6 +305,12 @@ static int __init acpi_init_fpdt(void)
|
||||
offset += sizeof(*subtable);
|
||||
}
|
||||
return 0;
|
||||
err_subtable:
|
||||
kobject_put(fpdt_kobj);
|
||||
|
||||
err_nomem:
|
||||
acpi_put_table(header);
|
||||
return result;
|
||||
}
|
||||
|
||||
fs_initcall(acpi_init_fpdt);
|
||||
|
||||
@@ -467,6 +467,18 @@ static const struct dmi_system_id maingear_laptop[] = {
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "MG-VCP2-15A3070T"),
|
||||
}
|
||||
},
|
||||
{
|
||||
/* TongFang GMxXGxx/TUXEDO Polaris 15 Gen5 AMD */
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_BOARD_NAME, "GMxXGxx"),
|
||||
},
|
||||
},
|
||||
{
|
||||
/* TongFang GM6XGxX/TUXEDO Stellaris 16 Gen5 AMD */
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_BOARD_NAME, "GM6XGxX"),
|
||||
},
|
||||
},
|
||||
{
|
||||
.ident = "MAINGEAR Vector Pro 2 17",
|
||||
.matches = {
|
||||
|
||||
@@ -2293,19 +2293,21 @@ static int get_esi(struct atm_dev *dev)
|
||||
static int reset_sar(struct atm_dev *dev)
|
||||
{
|
||||
IADEV *iadev;
|
||||
int i, error = 1;
|
||||
int i, error;
|
||||
unsigned int pci[64];
|
||||
|
||||
iadev = INPH_IA_DEV(dev);
|
||||
for(i=0; i<64; i++)
|
||||
if ((error = pci_read_config_dword(iadev->pci,
|
||||
i*4, &pci[i])) != PCIBIOS_SUCCESSFUL)
|
||||
return error;
|
||||
for (i = 0; i < 64; i++) {
|
||||
error = pci_read_config_dword(iadev->pci, i * 4, &pci[i]);
|
||||
if (error != PCIBIOS_SUCCESSFUL)
|
||||
return error;
|
||||
}
|
||||
writel(0, iadev->reg+IPHASE5575_EXT_RESET);
|
||||
for(i=0; i<64; i++)
|
||||
if ((error = pci_write_config_dword(iadev->pci,
|
||||
i*4, pci[i])) != PCIBIOS_SUCCESSFUL)
|
||||
return error;
|
||||
for (i = 0; i < 64; i++) {
|
||||
error = pci_write_config_dword(iadev->pci, i * 4, pci[i]);
|
||||
if (error != PCIBIOS_SUCCESSFUL)
|
||||
return error;
|
||||
}
|
||||
udelay(5);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -1251,8 +1251,6 @@ static void __device_release_driver(struct device *dev, struct device *parent)
|
||||
else if (drv->remove)
|
||||
drv->remove(dev);
|
||||
|
||||
device_links_driver_cleanup(dev);
|
||||
|
||||
devres_release_all(dev);
|
||||
arch_teardown_dma_ops(dev);
|
||||
kfree(dev->dma_range_map);
|
||||
@@ -1264,6 +1262,8 @@ static void __device_release_driver(struct device *dev, struct device *parent)
|
||||
pm_runtime_reinit(dev);
|
||||
dev_pm_set_driver_flags(dev, 0);
|
||||
|
||||
device_links_driver_cleanup(dev);
|
||||
|
||||
klist_remove(&dev->p->knode_driver);
|
||||
device_pm_check_callbacks(dev);
|
||||
if (dev->bus)
|
||||
|
||||
@@ -325,6 +325,11 @@ static int regcache_default_sync(struct regmap *map, unsigned int min,
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int rbtree_all(const void *key, const struct rb_node *node)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* regcache_sync - Sync the register cache with the hardware.
|
||||
*
|
||||
@@ -342,6 +347,7 @@ int regcache_sync(struct regmap *map)
|
||||
unsigned int i;
|
||||
const char *name;
|
||||
bool bypass;
|
||||
struct rb_node *node;
|
||||
|
||||
if (WARN_ON(map->cache_type == REGCACHE_NONE))
|
||||
return -EINVAL;
|
||||
@@ -386,6 +392,30 @@ out:
|
||||
map->async = false;
|
||||
map->cache_bypass = bypass;
|
||||
map->no_sync_defaults = false;
|
||||
|
||||
/*
|
||||
* If we did any paging with cache bypassed and a cached
|
||||
* paging register then the register and cache state might
|
||||
* have gone out of sync, force writes of all the paging
|
||||
* registers.
|
||||
*/
|
||||
rb_for_each(node, 0, &map->range_tree, rbtree_all) {
|
||||
struct regmap_range_node *this =
|
||||
rb_entry(node, struct regmap_range_node, node);
|
||||
|
||||
/* If there's nothing in the cache there's nothing to sync */
|
||||
ret = regcache_read(map, this->selector_reg, &i);
|
||||
if (ret != 0)
|
||||
continue;
|
||||
|
||||
ret = _regmap_write(map, this->selector_reg, i);
|
||||
if (ret != 0) {
|
||||
dev_err(map->dev, "Failed to write %x = %x: %d\n",
|
||||
this->selector_reg, i, ret);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
map->unlock(map->lock_arg);
|
||||
|
||||
regmap_async_complete(map);
|
||||
|
||||
@@ -745,6 +745,7 @@ static int virtblk_probe(struct virtio_device *vdev)
|
||||
u16 min_io_size;
|
||||
u8 physical_block_exp, alignment_offset;
|
||||
unsigned int queue_depth;
|
||||
size_t max_dma_size;
|
||||
|
||||
if (!vdev->config->get) {
|
||||
dev_err(&vdev->dev, "%s failure: config access disabled\n",
|
||||
@@ -846,7 +847,8 @@ static int virtblk_probe(struct virtio_device *vdev)
|
||||
/* No real sector limit. */
|
||||
blk_queue_max_hw_sectors(q, -1U);
|
||||
|
||||
max_size = virtio_max_dma_size(vdev);
|
||||
max_dma_size = virtio_max_dma_size(vdev);
|
||||
max_size = max_dma_size > U32_MAX ? U32_MAX : max_dma_size;
|
||||
|
||||
/* Host can optionally specify maximum segment size and number of
|
||||
* segments. */
|
||||
|
||||
@@ -436,6 +436,18 @@ static const struct usb_device_id blacklist_table[] = {
|
||||
{ USB_DEVICE(0x13d3, 0x3586), .driver_info = BTUSB_REALTEK |
|
||||
BTUSB_WIDEBAND_SPEECH },
|
||||
|
||||
/* Realtek 8852BE Bluetooth devices */
|
||||
{ USB_DEVICE(0x0cb8, 0xc559), .driver_info = BTUSB_REALTEK |
|
||||
BTUSB_WIDEBAND_SPEECH },
|
||||
{ USB_DEVICE(0x0bda, 0x887b), .driver_info = BTUSB_REALTEK |
|
||||
BTUSB_WIDEBAND_SPEECH },
|
||||
{ USB_DEVICE(0x0bda, 0xb85b), .driver_info = BTUSB_REALTEK |
|
||||
BTUSB_WIDEBAND_SPEECH },
|
||||
{ USB_DEVICE(0x13d3, 0x3570), .driver_info = BTUSB_REALTEK |
|
||||
BTUSB_WIDEBAND_SPEECH },
|
||||
{ USB_DEVICE(0x13d3, 0x3571), .driver_info = BTUSB_REALTEK |
|
||||
BTUSB_WIDEBAND_SPEECH },
|
||||
|
||||
/* Realtek Bluetooth devices */
|
||||
{ USB_VENDOR_AND_INTERFACE_INFO(0x0bda, 0xe0, 0x01, 0x01),
|
||||
.driver_info = BTUSB_REALTEK },
|
||||
@@ -2497,6 +2509,9 @@ static int btusb_mtk_hci_wmt_sync(struct hci_dev *hdev,
|
||||
goto err_free_wc;
|
||||
}
|
||||
|
||||
if (data->evt_skb == NULL)
|
||||
goto err_free_wc;
|
||||
|
||||
/* Parse and handle the return WMT event */
|
||||
wmt_evt = (struct btmtk_hci_wmt_evt *)data->evt_skb->data;
|
||||
if (wmt_evt->whdr.op != hdr->op) {
|
||||
|
||||
@@ -75,7 +75,6 @@ static struct clk_fixed_factor gpll0_out_main_div2 = {
|
||||
&gpll0_main.clkr.hw },
|
||||
.num_parents = 1,
|
||||
.ops = &clk_fixed_factor_ops,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
},
|
||||
};
|
||||
|
||||
@@ -89,7 +88,6 @@ static struct clk_alpha_pll_postdiv gpll0 = {
|
||||
&gpll0_main.clkr.hw },
|
||||
.num_parents = 1,
|
||||
.ops = &clk_alpha_pll_postdiv_ro_ops,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
},
|
||||
};
|
||||
|
||||
@@ -164,7 +162,6 @@ static struct clk_alpha_pll_postdiv gpll6 = {
|
||||
&gpll6_main.clkr.hw },
|
||||
.num_parents = 1,
|
||||
.ops = &clk_alpha_pll_postdiv_ro_ops,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
},
|
||||
};
|
||||
|
||||
@@ -195,7 +192,6 @@ static struct clk_alpha_pll_postdiv gpll4 = {
|
||||
&gpll4_main.clkr.hw },
|
||||
.num_parents = 1,
|
||||
.ops = &clk_alpha_pll_postdiv_ro_ops,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
},
|
||||
};
|
||||
|
||||
@@ -246,7 +242,6 @@ static struct clk_alpha_pll_postdiv gpll2 = {
|
||||
&gpll2_main.clkr.hw },
|
||||
.num_parents = 1,
|
||||
.ops = &clk_alpha_pll_postdiv_ro_ops,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
},
|
||||
};
|
||||
|
||||
@@ -277,7 +272,6 @@ static struct clk_alpha_pll_postdiv nss_crypto_pll = {
|
||||
&nss_crypto_pll_main.clkr.hw },
|
||||
.num_parents = 1,
|
||||
.ops = &clk_alpha_pll_postdiv_ro_ops,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
},
|
||||
};
|
||||
|
||||
|
||||
@@ -418,7 +418,6 @@ static struct clk_fixed_factor gpll0_out_main_div2 = {
|
||||
},
|
||||
.num_parents = 1,
|
||||
.ops = &clk_fixed_factor_ops,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
},
|
||||
};
|
||||
|
||||
@@ -465,7 +464,6 @@ static struct clk_alpha_pll_postdiv gpll2 = {
|
||||
},
|
||||
.num_parents = 1,
|
||||
.ops = &clk_alpha_pll_postdiv_ro_ops,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
},
|
||||
};
|
||||
|
||||
@@ -498,7 +496,6 @@ static struct clk_alpha_pll_postdiv gpll4 = {
|
||||
},
|
||||
.num_parents = 1,
|
||||
.ops = &clk_alpha_pll_postdiv_ro_ops,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
},
|
||||
};
|
||||
|
||||
@@ -532,7 +529,6 @@ static struct clk_alpha_pll_postdiv gpll6 = {
|
||||
},
|
||||
.num_parents = 1,
|
||||
.ops = &clk_alpha_pll_postdiv_ro_ops,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
},
|
||||
};
|
||||
|
||||
@@ -546,7 +542,6 @@ static struct clk_fixed_factor gpll6_out_main_div2 = {
|
||||
},
|
||||
.num_parents = 1,
|
||||
.ops = &clk_fixed_factor_ops,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
},
|
||||
};
|
||||
|
||||
@@ -611,7 +606,6 @@ static struct clk_alpha_pll_postdiv nss_crypto_pll = {
|
||||
},
|
||||
.num_parents = 1,
|
||||
.ops = &clk_alpha_pll_postdiv_ro_ops,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
},
|
||||
};
|
||||
|
||||
|
||||
@@ -7,8 +7,10 @@
|
||||
#define __STRATIX10_CLK_H
|
||||
|
||||
struct stratix10_clock_data {
|
||||
struct clk_hw_onecell_data clk_data;
|
||||
void __iomem *base;
|
||||
|
||||
/* Must be last */
|
||||
struct clk_hw_onecell_data clk_data;
|
||||
};
|
||||
|
||||
struct stratix10_pll_clock {
|
||||
|
||||
@@ -315,6 +315,7 @@ static void __init tcb_setup_dual_chan(struct atmel_tc *tc, int mck_divisor_idx)
|
||||
writel(mck_divisor_idx /* likely divide-by-8 */
|
||||
| ATMEL_TC_WAVE
|
||||
| ATMEL_TC_WAVESEL_UP /* free-run */
|
||||
| ATMEL_TC_ASWTRG_SET /* TIOA0 rises at software trigger */
|
||||
| ATMEL_TC_ACPA_SET /* TIOA0 rises at 0 */
|
||||
| ATMEL_TC_ACPC_CLEAR, /* (duty cycle 50%) */
|
||||
tcaddr + ATMEL_TC_REG(0, CMR));
|
||||
|
||||
@@ -454,12 +454,16 @@ static int __init mxc_timer_init_dt(struct device_node *np, enum imx_gpt_type t
|
||||
return -ENOMEM;
|
||||
|
||||
imxtm->base = of_iomap(np, 0);
|
||||
if (!imxtm->base)
|
||||
return -ENXIO;
|
||||
if (!imxtm->base) {
|
||||
ret = -ENXIO;
|
||||
goto err_kfree;
|
||||
}
|
||||
|
||||
imxtm->irq = irq_of_parse_and_map(np, 0);
|
||||
if (imxtm->irq <= 0)
|
||||
return -EINVAL;
|
||||
if (imxtm->irq <= 0) {
|
||||
ret = -EINVAL;
|
||||
goto err_kfree;
|
||||
}
|
||||
|
||||
imxtm->clk_ipg = of_clk_get_by_name(np, "ipg");
|
||||
|
||||
@@ -472,11 +476,15 @@ static int __init mxc_timer_init_dt(struct device_node *np, enum imx_gpt_type t
|
||||
|
||||
ret = _mxc_timer_init(imxtm);
|
||||
if (ret)
|
||||
return ret;
|
||||
goto err_kfree;
|
||||
|
||||
initialized = 1;
|
||||
|
||||
return 0;
|
||||
|
||||
err_kfree:
|
||||
kfree(imxtm);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int __init imx1_timer_init_dt(struct device_node *np)
|
||||
|
||||
@@ -131,25 +131,25 @@ static ssize_t show_trans_table(struct cpufreq_policy *policy, char *buf)
|
||||
len += scnprintf(buf + len, PAGE_SIZE - len, " From : To\n");
|
||||
len += scnprintf(buf + len, PAGE_SIZE - len, " : ");
|
||||
for (i = 0; i < stats->state_num; i++) {
|
||||
if (len >= PAGE_SIZE)
|
||||
if (len >= PAGE_SIZE - 1)
|
||||
break;
|
||||
len += scnprintf(buf + len, PAGE_SIZE - len, "%9u ",
|
||||
stats->freq_table[i]);
|
||||
}
|
||||
if (len >= PAGE_SIZE)
|
||||
return PAGE_SIZE;
|
||||
if (len >= PAGE_SIZE - 1)
|
||||
return PAGE_SIZE - 1;
|
||||
|
||||
len += scnprintf(buf + len, PAGE_SIZE - len, "\n");
|
||||
|
||||
for (i = 0; i < stats->state_num; i++) {
|
||||
if (len >= PAGE_SIZE)
|
||||
if (len >= PAGE_SIZE - 1)
|
||||
break;
|
||||
|
||||
len += scnprintf(buf + len, PAGE_SIZE - len, "%9u: ",
|
||||
stats->freq_table[i]);
|
||||
|
||||
for (j = 0; j < stats->state_num; j++) {
|
||||
if (len >= PAGE_SIZE)
|
||||
if (len >= PAGE_SIZE - 1)
|
||||
break;
|
||||
|
||||
if (pending)
|
||||
@@ -159,12 +159,12 @@ static ssize_t show_trans_table(struct cpufreq_policy *policy, char *buf)
|
||||
|
||||
len += scnprintf(buf + len, PAGE_SIZE - len, "%9u ", count);
|
||||
}
|
||||
if (len >= PAGE_SIZE)
|
||||
if (len >= PAGE_SIZE - 1)
|
||||
break;
|
||||
len += scnprintf(buf + len, PAGE_SIZE - len, "\n");
|
||||
}
|
||||
|
||||
if (len >= PAGE_SIZE) {
|
||||
if (len >= PAGE_SIZE - 1) {
|
||||
pr_warn_once("cpufreq transition table exceeds PAGE_SIZE. Disabling\n");
|
||||
return -EFBIG;
|
||||
}
|
||||
|
||||
@@ -509,7 +509,7 @@ static int stm32_mdma_set_xfer_param(struct stm32_mdma_chan *chan,
|
||||
src_maxburst = chan->dma_config.src_maxburst;
|
||||
dst_maxburst = chan->dma_config.dst_maxburst;
|
||||
|
||||
ccr = stm32_mdma_read(dmadev, STM32_MDMA_CCR(chan->id));
|
||||
ccr = stm32_mdma_read(dmadev, STM32_MDMA_CCR(chan->id)) & ~STM32_MDMA_CCR_EN;
|
||||
ctcr = stm32_mdma_read(dmadev, STM32_MDMA_CTCR(chan->id));
|
||||
ctbr = stm32_mdma_read(dmadev, STM32_MDMA_CTBR(chan->id));
|
||||
|
||||
@@ -937,7 +937,7 @@ stm32_mdma_prep_dma_memcpy(struct dma_chan *c, dma_addr_t dest, dma_addr_t src,
|
||||
if (!desc)
|
||||
return NULL;
|
||||
|
||||
ccr = stm32_mdma_read(dmadev, STM32_MDMA_CCR(chan->id));
|
||||
ccr = stm32_mdma_read(dmadev, STM32_MDMA_CCR(chan->id)) & ~STM32_MDMA_CCR_EN;
|
||||
ctcr = stm32_mdma_read(dmadev, STM32_MDMA_CTCR(chan->id));
|
||||
ctbr = stm32_mdma_read(dmadev, STM32_MDMA_CTBR(chan->id));
|
||||
cbndtr = stm32_mdma_read(dmadev, STM32_MDMA_CBNDTR(chan->id));
|
||||
|
||||
@@ -136,6 +136,12 @@ static enum qcom_scm_convention __get_convention(void)
|
||||
if (likely(qcom_scm_convention != SMC_CONVENTION_UNKNOWN))
|
||||
return qcom_scm_convention;
|
||||
|
||||
/*
|
||||
* Per the "SMC calling convention specification", the 64-bit calling
|
||||
* convention can only be used when the client is 64-bit, otherwise
|
||||
* system will encounter the undefined behaviour.
|
||||
*/
|
||||
#if IS_ENABLED(CONFIG_ARM64)
|
||||
/*
|
||||
* Device isn't required as there is only one argument - no device
|
||||
* needed to dma_map_single to secure world
|
||||
@@ -156,6 +162,7 @@ static enum qcom_scm_convention __get_convention(void)
|
||||
forced = true;
|
||||
goto found;
|
||||
}
|
||||
#endif
|
||||
|
||||
probed_convention = SMC_CONVENTION_ARM_32;
|
||||
ret = __scm_smc_call(NULL, &desc, probed_convention, &res, true);
|
||||
|
||||
@@ -29,6 +29,7 @@
|
||||
#include "amdgpu.h"
|
||||
#include "atom.h"
|
||||
|
||||
#include <linux/device.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/acpi.h>
|
||||
@@ -289,6 +290,10 @@ static bool amdgpu_atrm_get_bios(struct amdgpu_device *adev)
|
||||
if (adev->flags & AMD_IS_APU)
|
||||
return false;
|
||||
|
||||
/* ATRM is for on-platform devices only */
|
||||
if (dev_is_removable(&adev->pdev->dev))
|
||||
return false;
|
||||
|
||||
while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, pdev)) != NULL) {
|
||||
dhandle = ACPI_HANDLE(&pdev->dev);
|
||||
if (!dhandle)
|
||||
|
||||
@@ -178,6 +178,7 @@ int amdgpu_bo_list_get(struct amdgpu_fpriv *fpriv, int id,
|
||||
}
|
||||
|
||||
rcu_read_unlock();
|
||||
*result = NULL;
|
||||
return -ENOENT;
|
||||
}
|
||||
|
||||
|
||||
@@ -458,6 +458,9 @@ static ssize_t amdgpu_debugfs_regs_smc_read(struct file *f, char __user *buf,
|
||||
ssize_t result = 0;
|
||||
int r;
|
||||
|
||||
if (!adev->smc_rreg)
|
||||
return -EPERM;
|
||||
|
||||
if (size & 0x3 || *pos & 0x3)
|
||||
return -EINVAL;
|
||||
|
||||
@@ -517,6 +520,9 @@ static ssize_t amdgpu_debugfs_regs_smc_write(struct file *f, const char __user *
|
||||
ssize_t result = 0;
|
||||
int r;
|
||||
|
||||
if (!adev->smc_wreg)
|
||||
return -EPERM;
|
||||
|
||||
if (size & 0x3 || *pos & 0x3)
|
||||
return -EINVAL;
|
||||
|
||||
|
||||
@@ -5116,7 +5116,8 @@ int amdgpu_device_gpu_recover(struct amdgpu_device *adev,
|
||||
* Flush RAM to disk so that after reboot
|
||||
* the user can read log and see why the system rebooted.
|
||||
*/
|
||||
if (need_emergency_restart && amdgpu_ras_get_context(adev)->reboot) {
|
||||
if (need_emergency_restart && amdgpu_ras_get_context(adev) &&
|
||||
amdgpu_ras_get_context(adev)->reboot) {
|
||||
DRM_WARN("Emergency reboot.");
|
||||
|
||||
ksys_sync_helper();
|
||||
|
||||
@@ -1192,7 +1192,8 @@ static void amdgpu_ras_sysfs_remove_bad_page_node(struct amdgpu_device *adev)
|
||||
{
|
||||
struct amdgpu_ras *con = amdgpu_ras_get_context(adev);
|
||||
|
||||
sysfs_remove_file_from_group(&adev->dev->kobj,
|
||||
if (adev->dev->kobj.sd)
|
||||
sysfs_remove_file_from_group(&adev->dev->kobj,
|
||||
&con->badpages_attr.attr,
|
||||
RAS_FS_NAME);
|
||||
}
|
||||
@@ -1209,7 +1210,8 @@ static int amdgpu_ras_sysfs_remove_feature_node(struct amdgpu_device *adev)
|
||||
.attrs = attrs,
|
||||
};
|
||||
|
||||
sysfs_remove_group(&adev->dev->kobj, &group);
|
||||
if (adev->dev->kobj.sd)
|
||||
sysfs_remove_group(&adev->dev->kobj, &group);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -1257,7 +1259,8 @@ int amdgpu_ras_sysfs_remove(struct amdgpu_device *adev,
|
||||
if (!obj || !obj->attr_inuse)
|
||||
return -EINVAL;
|
||||
|
||||
sysfs_remove_file_from_group(&adev->dev->kobj,
|
||||
if (adev->dev->kobj.sd)
|
||||
sysfs_remove_file_from_group(&adev->dev->kobj,
|
||||
&obj->sysfs_attr.attr,
|
||||
RAS_FS_NAME);
|
||||
obj->attr_inuse = 0;
|
||||
|
||||
@@ -238,6 +238,8 @@ static int amdgpu_vkms_conn_get_modes(struct drm_connector *connector)
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(common_modes); i++) {
|
||||
mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false);
|
||||
if (!mode)
|
||||
continue;
|
||||
drm_mode_probed_add(connector, mode);
|
||||
}
|
||||
|
||||
|
||||
@@ -550,8 +550,15 @@ create_bo_failed:
|
||||
|
||||
void svm_range_vram_node_free(struct svm_range *prange)
|
||||
{
|
||||
svm_range_bo_unref(prange->svm_bo);
|
||||
prange->ttm_res = NULL;
|
||||
/* serialize prange->svm_bo unref */
|
||||
mutex_lock(&prange->lock);
|
||||
/* prange->svm_bo has not been unref */
|
||||
if (prange->ttm_res) {
|
||||
prange->ttm_res = NULL;
|
||||
mutex_unlock(&prange->lock);
|
||||
svm_range_bo_unref(prange->svm_bo);
|
||||
} else
|
||||
mutex_unlock(&prange->lock);
|
||||
}
|
||||
|
||||
struct amdgpu_device *
|
||||
@@ -691,7 +698,7 @@ svm_range_apply_attrs(struct kfd_process *p, struct svm_range *prange,
|
||||
prange->flags &= ~attrs[i].value;
|
||||
break;
|
||||
case KFD_IOCTL_SVM_ATTR_GRANULARITY:
|
||||
prange->granularity = attrs[i].value;
|
||||
prange->granularity = min_t(uint32_t, attrs[i].value, 0x3F);
|
||||
break;
|
||||
default:
|
||||
WARN_ONCE(1, "svm_range_check_attrs wasn't called?");
|
||||
|
||||
@@ -1911,7 +1911,7 @@ static int dm_dmub_sw_init(struct amdgpu_device *adev)
|
||||
struct dmub_srv_create_params create_params;
|
||||
struct dmub_srv_region_params region_params;
|
||||
struct dmub_srv_region_info region_info;
|
||||
struct dmub_srv_fb_params fb_params;
|
||||
struct dmub_srv_memory_params memory_params;
|
||||
struct dmub_srv_fb_info *fb_info;
|
||||
struct dmub_srv *dmub_srv;
|
||||
const struct dmcub_firmware_header_v1_0 *hdr;
|
||||
@@ -2021,6 +2021,7 @@ static int dm_dmub_sw_init(struct amdgpu_device *adev)
|
||||
adev->dm.dmub_fw->data +
|
||||
le32_to_cpu(hdr->header.ucode_array_offset_bytes) +
|
||||
PSP_HEADER_BYTES;
|
||||
region_params.is_mailbox_in_inbox = false;
|
||||
|
||||
status = dmub_srv_calc_region_info(dmub_srv, ®ion_params,
|
||||
®ion_info);
|
||||
@@ -2042,10 +2043,10 @@ static int dm_dmub_sw_init(struct amdgpu_device *adev)
|
||||
return r;
|
||||
|
||||
/* Rebase the regions on the framebuffer address. */
|
||||
memset(&fb_params, 0, sizeof(fb_params));
|
||||
fb_params.cpu_addr = adev->dm.dmub_bo_cpu_addr;
|
||||
fb_params.gpu_addr = adev->dm.dmub_bo_gpu_addr;
|
||||
fb_params.region_info = ®ion_info;
|
||||
memset(&memory_params, 0, sizeof(memory_params));
|
||||
memory_params.cpu_fb_addr = adev->dm.dmub_bo_cpu_addr;
|
||||
memory_params.gpu_fb_addr = adev->dm.dmub_bo_gpu_addr;
|
||||
memory_params.region_info = ®ion_info;
|
||||
|
||||
adev->dm.dmub_fb_info =
|
||||
kzalloc(sizeof(*adev->dm.dmub_fb_info), GFP_KERNEL);
|
||||
@@ -2057,7 +2058,7 @@ static int dm_dmub_sw_init(struct amdgpu_device *adev)
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
status = dmub_srv_calc_fb_info(dmub_srv, &fb_params, fb_info);
|
||||
status = dmub_srv_calc_mem_info(dmub_srv, &memory_params, fb_info);
|
||||
if (status != DMUB_STATUS_OK) {
|
||||
DRM_ERROR("Error calculating DMUB FB info: %d\n", status);
|
||||
return -EINVAL;
|
||||
|
||||
@@ -886,7 +886,8 @@ static bool dc_construct(struct dc *dc,
|
||||
/* set i2c speed if not done by the respective dcnxxx__resource.c */
|
||||
if (dc->caps.i2c_speed_in_khz_hdcp == 0)
|
||||
dc->caps.i2c_speed_in_khz_hdcp = dc->caps.i2c_speed_in_khz;
|
||||
|
||||
if (dc->caps.max_optimizable_video_width == 0)
|
||||
dc->caps.max_optimizable_video_width = 5120;
|
||||
dc->clk_mgr = dc_clk_mgr_create(dc->ctx, dc->res_pool->pp_smu, dc->res_pool->dccg);
|
||||
if (!dc->clk_mgr)
|
||||
goto fail;
|
||||
@@ -2053,6 +2054,7 @@ static enum surface_update_type get_plane_info_update_type(const struct dc_surfa
|
||||
}
|
||||
|
||||
static enum surface_update_type get_scaling_info_update_type(
|
||||
const struct dc *dc,
|
||||
const struct dc_surface_update *u)
|
||||
{
|
||||
union surface_update_flags *update_flags = &u->surface->update_flags;
|
||||
@@ -2087,6 +2089,12 @@ static enum surface_update_type get_scaling_info_update_type(
|
||||
update_flags->bits.clock_change = 1;
|
||||
}
|
||||
|
||||
if (u->scaling_info->src_rect.width > dc->caps.max_optimizable_video_width &&
|
||||
(u->scaling_info->clip_rect.width > u->surface->clip_rect.width ||
|
||||
u->scaling_info->clip_rect.height > u->surface->clip_rect.height))
|
||||
/* Changing clip size of a large surface may result in MPC slice count change */
|
||||
update_flags->bits.bandwidth_change = 1;
|
||||
|
||||
if (u->scaling_info->src_rect.x != u->surface->src_rect.x
|
||||
|| u->scaling_info->src_rect.y != u->surface->src_rect.y
|
||||
|| u->scaling_info->clip_rect.x != u->surface->clip_rect.x
|
||||
@@ -2124,7 +2132,7 @@ static enum surface_update_type det_surface_update(const struct dc *dc,
|
||||
type = get_plane_info_update_type(u);
|
||||
elevate_update_type(&overall_type, type);
|
||||
|
||||
type = get_scaling_info_update_type(u);
|
||||
type = get_scaling_info_update_type(dc, u);
|
||||
elevate_update_type(&overall_type, type);
|
||||
|
||||
if (u->flip_addr)
|
||||
|
||||
@@ -562,7 +562,7 @@ uint32_t dc_stream_get_vblank_counter(const struct dc_stream_state *stream)
|
||||
for (i = 0; i < MAX_PIPES; i++) {
|
||||
struct timing_generator *tg = res_ctx->pipe_ctx[i].stream_res.tg;
|
||||
|
||||
if (res_ctx->pipe_ctx[i].stream != stream)
|
||||
if (res_ctx->pipe_ctx[i].stream != stream || !tg)
|
||||
continue;
|
||||
|
||||
return tg->funcs->get_frame_count(tg);
|
||||
@@ -621,7 +621,7 @@ bool dc_stream_get_scanoutpos(const struct dc_stream_state *stream,
|
||||
for (i = 0; i < MAX_PIPES; i++) {
|
||||
struct timing_generator *tg = res_ctx->pipe_ctx[i].stream_res.tg;
|
||||
|
||||
if (res_ctx->pipe_ctx[i].stream != stream)
|
||||
if (res_ctx->pipe_ctx[i].stream != stream || !tg)
|
||||
continue;
|
||||
|
||||
tg->funcs->get_scanoutpos(tg,
|
||||
|
||||
@@ -164,6 +164,11 @@ struct dc_caps {
|
||||
uint32_t dmdata_alloc_size;
|
||||
unsigned int max_cursor_size;
|
||||
unsigned int max_video_width;
|
||||
/*
|
||||
* max video plane width that can be safely assumed to be always
|
||||
* supported by single DPP pipe.
|
||||
*/
|
||||
unsigned int max_optimizable_video_width;
|
||||
unsigned int min_horizontal_blanking_period;
|
||||
int linear_pitch_alignment;
|
||||
bool dcc_const_color;
|
||||
|
||||
@@ -166,6 +166,7 @@ struct dmub_srv_region_params {
|
||||
uint32_t vbios_size;
|
||||
const uint8_t *fw_inst_const;
|
||||
const uint8_t *fw_bss_data;
|
||||
bool is_mailbox_in_inbox;
|
||||
};
|
||||
|
||||
/**
|
||||
@@ -185,20 +186,25 @@ struct dmub_srv_region_params {
|
||||
*/
|
||||
struct dmub_srv_region_info {
|
||||
uint32_t fb_size;
|
||||
uint32_t inbox_size;
|
||||
uint8_t num_regions;
|
||||
struct dmub_region regions[DMUB_WINDOW_TOTAL];
|
||||
};
|
||||
|
||||
/**
|
||||
* struct dmub_srv_fb_params - parameters used for driver fb setup
|
||||
* struct dmub_srv_memory_params - parameters used for driver fb setup
|
||||
* @region_info: region info calculated by dmub service
|
||||
* @cpu_addr: base cpu address for the framebuffer
|
||||
* @gpu_addr: base gpu virtual address for the framebuffer
|
||||
* @cpu_fb_addr: base cpu address for the framebuffer
|
||||
* @cpu_inbox_addr: base cpu address for the gart
|
||||
* @gpu_fb_addr: base gpu virtual address for the framebuffer
|
||||
* @gpu_inbox_addr: base gpu virtual address for the gart
|
||||
*/
|
||||
struct dmub_srv_fb_params {
|
||||
struct dmub_srv_memory_params {
|
||||
const struct dmub_srv_region_info *region_info;
|
||||
void *cpu_addr;
|
||||
uint64_t gpu_addr;
|
||||
void *cpu_fb_addr;
|
||||
void *cpu_inbox_addr;
|
||||
uint64_t gpu_fb_addr;
|
||||
uint64_t gpu_inbox_addr;
|
||||
};
|
||||
|
||||
/**
|
||||
@@ -496,8 +502,8 @@ dmub_srv_calc_region_info(struct dmub_srv *dmub,
|
||||
* DMUB_STATUS_OK - success
|
||||
* DMUB_STATUS_INVALID - unspecified error
|
||||
*/
|
||||
enum dmub_status dmub_srv_calc_fb_info(struct dmub_srv *dmub,
|
||||
const struct dmub_srv_fb_params *params,
|
||||
enum dmub_status dmub_srv_calc_mem_info(struct dmub_srv *dmub,
|
||||
const struct dmub_srv_memory_params *params,
|
||||
struct dmub_srv_fb_info *out);
|
||||
|
||||
/**
|
||||
|
||||
@@ -318,7 +318,7 @@ dmub_srv_calc_region_info(struct dmub_srv *dmub,
|
||||
uint32_t fw_state_size = DMUB_FW_STATE_SIZE;
|
||||
uint32_t trace_buffer_size = DMUB_TRACE_BUFFER_SIZE;
|
||||
uint32_t scratch_mem_size = DMUB_SCRATCH_MEM_SIZE;
|
||||
|
||||
uint32_t previous_top = 0;
|
||||
if (!dmub->sw_init)
|
||||
return DMUB_STATUS_INVALID;
|
||||
|
||||
@@ -343,8 +343,15 @@ dmub_srv_calc_region_info(struct dmub_srv *dmub,
|
||||
bios->base = dmub_align(stack->top, 256);
|
||||
bios->top = bios->base + params->vbios_size;
|
||||
|
||||
mail->base = dmub_align(bios->top, 256);
|
||||
mail->top = mail->base + DMUB_MAILBOX_SIZE;
|
||||
if (params->is_mailbox_in_inbox) {
|
||||
mail->base = 0;
|
||||
mail->top = mail->base + DMUB_MAILBOX_SIZE;
|
||||
previous_top = bios->top;
|
||||
} else {
|
||||
mail->base = dmub_align(bios->top, 256);
|
||||
mail->top = mail->base + DMUB_MAILBOX_SIZE;
|
||||
previous_top = mail->top;
|
||||
}
|
||||
|
||||
fw_info = dmub_get_fw_meta_info(params);
|
||||
|
||||
@@ -363,7 +370,7 @@ dmub_srv_calc_region_info(struct dmub_srv *dmub,
|
||||
dmub->fw_version = fw_info->fw_version;
|
||||
}
|
||||
|
||||
trace_buff->base = dmub_align(mail->top, 256);
|
||||
trace_buff->base = dmub_align(previous_top, 256);
|
||||
trace_buff->top = trace_buff->base + dmub_align(trace_buffer_size, 64);
|
||||
|
||||
fw_state->base = dmub_align(trace_buff->top, 256);
|
||||
@@ -374,11 +381,14 @@ dmub_srv_calc_region_info(struct dmub_srv *dmub,
|
||||
|
||||
out->fb_size = dmub_align(scratch_mem->top, 4096);
|
||||
|
||||
if (params->is_mailbox_in_inbox)
|
||||
out->inbox_size = dmub_align(mail->top, 4096);
|
||||
|
||||
return DMUB_STATUS_OK;
|
||||
}
|
||||
|
||||
enum dmub_status dmub_srv_calc_fb_info(struct dmub_srv *dmub,
|
||||
const struct dmub_srv_fb_params *params,
|
||||
enum dmub_status dmub_srv_calc_mem_info(struct dmub_srv *dmub,
|
||||
const struct dmub_srv_memory_params *params,
|
||||
struct dmub_srv_fb_info *out)
|
||||
{
|
||||
uint8_t *cpu_base;
|
||||
@@ -393,8 +403,8 @@ enum dmub_status dmub_srv_calc_fb_info(struct dmub_srv *dmub,
|
||||
if (params->region_info->num_regions != DMUB_NUM_WINDOWS)
|
||||
return DMUB_STATUS_INVALID;
|
||||
|
||||
cpu_base = (uint8_t *)params->cpu_addr;
|
||||
gpu_base = params->gpu_addr;
|
||||
cpu_base = (uint8_t *)params->cpu_fb_addr;
|
||||
gpu_base = params->gpu_fb_addr;
|
||||
|
||||
for (i = 0; i < DMUB_NUM_WINDOWS; ++i) {
|
||||
const struct dmub_region *reg =
|
||||
@@ -402,6 +412,12 @@ enum dmub_status dmub_srv_calc_fb_info(struct dmub_srv *dmub,
|
||||
|
||||
out->fb[i].cpu_addr = cpu_base + reg->base;
|
||||
out->fb[i].gpu_addr = gpu_base + reg->base;
|
||||
|
||||
if (i == DMUB_WINDOW_4_MAILBOX && params->cpu_inbox_addr != 0) {
|
||||
out->fb[i].cpu_addr = (uint8_t *)params->cpu_inbox_addr + reg->base;
|
||||
out->fb[i].gpu_addr = params->gpu_inbox_addr + reg->base;
|
||||
}
|
||||
|
||||
out->fb[i].size = reg->top - reg->base;
|
||||
}
|
||||
|
||||
|
||||
@@ -78,7 +78,7 @@ typedef struct _ATOM_PPLIB_THERMALCONTROLLER
|
||||
typedef struct _ATOM_PPLIB_STATE
|
||||
{
|
||||
UCHAR ucNonClockStateIndex;
|
||||
UCHAR ucClockStateIndices[1]; // variable-sized
|
||||
UCHAR ucClockStateIndices[]; // variable-sized
|
||||
} ATOM_PPLIB_STATE;
|
||||
|
||||
|
||||
@@ -473,7 +473,7 @@ typedef struct _ATOM_PPLIB_STATE_V2
|
||||
/**
|
||||
* Driver will read the first ucNumDPMLevels in this array
|
||||
*/
|
||||
UCHAR clockInfoIndex[1];
|
||||
UCHAR clockInfoIndex[];
|
||||
} ATOM_PPLIB_STATE_V2;
|
||||
|
||||
typedef struct _StateArray{
|
||||
|
||||
@@ -807,7 +807,7 @@ static ssize_t amdgpu_set_pp_od_clk_voltage(struct device *dev,
|
||||
if (adev->in_suspend && !adev->in_runpm)
|
||||
return -EPERM;
|
||||
|
||||
if (count > 127)
|
||||
if (count > 127 || count == 0)
|
||||
return -EINVAL;
|
||||
|
||||
if (*buf == 's')
|
||||
@@ -827,7 +827,8 @@ static ssize_t amdgpu_set_pp_od_clk_voltage(struct device *dev,
|
||||
else
|
||||
return -EINVAL;
|
||||
|
||||
memcpy(buf_cpy, buf, count+1);
|
||||
memcpy(buf_cpy, buf, count);
|
||||
buf_cpy[count] = 0;
|
||||
|
||||
tmp_str = buf_cpy;
|
||||
|
||||
@@ -844,6 +845,9 @@ static ssize_t amdgpu_set_pp_od_clk_voltage(struct device *dev,
|
||||
return -EINVAL;
|
||||
parameter_size++;
|
||||
|
||||
if (!tmp_str)
|
||||
break;
|
||||
|
||||
while (isspace(*tmp_str))
|
||||
tmp_str++;
|
||||
}
|
||||
|
||||
@@ -164,7 +164,7 @@ typedef struct _ATOM_Tonga_State {
|
||||
typedef struct _ATOM_Tonga_State_Array {
|
||||
UCHAR ucRevId;
|
||||
UCHAR ucNumEntries; /* Number of entries. */
|
||||
ATOM_Tonga_State entries[1]; /* Dynamically allocate entries. */
|
||||
ATOM_Tonga_State entries[]; /* Dynamically allocate entries. */
|
||||
} ATOM_Tonga_State_Array;
|
||||
|
||||
typedef struct _ATOM_Tonga_MCLK_Dependency_Record {
|
||||
@@ -179,7 +179,7 @@ typedef struct _ATOM_Tonga_MCLK_Dependency_Record {
|
||||
typedef struct _ATOM_Tonga_MCLK_Dependency_Table {
|
||||
UCHAR ucRevId;
|
||||
UCHAR ucNumEntries; /* Number of entries. */
|
||||
ATOM_Tonga_MCLK_Dependency_Record entries[1]; /* Dynamically allocate entries. */
|
||||
ATOM_Tonga_MCLK_Dependency_Record entries[]; /* Dynamically allocate entries. */
|
||||
} ATOM_Tonga_MCLK_Dependency_Table;
|
||||
|
||||
typedef struct _ATOM_Tonga_SCLK_Dependency_Record {
|
||||
@@ -194,7 +194,7 @@ typedef struct _ATOM_Tonga_SCLK_Dependency_Record {
|
||||
typedef struct _ATOM_Tonga_SCLK_Dependency_Table {
|
||||
UCHAR ucRevId;
|
||||
UCHAR ucNumEntries; /* Number of entries. */
|
||||
ATOM_Tonga_SCLK_Dependency_Record entries[1]; /* Dynamically allocate entries. */
|
||||
ATOM_Tonga_SCLK_Dependency_Record entries[]; /* Dynamically allocate entries. */
|
||||
} ATOM_Tonga_SCLK_Dependency_Table;
|
||||
|
||||
typedef struct _ATOM_Polaris_SCLK_Dependency_Record {
|
||||
@@ -210,7 +210,7 @@ typedef struct _ATOM_Polaris_SCLK_Dependency_Record {
|
||||
typedef struct _ATOM_Polaris_SCLK_Dependency_Table {
|
||||
UCHAR ucRevId;
|
||||
UCHAR ucNumEntries; /* Number of entries. */
|
||||
ATOM_Polaris_SCLK_Dependency_Record entries[1]; /* Dynamically allocate entries. */
|
||||
ATOM_Polaris_SCLK_Dependency_Record entries[]; /* Dynamically allocate entries. */
|
||||
} ATOM_Polaris_SCLK_Dependency_Table;
|
||||
|
||||
typedef struct _ATOM_Tonga_PCIE_Record {
|
||||
@@ -222,7 +222,7 @@ typedef struct _ATOM_Tonga_PCIE_Record {
|
||||
typedef struct _ATOM_Tonga_PCIE_Table {
|
||||
UCHAR ucRevId;
|
||||
UCHAR ucNumEntries; /* Number of entries. */
|
||||
ATOM_Tonga_PCIE_Record entries[1]; /* Dynamically allocate entries. */
|
||||
ATOM_Tonga_PCIE_Record entries[]; /* Dynamically allocate entries. */
|
||||
} ATOM_Tonga_PCIE_Table;
|
||||
|
||||
typedef struct _ATOM_Polaris10_PCIE_Record {
|
||||
@@ -235,7 +235,7 @@ typedef struct _ATOM_Polaris10_PCIE_Record {
|
||||
typedef struct _ATOM_Polaris10_PCIE_Table {
|
||||
UCHAR ucRevId;
|
||||
UCHAR ucNumEntries; /* Number of entries. */
|
||||
ATOM_Polaris10_PCIE_Record entries[1]; /* Dynamically allocate entries. */
|
||||
ATOM_Polaris10_PCIE_Record entries[]; /* Dynamically allocate entries. */
|
||||
} ATOM_Polaris10_PCIE_Table;
|
||||
|
||||
|
||||
@@ -252,7 +252,7 @@ typedef struct _ATOM_Tonga_MM_Dependency_Record {
|
||||
typedef struct _ATOM_Tonga_MM_Dependency_Table {
|
||||
UCHAR ucRevId;
|
||||
UCHAR ucNumEntries; /* Number of entries. */
|
||||
ATOM_Tonga_MM_Dependency_Record entries[1]; /* Dynamically allocate entries. */
|
||||
ATOM_Tonga_MM_Dependency_Record entries[]; /* Dynamically allocate entries. */
|
||||
} ATOM_Tonga_MM_Dependency_Table;
|
||||
|
||||
typedef struct _ATOM_Tonga_Voltage_Lookup_Record {
|
||||
@@ -265,7 +265,7 @@ typedef struct _ATOM_Tonga_Voltage_Lookup_Record {
|
||||
typedef struct _ATOM_Tonga_Voltage_Lookup_Table {
|
||||
UCHAR ucRevId;
|
||||
UCHAR ucNumEntries; /* Number of entries. */
|
||||
ATOM_Tonga_Voltage_Lookup_Record entries[1]; /* Dynamically allocate entries. */
|
||||
ATOM_Tonga_Voltage_Lookup_Record entries[]; /* Dynamically allocate entries. */
|
||||
} ATOM_Tonga_Voltage_Lookup_Table;
|
||||
|
||||
typedef struct _ATOM_Tonga_Fan_Table {
|
||||
|
||||
@@ -1223,7 +1223,7 @@ int komeda_build_display_data_flow(struct komeda_crtc *kcrtc,
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void
|
||||
static int
|
||||
komeda_pipeline_unbound_components(struct komeda_pipeline *pipe,
|
||||
struct komeda_pipeline_state *new)
|
||||
{
|
||||
@@ -1243,8 +1243,12 @@ komeda_pipeline_unbound_components(struct komeda_pipeline *pipe,
|
||||
c = komeda_pipeline_get_component(pipe, id);
|
||||
c_st = komeda_component_get_state_and_set_user(c,
|
||||
drm_st, NULL, new->crtc);
|
||||
if (PTR_ERR(c_st) == -EDEADLK)
|
||||
return -EDEADLK;
|
||||
WARN_ON(IS_ERR(c_st));
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* release unclaimed pipeline resource */
|
||||
@@ -1266,9 +1270,8 @@ int komeda_release_unclaimed_resources(struct komeda_pipeline *pipe,
|
||||
if (WARN_ON(IS_ERR_OR_NULL(st)))
|
||||
return -EINVAL;
|
||||
|
||||
komeda_pipeline_unbound_components(pipe, st);
|
||||
return komeda_pipeline_unbound_components(pipe, st);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Since standalong disabled components must be disabled separately and in the
|
||||
|
||||
@@ -642,6 +642,7 @@ static int set_proto_ctx_sseu(struct drm_i915_file_private *fpriv,
|
||||
if (idx >= pc->num_user_engines)
|
||||
return -EINVAL;
|
||||
|
||||
idx = array_index_nospec(idx, pc->num_user_engines);
|
||||
pe = &pc->user_engines[idx];
|
||||
|
||||
/* Only render engine supports RPCS configuration. */
|
||||
|
||||
@@ -3795,11 +3795,8 @@ int i915_perf_open_ioctl(struct drm_device *dev, void *data,
|
||||
u32 known_open_flags;
|
||||
int ret;
|
||||
|
||||
if (!perf->i915) {
|
||||
drm_dbg(&perf->i915->drm,
|
||||
"i915 perf interface not available for this system\n");
|
||||
if (!perf->i915)
|
||||
return -ENOTSUPP;
|
||||
}
|
||||
|
||||
known_open_flags = I915_PERF_FLAG_FD_CLOEXEC |
|
||||
I915_PERF_FLAG_FD_NONBLOCK |
|
||||
@@ -4090,11 +4087,8 @@ int i915_perf_add_config_ioctl(struct drm_device *dev, void *data,
|
||||
struct i915_oa_reg *regs;
|
||||
int err, id;
|
||||
|
||||
if (!perf->i915) {
|
||||
drm_dbg(&perf->i915->drm,
|
||||
"i915 perf interface not available for this system\n");
|
||||
if (!perf->i915)
|
||||
return -ENOTSUPP;
|
||||
}
|
||||
|
||||
if (!perf->metrics_kobj) {
|
||||
drm_dbg(&perf->i915->drm,
|
||||
@@ -4256,11 +4250,8 @@ int i915_perf_remove_config_ioctl(struct drm_device *dev, void *data,
|
||||
struct i915_oa_config *oa_config;
|
||||
int ret;
|
||||
|
||||
if (!perf->i915) {
|
||||
drm_dbg(&perf->i915->drm,
|
||||
"i915 perf interface not available for this system\n");
|
||||
if (!perf->i915)
|
||||
return -ENOTSUPP;
|
||||
}
|
||||
|
||||
if (i915_perf_stream_paranoid && !perfmon_capable()) {
|
||||
drm_dbg(&perf->i915->drm,
|
||||
|
||||
@@ -263,26 +263,9 @@ int dp_panel_get_modes(struct dp_panel *dp_panel,
|
||||
|
||||
static u8 dp_panel_get_edid_checksum(struct edid *edid)
|
||||
{
|
||||
struct edid *last_block;
|
||||
u8 *raw_edid;
|
||||
bool is_edid_corrupt = false;
|
||||
edid += edid->extensions;
|
||||
|
||||
if (!edid) {
|
||||
DRM_ERROR("invalid edid input\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
raw_edid = (u8 *)edid;
|
||||
raw_edid += (edid->extensions * EDID_LENGTH);
|
||||
last_block = (struct edid *)raw_edid;
|
||||
|
||||
/* block type extension */
|
||||
drm_edid_block_valid(raw_edid, 1, false, &is_edid_corrupt);
|
||||
if (!is_edid_corrupt)
|
||||
return last_block->checksum;
|
||||
|
||||
DRM_ERROR("Invalid block, no checksum\n");
|
||||
return 0;
|
||||
return edid->checksum;
|
||||
}
|
||||
|
||||
void dp_panel_handle_sink_request(struct dp_panel *dp_panel)
|
||||
|
||||
@@ -267,6 +267,8 @@ static int versatile_panel_get_modes(struct drm_panel *panel,
|
||||
connector->display_info.bus_flags = vpanel->panel_type->bus_flags;
|
||||
|
||||
mode = drm_mode_duplicate(connector->dev, &vpanel->panel_type->mode);
|
||||
if (!mode)
|
||||
return -ENOMEM;
|
||||
drm_mode_set_name(mode);
|
||||
mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
|
||||
|
||||
|
||||
@@ -428,29 +428,30 @@ static int st7703_prepare(struct drm_panel *panel)
|
||||
return 0;
|
||||
|
||||
dev_dbg(ctx->dev, "Resetting the panel\n");
|
||||
ret = regulator_enable(ctx->vcc);
|
||||
if (ret < 0) {
|
||||
dev_err(ctx->dev, "Failed to enable vcc supply: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
gpiod_set_value_cansleep(ctx->reset_gpio, 1);
|
||||
|
||||
ret = regulator_enable(ctx->iovcc);
|
||||
if (ret < 0) {
|
||||
dev_err(ctx->dev, "Failed to enable iovcc supply: %d\n", ret);
|
||||
goto disable_vcc;
|
||||
return ret;
|
||||
}
|
||||
|
||||
gpiod_set_value_cansleep(ctx->reset_gpio, 1);
|
||||
usleep_range(20, 40);
|
||||
ret = regulator_enable(ctx->vcc);
|
||||
if (ret < 0) {
|
||||
dev_err(ctx->dev, "Failed to enable vcc supply: %d\n", ret);
|
||||
regulator_disable(ctx->iovcc);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Give power supplies time to stabilize before deasserting reset. */
|
||||
usleep_range(10000, 20000);
|
||||
|
||||
gpiod_set_value_cansleep(ctx->reset_gpio, 0);
|
||||
msleep(20);
|
||||
usleep_range(15000, 20000);
|
||||
|
||||
ctx->prepared = true;
|
||||
|
||||
return 0;
|
||||
|
||||
disable_vcc:
|
||||
regulator_disable(ctx->vcc);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int st7703_get_modes(struct drm_panel *panel,
|
||||
|
||||
@@ -379,6 +379,8 @@ static int tpg110_get_modes(struct drm_panel *panel,
|
||||
connector->display_info.bus_flags = tpg->panel_mode->bus_flags;
|
||||
|
||||
mode = drm_mode_duplicate(connector->dev, &tpg->panel_mode->mode);
|
||||
if (!mode)
|
||||
return -ENOMEM;
|
||||
drm_mode_set_name(mode);
|
||||
mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
|
||||
|
||||
|
||||
@@ -1221,6 +1221,9 @@ int qxl_destroy_monitors_object(struct qxl_device *qdev)
|
||||
if (!qdev->monitors_config_bo)
|
||||
return 0;
|
||||
|
||||
kfree(qdev->dumb_heads);
|
||||
qdev->dumb_heads = NULL;
|
||||
|
||||
qdev->monitors_config = NULL;
|
||||
qdev->ram_header->monitors_config = 0;
|
||||
|
||||
|
||||
@@ -807,9 +807,9 @@ int vmw_surface_define_ioctl(struct drm_device *dev, void *data,
|
||||
metadata->num_sizes = num_sizes;
|
||||
user_srf->size = size;
|
||||
metadata->sizes =
|
||||
memdup_user((struct drm_vmw_size __user *)(unsigned long)
|
||||
memdup_array_user((struct drm_vmw_size __user *)(unsigned long)
|
||||
req->size_addr,
|
||||
sizeof(*metadata->sizes) * metadata->num_sizes);
|
||||
metadata->num_sizes, sizeof(*metadata->sizes));
|
||||
if (IS_ERR(metadata->sizes)) {
|
||||
ret = PTR_ERR(metadata->sizes);
|
||||
goto out_no_sizes;
|
||||
|
||||
@@ -349,6 +349,7 @@
|
||||
|
||||
#define USB_VENDOR_ID_DELL 0x413c
|
||||
#define USB_DEVICE_ID_DELL_PIXART_USB_OPTICAL_MOUSE 0x301a
|
||||
#define USB_DEVICE_ID_DELL_PRO_WIRELESS_KM5221W 0x4503
|
||||
|
||||
#define USB_VENDOR_ID_DELORME 0x1163
|
||||
#define USB_DEVICE_ID_DELORME_EARTHMATE 0x0100
|
||||
|
||||
@@ -50,7 +50,12 @@ struct lenovo_drvdata {
|
||||
int select_right;
|
||||
int sensitivity;
|
||||
int press_speed;
|
||||
u8 middlebutton_state; /* 0:Up, 1:Down (undecided), 2:Scrolling */
|
||||
/* 0: Up
|
||||
* 1: Down (undecided)
|
||||
* 2: Scrolling
|
||||
* 3: Patched firmware, disable workaround
|
||||
*/
|
||||
u8 middlebutton_state;
|
||||
bool fn_lock;
|
||||
};
|
||||
|
||||
@@ -529,31 +534,48 @@ static int lenovo_event_cptkbd(struct hid_device *hdev,
|
||||
{
|
||||
struct lenovo_drvdata *cptkbd_data = hid_get_drvdata(hdev);
|
||||
|
||||
/* "wheel" scroll events */
|
||||
if (usage->type == EV_REL && (usage->code == REL_WHEEL ||
|
||||
usage->code == REL_HWHEEL)) {
|
||||
/* Scroll events disable middle-click event */
|
||||
cptkbd_data->middlebutton_state = 2;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Middle click events */
|
||||
if (usage->type == EV_KEY && usage->code == BTN_MIDDLE) {
|
||||
if (value == 1) {
|
||||
cptkbd_data->middlebutton_state = 1;
|
||||
} else if (value == 0) {
|
||||
if (cptkbd_data->middlebutton_state == 1) {
|
||||
/* No scrolling inbetween, send middle-click */
|
||||
input_event(field->hidinput->input,
|
||||
EV_KEY, BTN_MIDDLE, 1);
|
||||
input_sync(field->hidinput->input);
|
||||
input_event(field->hidinput->input,
|
||||
EV_KEY, BTN_MIDDLE, 0);
|
||||
input_sync(field->hidinput->input);
|
||||
}
|
||||
cptkbd_data->middlebutton_state = 0;
|
||||
if (cptkbd_data->middlebutton_state != 3) {
|
||||
/* REL_X and REL_Y events during middle button pressed
|
||||
* are only possible on patched, bug-free firmware
|
||||
* so set middlebutton_state to 3
|
||||
* to never apply workaround anymore
|
||||
*/
|
||||
if (cptkbd_data->middlebutton_state == 1 &&
|
||||
usage->type == EV_REL &&
|
||||
(usage->code == REL_X || usage->code == REL_Y)) {
|
||||
cptkbd_data->middlebutton_state = 3;
|
||||
/* send middle button press which was hold before */
|
||||
input_event(field->hidinput->input,
|
||||
EV_KEY, BTN_MIDDLE, 1);
|
||||
input_sync(field->hidinput->input);
|
||||
}
|
||||
|
||||
/* "wheel" scroll events */
|
||||
if (usage->type == EV_REL && (usage->code == REL_WHEEL ||
|
||||
usage->code == REL_HWHEEL)) {
|
||||
/* Scroll events disable middle-click event */
|
||||
cptkbd_data->middlebutton_state = 2;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Middle click events */
|
||||
if (usage->type == EV_KEY && usage->code == BTN_MIDDLE) {
|
||||
if (value == 1) {
|
||||
cptkbd_data->middlebutton_state = 1;
|
||||
} else if (value == 0) {
|
||||
if (cptkbd_data->middlebutton_state == 1) {
|
||||
/* No scrolling inbetween, send middle-click */
|
||||
input_event(field->hidinput->input,
|
||||
EV_KEY, BTN_MIDDLE, 1);
|
||||
input_sync(field->hidinput->input);
|
||||
input_event(field->hidinput->input,
|
||||
EV_KEY, BTN_MIDDLE, 0);
|
||||
input_sync(field->hidinput->input);
|
||||
}
|
||||
cptkbd_data->middlebutton_state = 0;
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
@@ -66,6 +66,7 @@ static const struct hid_device_id hid_quirks[] = {
|
||||
{ HID_USB_DEVICE(USB_VENDOR_ID_CORSAIR, USB_DEVICE_ID_CORSAIR_STRAFE), HID_QUIRK_NO_INIT_REPORTS | HID_QUIRK_ALWAYS_POLL },
|
||||
{ HID_USB_DEVICE(USB_VENDOR_ID_CREATIVELABS, USB_DEVICE_ID_CREATIVE_SB_OMNI_SURROUND_51), HID_QUIRK_NOGET },
|
||||
{ HID_USB_DEVICE(USB_VENDOR_ID_DELL, USB_DEVICE_ID_DELL_PIXART_USB_OPTICAL_MOUSE), HID_QUIRK_ALWAYS_POLL },
|
||||
{ HID_USB_DEVICE(USB_VENDOR_ID_DELL, USB_DEVICE_ID_DELL_PRO_WIRELESS_KM5221W), HID_QUIRK_ALWAYS_POLL },
|
||||
{ HID_USB_DEVICE(USB_VENDOR_ID_DMI, USB_DEVICE_ID_DMI_ENC), HID_QUIRK_NOGET },
|
||||
{ HID_USB_DEVICE(USB_VENDOR_ID_DRACAL_RAPHNET, USB_DEVICE_ID_RAPHNET_2NES2SNES), HID_QUIRK_MULTI_INPUT },
|
||||
{ HID_USB_DEVICE(USB_VENDOR_ID_DRACAL_RAPHNET, USB_DEVICE_ID_RAPHNET_4NES4SNES), HID_QUIRK_MULTI_INPUT },
|
||||
|
||||
@@ -456,10 +456,16 @@ i2c_dw_xfer_msg(struct dw_i2c_dev *dev)
|
||||
|
||||
/*
|
||||
* Because we don't know the buffer length in the
|
||||
* I2C_FUNC_SMBUS_BLOCK_DATA case, we can't stop
|
||||
* the transaction here.
|
||||
* I2C_FUNC_SMBUS_BLOCK_DATA case, we can't stop the
|
||||
* transaction here. Also disable the TX_EMPTY IRQ
|
||||
* while waiting for the data length byte to avoid the
|
||||
* bogus interrupts flood.
|
||||
*/
|
||||
if (buf_len > 0 || flags & I2C_M_RECV_LEN) {
|
||||
if (flags & I2C_M_RECV_LEN) {
|
||||
dev->status |= STATUS_WRITE_IN_PROGRESS;
|
||||
intr_mask &= ~DW_IC_INTR_TX_EMPTY;
|
||||
break;
|
||||
} else if (buf_len > 0) {
|
||||
/* more bytes to be written */
|
||||
dev->status |= STATUS_WRITE_IN_PROGRESS;
|
||||
break;
|
||||
@@ -495,6 +501,13 @@ i2c_dw_recv_len(struct dw_i2c_dev *dev, u8 len)
|
||||
msgs[dev->msg_read_idx].len = len;
|
||||
msgs[dev->msg_read_idx].flags &= ~I2C_M_RECV_LEN;
|
||||
|
||||
/*
|
||||
* Received buffer length, re-enable TX_EMPTY interrupt
|
||||
* to resume the SMBUS transaction.
|
||||
*/
|
||||
regmap_update_bits(dev->map, DW_IC_INTR_MASK, DW_IC_INTR_TX_EMPTY,
|
||||
DW_IC_INTR_TX_EMPTY);
|
||||
|
||||
return len;
|
||||
}
|
||||
|
||||
|
||||
@@ -702,15 +702,11 @@ static int i801_block_transaction_byte_by_byte(struct i801_priv *priv,
|
||||
return i801_check_post(priv, result ? priv->status : -ETIMEDOUT);
|
||||
}
|
||||
|
||||
if (len == 1 && read_write == I2C_SMBUS_READ)
|
||||
smbcmd |= SMBHSTCNT_LAST_BYTE;
|
||||
outb_p(smbcmd | SMBHSTCNT_START, SMBHSTCNT(priv));
|
||||
|
||||
for (i = 1; i <= len; i++) {
|
||||
if (i == len && read_write == I2C_SMBUS_READ)
|
||||
smbcmd |= SMBHSTCNT_LAST_BYTE;
|
||||
outb_p(smbcmd, SMBHSTCNT(priv));
|
||||
|
||||
if (i == 1)
|
||||
outb_p(inb(SMBHSTCNT(priv)) | SMBHSTCNT_START,
|
||||
SMBHSTCNT(priv));
|
||||
|
||||
status = i801_wait_byte_done(priv);
|
||||
if (status)
|
||||
goto exit;
|
||||
@@ -733,9 +729,12 @@ static int i801_block_transaction_byte_by_byte(struct i801_priv *priv,
|
||||
data->block[0] = len;
|
||||
}
|
||||
|
||||
/* Retrieve/store value in SMBBLKDAT */
|
||||
if (read_write == I2C_SMBUS_READ)
|
||||
if (read_write == I2C_SMBUS_READ) {
|
||||
data->block[i] = inb_p(SMBBLKDAT(priv));
|
||||
if (i == len - 1)
|
||||
outb_p(smbcmd | SMBHSTCNT_LAST_BYTE, SMBHSTCNT(priv));
|
||||
}
|
||||
|
||||
if (read_write == I2C_SMBUS_WRITE && i+1 <= len)
|
||||
outb_p(data->block[i+1], SMBBLKDAT(priv));
|
||||
|
||||
|
||||
@@ -264,6 +264,9 @@ struct pxa_i2c {
|
||||
u32 hs_mask;
|
||||
|
||||
struct i2c_bus_recovery_info recovery;
|
||||
struct pinctrl *pinctrl;
|
||||
struct pinctrl_state *pinctrl_default;
|
||||
struct pinctrl_state *pinctrl_recovery;
|
||||
};
|
||||
|
||||
#define _IBMR(i2c) ((i2c)->reg_ibmr)
|
||||
@@ -1302,12 +1305,13 @@ static void i2c_pxa_prepare_recovery(struct i2c_adapter *adap)
|
||||
*/
|
||||
gpiod_set_value(i2c->recovery.scl_gpiod, ibmr & IBMR_SCLS);
|
||||
gpiod_set_value(i2c->recovery.sda_gpiod, ibmr & IBMR_SDAS);
|
||||
|
||||
WARN_ON(pinctrl_select_state(i2c->pinctrl, i2c->pinctrl_recovery));
|
||||
}
|
||||
|
||||
static void i2c_pxa_unprepare_recovery(struct i2c_adapter *adap)
|
||||
{
|
||||
struct pxa_i2c *i2c = adap->algo_data;
|
||||
struct i2c_bus_recovery_info *bri = adap->bus_recovery_info;
|
||||
u32 isr;
|
||||
|
||||
/*
|
||||
@@ -1321,7 +1325,7 @@ static void i2c_pxa_unprepare_recovery(struct i2c_adapter *adap)
|
||||
i2c_pxa_do_reset(i2c);
|
||||
}
|
||||
|
||||
WARN_ON(pinctrl_select_state(bri->pinctrl, bri->pins_default));
|
||||
WARN_ON(pinctrl_select_state(i2c->pinctrl, i2c->pinctrl_default));
|
||||
|
||||
dev_dbg(&i2c->adap.dev, "recovery: IBMR 0x%08x ISR 0x%08x\n",
|
||||
readl(_IBMR(i2c)), readl(_ISR(i2c)));
|
||||
@@ -1343,20 +1347,76 @@ static int i2c_pxa_init_recovery(struct pxa_i2c *i2c)
|
||||
if (IS_ENABLED(CONFIG_I2C_PXA_SLAVE))
|
||||
return 0;
|
||||
|
||||
bri->pinctrl = devm_pinctrl_get(dev);
|
||||
if (PTR_ERR(bri->pinctrl) == -ENODEV) {
|
||||
bri->pinctrl = NULL;
|
||||
i2c->pinctrl = devm_pinctrl_get(dev);
|
||||
if (PTR_ERR(i2c->pinctrl) == -ENODEV)
|
||||
i2c->pinctrl = NULL;
|
||||
if (IS_ERR(i2c->pinctrl))
|
||||
return PTR_ERR(i2c->pinctrl);
|
||||
|
||||
if (!i2c->pinctrl)
|
||||
return 0;
|
||||
|
||||
i2c->pinctrl_default = pinctrl_lookup_state(i2c->pinctrl,
|
||||
PINCTRL_STATE_DEFAULT);
|
||||
i2c->pinctrl_recovery = pinctrl_lookup_state(i2c->pinctrl, "recovery");
|
||||
|
||||
if (IS_ERR(i2c->pinctrl_default) || IS_ERR(i2c->pinctrl_recovery)) {
|
||||
dev_info(dev, "missing pinmux recovery information: %ld %ld\n",
|
||||
PTR_ERR(i2c->pinctrl_default),
|
||||
PTR_ERR(i2c->pinctrl_recovery));
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Claiming GPIOs can influence the pinmux state, and may glitch the
|
||||
* I2C bus. Do this carefully.
|
||||
*/
|
||||
bri->scl_gpiod = devm_gpiod_get(dev, "scl", GPIOD_OUT_HIGH_OPEN_DRAIN);
|
||||
if (bri->scl_gpiod == ERR_PTR(-EPROBE_DEFER))
|
||||
return -EPROBE_DEFER;
|
||||
if (IS_ERR(bri->scl_gpiod)) {
|
||||
dev_info(dev, "missing scl gpio recovery information: %pe\n",
|
||||
bri->scl_gpiod);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* We have SCL. Pull SCL low and wait a bit so that SDA glitches
|
||||
* have no effect.
|
||||
*/
|
||||
gpiod_direction_output(bri->scl_gpiod, 0);
|
||||
udelay(10);
|
||||
bri->sda_gpiod = devm_gpiod_get(dev, "sda", GPIOD_OUT_HIGH_OPEN_DRAIN);
|
||||
|
||||
/* Wait a bit in case of a SDA glitch, and then release SCL. */
|
||||
udelay(10);
|
||||
gpiod_direction_output(bri->scl_gpiod, 1);
|
||||
|
||||
if (bri->sda_gpiod == ERR_PTR(-EPROBE_DEFER))
|
||||
return -EPROBE_DEFER;
|
||||
|
||||
if (IS_ERR(bri->sda_gpiod)) {
|
||||
dev_info(dev, "missing sda gpio recovery information: %pe\n",
|
||||
bri->sda_gpiod);
|
||||
return 0;
|
||||
}
|
||||
if (IS_ERR(bri->pinctrl))
|
||||
return PTR_ERR(bri->pinctrl);
|
||||
|
||||
bri->prepare_recovery = i2c_pxa_prepare_recovery;
|
||||
bri->unprepare_recovery = i2c_pxa_unprepare_recovery;
|
||||
bri->recover_bus = i2c_generic_scl_recovery;
|
||||
|
||||
i2c->adap.bus_recovery_info = bri;
|
||||
|
||||
return 0;
|
||||
/*
|
||||
* Claiming GPIOs can change the pinmux state, which confuses the
|
||||
* pinctrl since pinctrl's idea of the current setting is unaffected
|
||||
* by the pinmux change caused by claiming the GPIO. Work around that
|
||||
* by switching pinctrl to the GPIO state here. We do it this way to
|
||||
* avoid glitching the I2C bus.
|
||||
*/
|
||||
pinctrl_select_state(i2c->pinctrl, i2c->pinctrl_recovery);
|
||||
|
||||
return pinctrl_select_state(i2c->pinctrl, i2c->pinctrl_default);
|
||||
}
|
||||
|
||||
static int i2c_pxa_probe(struct platform_device *dev)
|
||||
|
||||
@@ -201,6 +201,11 @@ static int p2wi_probe(struct platform_device *pdev)
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (clk_freq == 0) {
|
||||
dev_err(dev, "clock-frequency is set to 0 in DT\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (of_get_child_count(np) > 1) {
|
||||
dev_err(dev, "P2WI only supports one slave device\n");
|
||||
return -EINVAL;
|
||||
|
||||
@@ -29,7 +29,7 @@ int i2c_dev_irq_from_resources(const struct resource *resources,
|
||||
*/
|
||||
static inline bool i2c_in_atomic_xfer_mode(void)
|
||||
{
|
||||
return system_state > SYSTEM_RUNNING && irqs_disabled();
|
||||
return system_state > SYSTEM_RUNNING && !preemptible();
|
||||
}
|
||||
|
||||
static inline int __i2c_lock_bus_helper(struct i2c_adapter *adap)
|
||||
|
||||
@@ -450,8 +450,8 @@ static long i2cdev_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
|
||||
if (rdwr_arg.nmsgs > I2C_RDWR_IOCTL_MAX_MSGS)
|
||||
return -EINVAL;
|
||||
|
||||
rdwr_pa = memdup_user(rdwr_arg.msgs,
|
||||
rdwr_arg.nmsgs * sizeof(struct i2c_msg));
|
||||
rdwr_pa = memdup_array_user(rdwr_arg.msgs,
|
||||
rdwr_arg.nmsgs, sizeof(struct i2c_msg));
|
||||
if (IS_ERR(rdwr_pa))
|
||||
return PTR_ERR(rdwr_pa);
|
||||
|
||||
|
||||
@@ -192,7 +192,7 @@
|
||||
#define SLV_STATUS1_HJ_DIS BIT(18)
|
||||
#define SLV_STATUS1_MR_DIS BIT(17)
|
||||
#define SLV_STATUS1_PROT_ERR BIT(16)
|
||||
#define SLV_STATUS1_DA(x) (((s) & GENMASK(15, 9)) >> 9)
|
||||
#define SLV_STATUS1_DA(s) (((s) & GENMASK(15, 9)) >> 9)
|
||||
#define SLV_STATUS1_HAS_DA BIT(8)
|
||||
#define SLV_STATUS1_DDR_RX_FULL BIT(7)
|
||||
#define SLV_STATUS1_DDR_TX_FULL BIT(6)
|
||||
@@ -1624,13 +1624,13 @@ static int cdns_i3c_master_probe(struct platform_device *pdev)
|
||||
/* Device ID0 is reserved to describe this master. */
|
||||
master->maxdevs = CONF_STATUS0_DEVS_NUM(val);
|
||||
master->free_rr_slots = GENMASK(master->maxdevs, 1);
|
||||
master->caps.ibirfifodepth = CONF_STATUS0_IBIR_DEPTH(val);
|
||||
master->caps.cmdrfifodepth = CONF_STATUS0_CMDR_DEPTH(val);
|
||||
|
||||
val = readl(master->regs + CONF_STATUS1);
|
||||
master->caps.cmdfifodepth = CONF_STATUS1_CMD_DEPTH(val);
|
||||
master->caps.rxfifodepth = CONF_STATUS1_RX_DEPTH(val);
|
||||
master->caps.txfifodepth = CONF_STATUS1_TX_DEPTH(val);
|
||||
master->caps.ibirfifodepth = CONF_STATUS0_IBIR_DEPTH(val);
|
||||
master->caps.cmdrfifodepth = CONF_STATUS0_CMDR_DEPTH(val);
|
||||
|
||||
spin_lock_init(&master->ibi.lock);
|
||||
master->ibi.num_slots = CONF_STATUS1_IBI_HW_RES(val);
|
||||
|
||||
@@ -64,15 +64,17 @@ static int hci_dat_v1_init(struct i3c_hci *hci)
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
/* use a bitmap for faster free slot search */
|
||||
hci->DAT_data = bitmap_zalloc(hci->DAT_entries, GFP_KERNEL);
|
||||
if (!hci->DAT_data)
|
||||
return -ENOMEM;
|
||||
if (!hci->DAT_data) {
|
||||
/* use a bitmap for faster free slot search */
|
||||
hci->DAT_data = bitmap_zalloc(hci->DAT_entries, GFP_KERNEL);
|
||||
if (!hci->DAT_data)
|
||||
return -ENOMEM;
|
||||
|
||||
/* clear them */
|
||||
for (dat_idx = 0; dat_idx < hci->DAT_entries; dat_idx++) {
|
||||
dat_w0_write(dat_idx, 0);
|
||||
dat_w1_write(dat_idx, 0);
|
||||
/* clear them */
|
||||
for (dat_idx = 0; dat_idx < hci->DAT_entries; dat_idx++) {
|
||||
dat_w0_write(dat_idx, 0);
|
||||
dat_w1_write(dat_idx, 0);
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
@@ -87,7 +89,13 @@ static void hci_dat_v1_cleanup(struct i3c_hci *hci)
|
||||
static int hci_dat_v1_alloc_entry(struct i3c_hci *hci)
|
||||
{
|
||||
unsigned int dat_idx;
|
||||
int ret;
|
||||
|
||||
if (!hci->DAT_data) {
|
||||
ret = hci_dat_v1_init(hci);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
dat_idx = find_first_zero_bit(hci->DAT_data, hci->DAT_entries);
|
||||
if (dat_idx >= hci->DAT_entries)
|
||||
return -ENOENT;
|
||||
@@ -103,7 +111,8 @@ static void hci_dat_v1_free_entry(struct i3c_hci *hci, unsigned int dat_idx)
|
||||
{
|
||||
dat_w0_write(dat_idx, 0);
|
||||
dat_w1_write(dat_idx, 0);
|
||||
__clear_bit(dat_idx, hci->DAT_data);
|
||||
if (hci->DAT_data)
|
||||
__clear_bit(dat_idx, hci->DAT_data);
|
||||
}
|
||||
|
||||
static void hci_dat_v1_set_dynamic_addr(struct i3c_hci *hci,
|
||||
|
||||
@@ -734,7 +734,7 @@ static bool hci_dma_irq_handler(struct i3c_hci *hci, unsigned int mask)
|
||||
unsigned int i;
|
||||
bool handled = false;
|
||||
|
||||
for (i = 0; mask && i < 8; i++) {
|
||||
for (i = 0; mask && i < rings->total; i++) {
|
||||
struct hci_rh_data *rh;
|
||||
u32 status;
|
||||
|
||||
|
||||
@@ -165,6 +165,7 @@ struct svc_i3c_xfer {
|
||||
* @ibi.slots: Available IBI slots
|
||||
* @ibi.tbq_slot: To be queued IBI slot
|
||||
* @ibi.lock: IBI lock
|
||||
* @lock: Transfer lock, protect between IBI work thread and callbacks from master
|
||||
*/
|
||||
struct svc_i3c_master {
|
||||
struct i3c_master_controller base;
|
||||
@@ -192,6 +193,7 @@ struct svc_i3c_master {
|
||||
/* Prevent races within IBI handlers */
|
||||
spinlock_t lock;
|
||||
} ibi;
|
||||
struct mutex lock;
|
||||
};
|
||||
|
||||
/**
|
||||
@@ -292,6 +294,7 @@ static int svc_i3c_master_handle_ibi(struct svc_i3c_master *master,
|
||||
struct i3c_ibi_slot *slot;
|
||||
unsigned int count;
|
||||
u32 mdatactrl;
|
||||
int ret, val;
|
||||
u8 *buf;
|
||||
|
||||
slot = i3c_generic_ibi_get_free_slot(data->ibi_pool);
|
||||
@@ -301,6 +304,13 @@ static int svc_i3c_master_handle_ibi(struct svc_i3c_master *master,
|
||||
slot->len = 0;
|
||||
buf = slot->data;
|
||||
|
||||
ret = readl_relaxed_poll_timeout(master->regs + SVC_I3C_MSTATUS, val,
|
||||
SVC_I3C_MSTATUS_COMPLETE(val), 0, 1000);
|
||||
if (ret) {
|
||||
dev_err(master->dev, "Timeout when polling for COMPLETE\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
while (SVC_I3C_MSTATUS_RXPEND(readl(master->regs + SVC_I3C_MSTATUS)) &&
|
||||
slot->len < SVC_I3C_FIFO_SIZE) {
|
||||
mdatactrl = readl(master->regs + SVC_I3C_MDATACTRL);
|
||||
@@ -345,6 +355,7 @@ static void svc_i3c_master_ibi_work(struct work_struct *work)
|
||||
u32 status, val;
|
||||
int ret;
|
||||
|
||||
mutex_lock(&master->lock);
|
||||
/* Acknowledge the incoming interrupt with the AUTOIBI mechanism */
|
||||
writel(SVC_I3C_MCTRL_REQUEST_AUTO_IBI |
|
||||
SVC_I3C_MCTRL_IBIRESP_AUTO,
|
||||
@@ -355,6 +366,7 @@ static void svc_i3c_master_ibi_work(struct work_struct *work)
|
||||
SVC_I3C_MSTATUS_IBIWON(val), 0, 1000);
|
||||
if (ret) {
|
||||
dev_err(master->dev, "Timeout when polling for IBIWON\n");
|
||||
svc_i3c_master_emit_stop(master);
|
||||
goto reenable_ibis;
|
||||
}
|
||||
|
||||
@@ -421,12 +433,13 @@ static void svc_i3c_master_ibi_work(struct work_struct *work)
|
||||
|
||||
reenable_ibis:
|
||||
svc_i3c_master_enable_interrupts(master, SVC_I3C_MINT_SLVSTART);
|
||||
mutex_unlock(&master->lock);
|
||||
}
|
||||
|
||||
static irqreturn_t svc_i3c_master_irq_handler(int irq, void *dev_id)
|
||||
{
|
||||
struct svc_i3c_master *master = (struct svc_i3c_master *)dev_id;
|
||||
u32 active = readl(master->regs + SVC_I3C_MINTMASKED);
|
||||
u32 active = readl(master->regs + SVC_I3C_MSTATUS);
|
||||
|
||||
if (!SVC_I3C_MSTATUS_SLVSTART(active))
|
||||
return IRQ_NONE;
|
||||
@@ -926,6 +939,9 @@ static int svc_i3c_master_xfer(struct svc_i3c_master *master,
|
||||
u32 reg;
|
||||
int ret;
|
||||
|
||||
/* clean SVC_I3C_MINT_IBIWON w1c bits */
|
||||
writel(SVC_I3C_MINT_IBIWON, master->regs + SVC_I3C_MSTATUS);
|
||||
|
||||
writel(SVC_I3C_MCTRL_REQUEST_START_ADDR |
|
||||
xfer_type |
|
||||
SVC_I3C_MCTRL_IBIRESP_NACK |
|
||||
@@ -939,6 +955,23 @@ static int svc_i3c_master_xfer(struct svc_i3c_master *master,
|
||||
if (ret)
|
||||
goto emit_stop;
|
||||
|
||||
/*
|
||||
* According to I3C spec ver 1.1.1, 5.1.2.2.3 Consequence of Controller Starting a Frame
|
||||
* with I3C Target Address.
|
||||
*
|
||||
* The I3C Controller normally should start a Frame, the Address may be arbitrated, and so
|
||||
* the Controller shall monitor to see whether an In-Band Interrupt request, a Controller
|
||||
* Role Request (i.e., Secondary Controller requests to become the Active Controller), or
|
||||
* a Hot-Join Request has been made.
|
||||
*
|
||||
* If missed IBIWON check, the wrong data will be return. When IBIWON happen, return failure
|
||||
* and yield the above events handler.
|
||||
*/
|
||||
if (SVC_I3C_MSTATUS_IBIWON(reg)) {
|
||||
ret = -ENXIO;
|
||||
goto emit_stop;
|
||||
}
|
||||
|
||||
if (rnw)
|
||||
ret = svc_i3c_master_read(master, in, xfer_len);
|
||||
else
|
||||
@@ -1095,9 +1128,11 @@ static int svc_i3c_master_send_bdcast_ccc_cmd(struct svc_i3c_master *master,
|
||||
cmd->read_len = 0;
|
||||
cmd->continued = false;
|
||||
|
||||
mutex_lock(&master->lock);
|
||||
svc_i3c_master_enqueue_xfer(master, xfer);
|
||||
if (!wait_for_completion_timeout(&xfer->comp, msecs_to_jiffies(1000)))
|
||||
svc_i3c_master_dequeue_xfer(master, xfer);
|
||||
mutex_unlock(&master->lock);
|
||||
|
||||
ret = xfer->ret;
|
||||
kfree(buf);
|
||||
@@ -1141,9 +1176,11 @@ static int svc_i3c_master_send_direct_ccc_cmd(struct svc_i3c_master *master,
|
||||
cmd->read_len = read_len;
|
||||
cmd->continued = false;
|
||||
|
||||
mutex_lock(&master->lock);
|
||||
svc_i3c_master_enqueue_xfer(master, xfer);
|
||||
if (!wait_for_completion_timeout(&xfer->comp, msecs_to_jiffies(1000)))
|
||||
svc_i3c_master_dequeue_xfer(master, xfer);
|
||||
mutex_unlock(&master->lock);
|
||||
|
||||
ret = xfer->ret;
|
||||
svc_i3c_master_free_xfer(xfer);
|
||||
@@ -1197,9 +1234,11 @@ static int svc_i3c_master_priv_xfers(struct i3c_dev_desc *dev,
|
||||
cmd->continued = (i + 1) < nxfers;
|
||||
}
|
||||
|
||||
mutex_lock(&master->lock);
|
||||
svc_i3c_master_enqueue_xfer(master, xfer);
|
||||
if (!wait_for_completion_timeout(&xfer->comp, msecs_to_jiffies(1000)))
|
||||
svc_i3c_master_dequeue_xfer(master, xfer);
|
||||
mutex_unlock(&master->lock);
|
||||
|
||||
ret = xfer->ret;
|
||||
svc_i3c_master_free_xfer(xfer);
|
||||
@@ -1235,9 +1274,11 @@ static int svc_i3c_master_i2c_xfers(struct i2c_dev_desc *dev,
|
||||
cmd->continued = (i + 1 < nxfers);
|
||||
}
|
||||
|
||||
mutex_lock(&master->lock);
|
||||
svc_i3c_master_enqueue_xfer(master, xfer);
|
||||
if (!wait_for_completion_timeout(&xfer->comp, msecs_to_jiffies(1000)))
|
||||
svc_i3c_master_dequeue_xfer(master, xfer);
|
||||
mutex_unlock(&master->lock);
|
||||
|
||||
ret = xfer->ret;
|
||||
svc_i3c_master_free_xfer(xfer);
|
||||
@@ -1407,6 +1448,8 @@ static int svc_i3c_master_probe(struct platform_device *pdev)
|
||||
|
||||
INIT_WORK(&master->hj_work, svc_i3c_master_hj_work);
|
||||
INIT_WORK(&master->ibi_work, svc_i3c_master_ibi_work);
|
||||
mutex_init(&master->lock);
|
||||
|
||||
ret = devm_request_irq(dev, master->irq, svc_i3c_master_irq_handler,
|
||||
IRQF_NO_SUSPEND, "svc-i3c-irq", master);
|
||||
if (ret)
|
||||
|
||||
@@ -3,6 +3,7 @@
|
||||
* Copyright(c) 2015 - 2019 Intel Corporation.
|
||||
*/
|
||||
|
||||
#include <linux/bitfield.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/delay.h>
|
||||
@@ -212,12 +213,6 @@ static u32 extract_speed(u16 linkstat)
|
||||
return speed;
|
||||
}
|
||||
|
||||
/* return the PCIe link speed from the given link status */
|
||||
static u32 extract_width(u16 linkstat)
|
||||
{
|
||||
return (linkstat & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT;
|
||||
}
|
||||
|
||||
/* read the link status and set dd->{lbus_width,lbus_speed,lbus_info} */
|
||||
static void update_lbus_info(struct hfi1_devdata *dd)
|
||||
{
|
||||
@@ -230,7 +225,7 @@ static void update_lbus_info(struct hfi1_devdata *dd)
|
||||
return;
|
||||
}
|
||||
|
||||
dd->lbus_width = extract_width(linkstat);
|
||||
dd->lbus_width = FIELD_GET(PCI_EXP_LNKSTA_NLW, linkstat);
|
||||
dd->lbus_speed = extract_speed(linkstat);
|
||||
snprintf(dd->lbus_info, sizeof(dd->lbus_info),
|
||||
"PCIe,%uMHz,x%u", dd->lbus_speed, dd->lbus_width);
|
||||
|
||||
@@ -449,6 +449,7 @@ static const struct usb_device_id xpad_table[] = {
|
||||
XPAD_XBOX360_VENDOR(0x0f0d), /* Hori Controllers */
|
||||
XPAD_XBOXONE_VENDOR(0x0f0d), /* Hori Controllers */
|
||||
XPAD_XBOX360_VENDOR(0x1038), /* SteelSeries Controllers */
|
||||
XPAD_XBOXONE_VENDOR(0x10f5), /* Turtle Beach Controllers */
|
||||
XPAD_XBOX360_VENDOR(0x11c9), /* Nacon GC100XF */
|
||||
XPAD_XBOX360_VENDOR(0x11ff), /* PXN V900 */
|
||||
XPAD_XBOX360_VENDOR(0x1209), /* Ardwiino Controllers */
|
||||
|
||||
@@ -246,6 +246,7 @@ int mcb_device_register(struct mcb_bus *bus, struct mcb_device *dev)
|
||||
return 0;
|
||||
|
||||
out:
|
||||
put_device(&dev->dev);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
@@ -106,7 +106,7 @@ static int chameleon_parse_gdd(struct mcb_bus *bus,
|
||||
return 0;
|
||||
|
||||
err:
|
||||
put_device(&mdev->dev);
|
||||
mcb_free_dev(mdev);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
@@ -6,7 +6,7 @@
|
||||
# Please keep it in alphabetic order
|
||||
obj-$(CONFIG_CEC_CROS_EC) += cros-ec/
|
||||
obj-$(CONFIG_CEC_GPIO) += cec-gpio/
|
||||
obj-$(CONFIG_CEC_MESON_AO) += meson/
|
||||
obj-y += meson/
|
||||
obj-$(CONFIG_CEC_SAMSUNG_S5P) += s5p/
|
||||
obj-$(CONFIG_CEC_SECO) += seco/
|
||||
obj-$(CONFIG_CEC_STI) += sti/
|
||||
|
||||
@@ -3089,7 +3089,7 @@ static int ccs_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
|
||||
try_fmt->code = sensor->internal_csi_format->code;
|
||||
try_fmt->field = V4L2_FIELD_NONE;
|
||||
|
||||
if (ssd != sensor->pixel_array)
|
||||
if (ssd == sensor->pixel_array)
|
||||
continue;
|
||||
|
||||
try_comp = v4l2_subdev_get_try_compose(sd, fh->state, i);
|
||||
|
||||
@@ -32,12 +32,10 @@ struct ccs_sensor;
|
||||
* @reg: Pointer to the register to access
|
||||
* @value: Register value, set by the caller on write, or
|
||||
* by the quirk on read
|
||||
*
|
||||
* @flags: Quirk flags
|
||||
*
|
||||
* @return: 0 on success, -ENOIOCTLCMD if no register
|
||||
* access may be done by the caller (default read
|
||||
* value is zero), else negative error code on error
|
||||
* @flags: Quirk flags
|
||||
*/
|
||||
struct ccs_quirk {
|
||||
int (*limits)(struct ccs_sensor *sensor);
|
||||
|
||||
@@ -8,6 +8,7 @@
|
||||
* All rights reserved.
|
||||
*/
|
||||
|
||||
#include <linux/bitfield.h>
|
||||
#include <linux/delay.h>
|
||||
#include <media/i2c/adv7604.h>
|
||||
#include <media/i2c/adv7842.h>
|
||||
@@ -210,17 +211,17 @@ void cobalt_pcie_status_show(struct cobalt *cobalt)
|
||||
pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &stat);
|
||||
cobalt_info("PCIe link capability 0x%08x: %s per lane and %u lanes\n",
|
||||
capa, get_link_speed(capa),
|
||||
(capa & PCI_EXP_LNKCAP_MLW) >> 4);
|
||||
FIELD_GET(PCI_EXP_LNKCAP_MLW, capa));
|
||||
cobalt_info("PCIe link control 0x%04x\n", ctrl);
|
||||
cobalt_info("PCIe link status 0x%04x: %s per lane and %u lanes\n",
|
||||
stat, get_link_speed(stat),
|
||||
(stat & PCI_EXP_LNKSTA_NLW) >> 4);
|
||||
FIELD_GET(PCI_EXP_LNKSTA_NLW, stat));
|
||||
|
||||
/* Bus */
|
||||
pcie_capability_read_dword(pci_bus_dev, PCI_EXP_LNKCAP, &capa);
|
||||
cobalt_info("PCIe bus link capability 0x%08x: %s per lane and %u lanes\n",
|
||||
capa, get_link_speed(capa),
|
||||
(capa & PCI_EXP_LNKCAP_MLW) >> 4);
|
||||
FIELD_GET(PCI_EXP_LNKCAP_MLW, capa));
|
||||
|
||||
/* Slot */
|
||||
pcie_capability_read_dword(pci_dev, PCI_EXP_SLTCAP, &capa);
|
||||
@@ -239,7 +240,7 @@ static unsigned pcie_link_get_lanes(struct cobalt *cobalt)
|
||||
if (!pci_is_pcie(pci_dev))
|
||||
return 0;
|
||||
pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &link);
|
||||
return (link & PCI_EXP_LNKSTA_NLW) >> 4;
|
||||
return FIELD_GET(PCI_EXP_LNKSTA_NLW, link);
|
||||
}
|
||||
|
||||
static unsigned pcie_bus_link_get_lanes(struct cobalt *cobalt)
|
||||
@@ -250,7 +251,7 @@ static unsigned pcie_bus_link_get_lanes(struct cobalt *cobalt)
|
||||
if (!pci_is_pcie(pci_dev))
|
||||
return 0;
|
||||
pcie_capability_read_dword(pci_dev, PCI_EXP_LNKCAP, &link);
|
||||
return (link & PCI_EXP_LNKCAP_MLW) >> 4;
|
||||
return FIELD_GET(PCI_EXP_LNKCAP_MLW, link);
|
||||
}
|
||||
|
||||
static void msi_config_show(struct cobalt *cobalt, struct pci_dev *pci_dev)
|
||||
|
||||
@@ -407,8 +407,10 @@ static int csi2rx_parse_dt(struct csi2rx_priv *csi2rx)
|
||||
fwh,
|
||||
struct v4l2_async_subdev);
|
||||
of_node_put(ep);
|
||||
if (IS_ERR(asd))
|
||||
if (IS_ERR(asd)) {
|
||||
v4l2_async_notifier_cleanup(&csi2rx->notifier);
|
||||
return PTR_ERR(asd);
|
||||
}
|
||||
|
||||
csi2rx->notifier.ops = &csi2rx_notifier_ops;
|
||||
|
||||
@@ -471,6 +473,7 @@ static int csi2rx_probe(struct platform_device *pdev)
|
||||
return 0;
|
||||
|
||||
err_cleanup:
|
||||
v4l2_async_notifier_unregister(&csi2rx->notifier);
|
||||
v4l2_async_notifier_cleanup(&csi2rx->notifier);
|
||||
err_free_priv:
|
||||
kfree(csi2rx);
|
||||
@@ -481,6 +484,8 @@ static int csi2rx_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct csi2rx_priv *csi2rx = platform_get_drvdata(pdev);
|
||||
|
||||
v4l2_async_notifier_unregister(&csi2rx->notifier);
|
||||
v4l2_async_notifier_cleanup(&csi2rx->notifier);
|
||||
v4l2_async_unregister_subdev(&csi2rx->subdev);
|
||||
kfree(csi2rx);
|
||||
|
||||
|
||||
@@ -7,7 +7,6 @@
|
||||
* Copyright (C) 2020-2021 Linaro Ltd.
|
||||
*/
|
||||
|
||||
#include <linux/delay.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/iopoll.h>
|
||||
@@ -498,35 +497,20 @@ static int vfe_enable_output(struct vfe_line *line)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int vfe_disable_output(struct vfe_line *line)
|
||||
static void vfe_disable_output(struct vfe_line *line)
|
||||
{
|
||||
struct vfe_device *vfe = to_vfe(line);
|
||||
struct vfe_output *output = &line->output;
|
||||
unsigned long flags;
|
||||
unsigned int i;
|
||||
bool done;
|
||||
int timeout = 0;
|
||||
|
||||
do {
|
||||
spin_lock_irqsave(&vfe->output_lock, flags);
|
||||
done = !output->gen2.active_num;
|
||||
spin_unlock_irqrestore(&vfe->output_lock, flags);
|
||||
usleep_range(10000, 20000);
|
||||
|
||||
if (timeout++ == 100) {
|
||||
dev_err(vfe->camss->dev, "VFE idle timeout - resetting\n");
|
||||
vfe_reset(vfe);
|
||||
output->gen2.active_num = 0;
|
||||
return 0;
|
||||
}
|
||||
} while (!done);
|
||||
|
||||
spin_lock_irqsave(&vfe->output_lock, flags);
|
||||
for (i = 0; i < output->wm_num; i++)
|
||||
vfe_wm_stop(vfe, output->wm_idx[i]);
|
||||
output->gen2.active_num = 0;
|
||||
spin_unlock_irqrestore(&vfe->output_lock, flags);
|
||||
|
||||
return 0;
|
||||
vfe_reset(vfe);
|
||||
}
|
||||
|
||||
/*
|
||||
|
||||
@@ -533,7 +533,8 @@ static int vfe_check_clock_rates(struct vfe_device *vfe)
|
||||
struct camss_clock *clock = &vfe->clock[i];
|
||||
|
||||
if (!strcmp(clock->name, "vfe0") ||
|
||||
!strcmp(clock->name, "vfe1")) {
|
||||
!strcmp(clock->name, "vfe1") ||
|
||||
!strcmp(clock->name, "vfe_lite")) {
|
||||
u64 min_rate = 0;
|
||||
unsigned long rate;
|
||||
|
||||
@@ -607,7 +608,7 @@ static int vfe_get(struct vfe_device *vfe)
|
||||
} else {
|
||||
ret = vfe_check_clock_rates(vfe);
|
||||
if (ret < 0)
|
||||
goto error_pm_runtime_get;
|
||||
goto error_pm_domain;
|
||||
}
|
||||
vfe->power_count++;
|
||||
|
||||
|
||||
@@ -1369,6 +1369,12 @@ static int camss_probe(struct platform_device *pdev)
|
||||
goto err_cleanup;
|
||||
}
|
||||
|
||||
ret = camss_configure_pd(camss);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "Failed to configure power domains: %d\n", ret);
|
||||
goto err_cleanup;
|
||||
}
|
||||
|
||||
ret = camss_init_subdevices(camss);
|
||||
if (ret < 0)
|
||||
goto err_cleanup;
|
||||
@@ -1421,12 +1427,6 @@ static int camss_probe(struct platform_device *pdev)
|
||||
}
|
||||
}
|
||||
|
||||
ret = camss_configure_pd(camss);
|
||||
if (ret < 0) {
|
||||
dev_err(dev, "Failed to configure power domains: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
pm_runtime_enable(dev);
|
||||
|
||||
return 0;
|
||||
|
||||
@@ -367,7 +367,7 @@ session_get_prop_buf_req(struct hfi_msg_session_property_info_pkt *pkt,
|
||||
memcpy(&bufreq[idx], buf_req, sizeof(*bufreq));
|
||||
idx++;
|
||||
|
||||
if (idx > HFI_BUFFER_TYPE_MAX)
|
||||
if (idx >= HFI_BUFFER_TYPE_MAX)
|
||||
return HFI_ERR_SESSION_INVALID_PARAMETER;
|
||||
|
||||
req_bytes -= sizeof(struct hfi_buffer_requirements);
|
||||
|
||||
@@ -19,6 +19,9 @@ static void init_codecs(struct venus_core *core)
|
||||
struct hfi_plat_caps *caps = core->caps, *cap;
|
||||
unsigned long bit;
|
||||
|
||||
if (hweight_long(core->dec_codecs) + hweight_long(core->enc_codecs) > MAX_CODEC_NUM)
|
||||
return;
|
||||
|
||||
for_each_set_bit(bit, &core->dec_codecs, MAX_CODEC_NUM) {
|
||||
cap = &caps[core->codecs_count++];
|
||||
cap->codec = BIT(bit);
|
||||
@@ -86,6 +89,9 @@ static void fill_profile_level(struct hfi_plat_caps *cap, const void *data,
|
||||
{
|
||||
const struct hfi_profile_level *pl = data;
|
||||
|
||||
if (cap->num_pl + num >= HFI_MAX_PROFILE_COUNT)
|
||||
return;
|
||||
|
||||
memcpy(&cap->pl[cap->num_pl], pl, num * sizeof(*pl));
|
||||
cap->num_pl += num;
|
||||
}
|
||||
@@ -111,6 +117,9 @@ fill_caps(struct hfi_plat_caps *cap, const void *data, unsigned int num)
|
||||
{
|
||||
const struct hfi_capability *caps = data;
|
||||
|
||||
if (cap->num_caps + num >= MAX_CAP_ENTRIES)
|
||||
return;
|
||||
|
||||
memcpy(&cap->caps[cap->num_caps], caps, num * sizeof(*caps));
|
||||
cap->num_caps += num;
|
||||
}
|
||||
@@ -137,6 +146,9 @@ static void fill_raw_fmts(struct hfi_plat_caps *cap, const void *fmts,
|
||||
{
|
||||
const struct raw_formats *formats = fmts;
|
||||
|
||||
if (cap->num_fmts + num_fmts >= MAX_FMT_ENTRIES)
|
||||
return;
|
||||
|
||||
memcpy(&cap->fmts[cap->num_fmts], formats, num_fmts * sizeof(*formats));
|
||||
cap->num_fmts += num_fmts;
|
||||
}
|
||||
@@ -159,6 +171,9 @@ parse_raw_formats(struct venus_core *core, u32 codecs, u32 domain, void *data)
|
||||
rawfmts[i].buftype = fmt->buffer_type;
|
||||
i++;
|
||||
|
||||
if (i >= MAX_FMT_ENTRIES)
|
||||
return;
|
||||
|
||||
if (pinfo->num_planes > MAX_PLANES)
|
||||
break;
|
||||
|
||||
|
||||
@@ -205,6 +205,11 @@ static int venus_write_queue(struct venus_hfi_device *hdev,
|
||||
|
||||
new_wr_idx = wr_idx + dwords;
|
||||
wr_ptr = (u32 *)(queue->qmem.kva + (wr_idx << 2));
|
||||
|
||||
if (wr_ptr < (u32 *)queue->qmem.kva ||
|
||||
wr_ptr > (u32 *)(queue->qmem.kva + queue->qmem.size - sizeof(*wr_ptr)))
|
||||
return -EINVAL;
|
||||
|
||||
if (new_wr_idx < qsize) {
|
||||
memcpy(wr_ptr, packet, dwords << 2);
|
||||
} else {
|
||||
@@ -272,6 +277,11 @@ static int venus_read_queue(struct venus_hfi_device *hdev,
|
||||
}
|
||||
|
||||
rd_ptr = (u32 *)(queue->qmem.kva + (rd_idx << 2));
|
||||
|
||||
if (rd_ptr < (u32 *)queue->qmem.kva ||
|
||||
rd_ptr > (u32 *)(queue->qmem.kva + queue->qmem.size - sizeof(*rd_ptr)))
|
||||
return -EINVAL;
|
||||
|
||||
dwords = *rd_ptr >> 2;
|
||||
if (!dwords)
|
||||
return -EINVAL;
|
||||
|
||||
@@ -2427,6 +2427,12 @@ static int imon_probe(struct usb_interface *interface,
|
||||
goto fail;
|
||||
}
|
||||
|
||||
if (first_if->dev.driver != interface->dev.driver) {
|
||||
dev_err(&interface->dev, "inconsistent driver matching\n");
|
||||
ret = -EINVAL;
|
||||
goto fail;
|
||||
}
|
||||
|
||||
if (ifnum == 0) {
|
||||
ictx = imon_init_intf0(interface, id);
|
||||
if (!ictx) {
|
||||
|
||||
@@ -15,7 +15,9 @@
|
||||
#define SHARP_UNIT 40 /* us */
|
||||
#define SHARP_BIT_PULSE (8 * SHARP_UNIT) /* 320us */
|
||||
#define SHARP_BIT_0_PERIOD (25 * SHARP_UNIT) /* 1ms (680us space) */
|
||||
#define SHARP_BIT_1_PERIOD (50 * SHARP_UNIT) /* 2ms (1680ms space) */
|
||||
#define SHARP_BIT_1_PERIOD (50 * SHARP_UNIT) /* 2ms (1680us space) */
|
||||
#define SHARP_BIT_0_SPACE (17 * SHARP_UNIT) /* 680us space */
|
||||
#define SHARP_BIT_1_SPACE (42 * SHARP_UNIT) /* 1680us space */
|
||||
#define SHARP_ECHO_SPACE (1000 * SHARP_UNIT) /* 40 ms */
|
||||
#define SHARP_TRAILER_SPACE (125 * SHARP_UNIT) /* 5 ms (even longer) */
|
||||
|
||||
@@ -168,8 +170,8 @@ static const struct ir_raw_timings_pd ir_sharp_timings = {
|
||||
.header_pulse = 0,
|
||||
.header_space = 0,
|
||||
.bit_pulse = SHARP_BIT_PULSE,
|
||||
.bit_space[0] = SHARP_BIT_0_PERIOD,
|
||||
.bit_space[1] = SHARP_BIT_1_PERIOD,
|
||||
.bit_space[0] = SHARP_BIT_0_SPACE,
|
||||
.bit_space[1] = SHARP_BIT_1_SPACE,
|
||||
.trailer_pulse = SHARP_BIT_PULSE,
|
||||
.trailer_space = SHARP_ECHO_SPACE,
|
||||
.msb_first = 1,
|
||||
|
||||
@@ -287,7 +287,11 @@ static ssize_t lirc_transmit(struct file *file, const char __user *buf,
|
||||
if (ret < 0)
|
||||
goto out_kfree_raw;
|
||||
|
||||
count = ret;
|
||||
/* drop trailing space */
|
||||
if (!(ret % 2))
|
||||
count = ret - 1;
|
||||
else
|
||||
count = ret;
|
||||
|
||||
txbuf = kmalloc_array(count, sizeof(unsigned int), GFP_KERNEL);
|
||||
if (!txbuf) {
|
||||
|
||||
@@ -145,7 +145,7 @@ void vivid_rds_gen_fill(struct vivid_rds_gen *rds, unsigned freq,
|
||||
rds->ta = alt;
|
||||
rds->ms = true;
|
||||
snprintf(rds->psname, sizeof(rds->psname), "%6d.%1d",
|
||||
freq / 16, ((freq & 0xf) * 10) / 16);
|
||||
(freq / 16) % 1000000, (((freq & 0xf) * 10) / 16) % 10);
|
||||
if (alt)
|
||||
strscpy(rds->radiotext,
|
||||
" The Radio Data System can switch between different Radio Texts ",
|
||||
|
||||
@@ -18,6 +18,7 @@
|
||||
|
||||
#include <linux/input.h>
|
||||
#include <linux/sched/signal.h>
|
||||
#include <linux/bitops.h>
|
||||
|
||||
#include "gspca.h"
|
||||
|
||||
@@ -1028,6 +1029,8 @@ static int set_flicker(struct gspca_dev *gspca_dev, int on, int apply)
|
||||
sd->params.exposure.expMode = 2;
|
||||
sd->exposure_status = EXPOSURE_NORMAL;
|
||||
}
|
||||
if (sd->params.exposure.gain >= BITS_PER_TYPE(currentexp))
|
||||
return -EINVAL;
|
||||
currentexp = currentexp << sd->params.exposure.gain;
|
||||
sd->params.exposure.gain = 0;
|
||||
/* round down current exposure to nearest value */
|
||||
|
||||
@@ -81,6 +81,7 @@
|
||||
#define PCI_DEVICE_ID_RENESAS_R8A774B1 0x002b
|
||||
#define PCI_DEVICE_ID_RENESAS_R8A774C0 0x002d
|
||||
#define PCI_DEVICE_ID_RENESAS_R8A774E1 0x0025
|
||||
#define PCI_DEVICE_ID_RENESAS_R8A779F0 0x0031
|
||||
|
||||
static DEFINE_IDA(pci_endpoint_test_ida);
|
||||
|
||||
@@ -996,6 +997,9 @@ static const struct pci_device_id pci_endpoint_test_tbl[] = {
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_RENESAS, PCI_DEVICE_ID_RENESAS_R8A774B1),},
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_RENESAS, PCI_DEVICE_ID_RENESAS_R8A774C0),},
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_RENESAS, PCI_DEVICE_ID_RENESAS_R8A774E1),},
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_RENESAS, PCI_DEVICE_ID_RENESAS_R8A779F0),
|
||||
.driver_data = (kernel_ulong_t)&default_data,
|
||||
},
|
||||
{ PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_J721E),
|
||||
.driver_data = (kernel_ulong_t)&j721e_data,
|
||||
},
|
||||
|
||||
@@ -811,7 +811,6 @@ static void meson_mmc_start_cmd(struct mmc_host *mmc, struct mmc_command *cmd)
|
||||
|
||||
cmd_cfg |= FIELD_PREP(CMD_CFG_CMD_INDEX_MASK, cmd->opcode);
|
||||
cmd_cfg |= CMD_CFG_OWNER; /* owned by CPU */
|
||||
cmd_cfg |= CMD_CFG_ERROR; /* stop in case of error */
|
||||
|
||||
meson_mmc_set_response_bits(cmd, &cmd_cfg);
|
||||
|
||||
|
||||
@@ -23,6 +23,12 @@
|
||||
#define GLI_9750_WT_EN_ON 0x1
|
||||
#define GLI_9750_WT_EN_OFF 0x0
|
||||
|
||||
#define PCI_GLI_9750_PM_CTRL 0xFC
|
||||
#define PCI_GLI_9750_PM_STATE GENMASK(1, 0)
|
||||
|
||||
#define PCI_GLI_9750_CORRERR_MASK 0x214
|
||||
#define PCI_GLI_9750_CORRERR_MASK_REPLAY_TIMER_TIMEOUT BIT(12)
|
||||
|
||||
#define SDHCI_GLI_9750_CFG2 0x848
|
||||
#define SDHCI_GLI_9750_CFG2_L1DLY GENMASK(28, 24)
|
||||
#define GLI_9750_CFG2_L1DLY_VALUE 0x1F
|
||||
@@ -421,8 +427,12 @@ static void sdhci_gl9750_set_clock(struct sdhci_host *host, unsigned int clock)
|
||||
|
||||
static void gl9750_hw_setting(struct sdhci_host *host)
|
||||
{
|
||||
struct sdhci_pci_slot *slot = sdhci_priv(host);
|
||||
struct pci_dev *pdev;
|
||||
u32 value;
|
||||
|
||||
pdev = slot->chip->pdev;
|
||||
|
||||
gl9750_wt_on(host);
|
||||
|
||||
value = sdhci_readl(host, SDHCI_GLI_9750_CFG2);
|
||||
@@ -432,6 +442,18 @@ static void gl9750_hw_setting(struct sdhci_host *host)
|
||||
GLI_9750_CFG2_L1DLY_VALUE);
|
||||
sdhci_writel(host, value, SDHCI_GLI_9750_CFG2);
|
||||
|
||||
/* toggle PM state to allow GL9750 to enter ASPM L1.2 */
|
||||
pci_read_config_dword(pdev, PCI_GLI_9750_PM_CTRL, &value);
|
||||
value |= PCI_GLI_9750_PM_STATE;
|
||||
pci_write_config_dword(pdev, PCI_GLI_9750_PM_CTRL, value);
|
||||
value &= ~PCI_GLI_9750_PM_STATE;
|
||||
pci_write_config_dword(pdev, PCI_GLI_9750_PM_CTRL, value);
|
||||
|
||||
/* mask the replay timer timeout of AER */
|
||||
pci_read_config_dword(pdev, PCI_GLI_9750_CORRERR_MASK, &value);
|
||||
value |= PCI_GLI_9750_CORRERR_MASK_REPLAY_TIMER_TIMEOUT;
|
||||
pci_write_config_dword(pdev, PCI_GLI_9750_CORRERR_MASK, value);
|
||||
|
||||
gl9750_wt_off(host);
|
||||
}
|
||||
|
||||
|
||||
@@ -600,7 +600,7 @@ static int sdhci_am654_get_otap_delay(struct sdhci_host *host,
|
||||
return 0;
|
||||
}
|
||||
|
||||
for (i = MMC_TIMING_MMC_HS; i <= MMC_TIMING_MMC_HS400; i++) {
|
||||
for (i = MMC_TIMING_LEGACY; i <= MMC_TIMING_MMC_HS400; i++) {
|
||||
|
||||
ret = device_property_read_u32(dev, td[i].otap_binding,
|
||||
&sdhci_am654->otap_del_sel[i]);
|
||||
|
||||
@@ -2311,6 +2311,7 @@ static int vub300_probe(struct usb_interface *interface,
|
||||
vub300->read_only =
|
||||
(0x0010 & vub300->system_port_status.port_flags) ? 1 : 0;
|
||||
} else {
|
||||
retval = -EINVAL;
|
||||
goto error5;
|
||||
}
|
||||
usb_set_intfdata(interface, vub300);
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user