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ARM64: dts: rockchip: rk3399: qos: add qos nodes

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add qos reg addr base.
add pm_qos nodes for save and restore registers when pd on/off.

Change-Id: I91286463ba1018f896b67ac5b85485520e1518e6
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
This commit is contained in:
Elaine Zhang
2016-05-10 15:44:56 +08:00
committed by Gerrit Code Review
parent 0afa3fa649
commit bc2cd84357
1 changed files with 76 additions and 0 deletions
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76
arch/arm64/boot/dts/rockchip/rk3399.dtsi
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@@ -794,6 +794,67 @@
status = "disabled";
};
qos_gpu: qos_gpu@0xffae0000 {
compatible ="syscon";
reg = <0x0 0xffae0000 0x0 0x20>;
};
qos_video_m0: qos_video_m0@0xffab8000 {
compatible ="syscon";
reg = <0x0 0xffab8000 0x0 0x20>;
};
qos_video_m1_r: qos_video_m1_r@0xffac0000 {
compatible ="syscon";
reg = <0x0 0xffac0000 0x0 0x20>;
};
qos_video_m1_w: qos_video_m1_w@0xffac0080 {
compatible ="syscon";
reg = <0x0 0xffac0080 0x0 0x20>;
};
qos_rga_r: qos_rga_r@0xffab0000 {
compatible ="syscon";
reg = <0x0 0xffab0000 0x0 0x20>;
};
qos_rga_w: qos_rga_w@0xffab0080 {
compatible ="syscon";
reg = <0x0 0xffab0000 0x0 0x20>;
};
qos_iep: qos_iep@0xffa98000 {
compatible ="syscon";
reg = <0x0 0xffa98000 0x0 0x20>;
};
qos_vop_big_r: qos_vop_big_r@0xffac8000 {
compatible ="syscon";
reg = <0x0 0xffac8000 0x0 0x20>;
};
qos_vop_big_w: qos_vop_big_w@0xffac8080 {
compatible ="syscon";
reg = <0x0 0xffac8080 0x0 0x20>;
};
qos_vop_little: qos_vop_little@0xffad0000 {
compatible ="syscon";
reg = <0x0 0xffad0000 0x0 0x20>;
};
qos_isp0_m0: qos_isp0_m0@0xffaa0000 {
compatible ="syscon";
reg = <0x0 0xffaa0000 0x0 0x20>;
};
qos_isp0_m1: qos_isp0_m1@0xffaa0080 {
compatible ="syscon";
reg = <0x0 0xffaa0080 0x0 0x20>;
};
qos_isp1_m0: qos_isp1_m0@0xffaa8000 {
compatible ="syscon";
reg = <0x0 0xffaa8000 0x0 0x20>;
};
qos_isp1_m1: qos_isp1_m1@0xffaa8080 {
compatible ="syscon";
reg = <0x0 0xffaa8080 0x0 0x20>;
};
qos_hdcp: qos_hdcp@0xffa90000 {
compatible ="syscon";
reg = <0x0 0xffa90000 0x0 0x20>;
};
pmu: power-management@ff310000 {
compatible = "rockchip,rk3399-pmu", "syscon", "simple-mfd";
reg = <0x0 0xff310000 0x0 0x1000>;
@@ -812,15 +873,21 @@
pd_vdu {
reg = <RK3399_PD_VDU>;
pm_qos = <&qos_video_m1_r>,
<&qos_video_m1_w>;
};
pd_vcodec {
reg = <RK3399_PD_VCODEC>;
pm_qos = <&qos_video_m0>;
};
pd_iep {
reg = <RK3399_PD_IEP>;
pm_qos = <&qos_iep>;
};
pd_rga {
reg = <RK3399_PD_RGA>;
pm_qos = <&qos_rga_r>,
<&qos_rga_w>;
};
};
pd_vio {
@@ -830,12 +897,17 @@
pd_isp0 {
reg = <RK3399_PD_ISP0>;
pm_qos = <&qos_isp0_m0>,
<&qos_isp0_m1>;
};
pd_isp1 {
reg = <RK3399_PD_ISP1>;
pm_qos = <&qos_isp1_m0>,
<&qos_isp1_m1>;
};
pd_hdcp {
reg = <RK3399_PD_HDCP>;
pm_qos = <&qos_hdcp>;
};
pd_vo {
reg = <RK3399_PD_VO>;
@@ -844,14 +916,18 @@
pd_vopb {
reg = <RK3399_PD_VOPB>;
pm_qos = <&qos_vop_big_r>,
<&qos_vop_big_w>;
};
pd_vopl {
reg = <RK3399_PD_VOPL>;
pm_qos = <&qos_vop_little>;
};
};
};
pd_gpu {
reg = <RK3399_PD_GPU>;
pm_qos = <&qos_gpu>;
};
};
};