diff --git a/drivers/amlogic/media_modules/common/media_clock/clk/clkg12.c b/drivers/amlogic/media_modules/common/media_clock/clk/clkg12.c
index 79282a5bbfce..d5b6daf9693c 100644
--- a/drivers/amlogic/media_modules/common/media_clock/clk/clkg12.c
+++ b/drivers/amlogic/media_modules/common/media_clock/clk/clkg12.c
@@ -34,6 +34,7 @@
 
 #define MHz (1000000)
 #define debug_print pr_info
+#define TL1_HEVC_MAX_CLK  (800)
 
 //#define  NO_CLKTREE
 
@@ -764,7 +765,10 @@ static int hevc_back_clock_set(int clk)
 	if ((clk > 500 && clk != 667)) {
 		if (clock_real_clk[VDEC_HEVCB] == 648)
 		return 648;
-		clk = 667;
+		if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_TL1)
+			clk = TL1_HEVC_MAX_CLK;
+		else
+			clk = 667;
 	}
 
 	if (set_frq_enable && hevcb_frq) {
@@ -809,7 +813,10 @@ static int hevc_clock_set(int clk)
 	if ((clk > 500 && clk != 667)) {
 		if (clock_real_clk[VDEC_HEVC] == 648)
 			return 648;
-		clk = 667;
+		if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_TL1)
+			clk = TL1_HEVC_MAX_CLK;
+		else
+			clk = 667;
 	}
 
 	if (set_frq_enable && hevc_frq) {
@@ -994,14 +1001,15 @@ static int vdec_clock_get(enum vdec_type_e core)
 #define VDEC_HAS_VDEC_HCODEC
 #define VDEC_HAS_CLK_SETTINGS
 #define CLK_FOR_CPU {\
-	MESON_CPU_MAJOR_ID_GXBB,\
-	MESON_CPU_MAJOR_ID_GXTVBB,\
-	MESON_CPU_MAJOR_ID_GXL,\
-	MESON_CPU_MAJOR_ID_GXM,\
-	MESON_CPU_MAJOR_ID_TXL,\
-	MESON_CPU_MAJOR_ID_TXLX,\
-	MESON_CPU_MAJOR_ID_G12A,\
-	MESON_CPU_MAJOR_ID_G12B,\
+	AM_MESON_CPU_MAJOR_ID_GXBB,\
+	AM_MESON_CPU_MAJOR_ID_GXTVBB,\
+	AM_MESON_CPU_MAJOR_ID_GXL,\
+	AM_MESON_CPU_MAJOR_ID_GXM,\
+	AM_MESON_CPU_MAJOR_ID_TXL,\
+	AM_MESON_CPU_MAJOR_ID_TXLX,\
+	AM_MESON_CPU_MAJOR_ID_G12A,\
+	AM_MESON_CPU_MAJOR_ID_G12B,\
+	AM_MESON_CPU_MAJOR_ID_TL1,\
 	0}
 #include "clk.h"
 
diff --git a/drivers/amlogic/media_modules/frame_provider/decoder/h265/vh265.c b/drivers/amlogic/media_modules/frame_provider/decoder/h265/vh265.c
index c88782789597..499560e6756a 100644
--- a/drivers/amlogic/media_modules/frame_provider/decoder/h265/vh265.c
+++ b/drivers/amlogic/media_modules/frame_provider/decoder/h265/vh265.c
@@ -56,7 +56,9 @@
 			/* .buf_size = 0x100000*16,
 			//4k2k , 0x100000 per buffer */
 			/* 4096x2304 , 0x120000 per buffer */
-#define MPRED_MV_BUF_SIZE		0x120000
+#define MPRED_8K_MV_BUF_SIZE		(0x120000*4)
+#define MPRED_4K_MV_BUF_SIZE		(0x120000)
+#define MPRED_MV_BUF_SIZE		(0x40000)
 
 #define MMU_COMPRESS_HEADER_SIZE  0x48000
 #define MMU_COMPRESS_8K_HEADER_SIZE  (0x48000*4)
@@ -113,9 +115,11 @@
 
 #define DUR2PTS(x) ((x)*90/96)
 
-#define MAX_SIZE_8K ((4096 * 2304) * 2)
+#define MAX_SIZE_8K (8192 * 4608)
 #define MAX_SIZE_4K (4096 * 2304)
 
+#define IS_8K_SIZE(w, h)  (((w) * (h)) > MAX_SIZE_4K)
+#define IS_4K_SIZE(w, h)  (((w) * (h)) > (1920*1088))
 
 #define SEI_UserDataITU_T_T35	4
 
@@ -1044,7 +1048,7 @@ static struct BuffInfo_s amvh265_workbuff_spec[WORK_BUF_SPEC_NUM] = {
 			/* .buf_size = 0x100000*16,
 			//4k2k , 0x100000 per buffer */
 			/* 4096x2304 , 0x120000 per buffer */
-			.buf_size = MPRED_MV_BUF_SIZE * MAX_REF_PIC_NUM,
+			.buf_size = MPRED_4K_MV_BUF_SIZE * MAX_REF_PIC_NUM,
 		},
 #endif
 		.rpm = {
@@ -1105,16 +1109,18 @@ static struct BuffInfo_s amvh265_workbuff_spec[WORK_BUF_SPEC_NUM] = {
 		.mmu_vbh = {
 			.buf_size = 0x5000*2, //2*16*2304/4, 4K
 		},
+#if 0
 		.cm_header = {
 			.buf_size = MMU_COMPRESS_8K_HEADER_SIZE *
 				MAX_REF_PIC_NUM, 	// 0x44000 = ((1088*2*1024*4)/32/4)*(32/8)
 		},
+#endif
 		.mpred_above = {
 			.buf_size = 0x8000*2,
 		},
 #ifdef MV_USE_FIXED_BUF
 		.mpred_mv = {
-			.buf_size = MPRED_MV_BUF_SIZE * MAX_REF_PIC_NUM * 4, //4k2k , 0x120000 per buffer
+			.buf_size = MPRED_8K_MV_BUF_SIZE * MAX_REF_PIC_NUM, //4k2k , 0x120000 per buffer
 		},
 #endif
 		.rpm = {
@@ -2274,19 +2280,28 @@ static int alloc_mv_buf(struct hevc_state_s *hevc, int i)
 static int get_mv_buf(struct hevc_state_s *hevc, struct PIC_s *pic)
 {
 #ifdef MV_USE_FIXED_BUF
-	if (pic && pic->index >= 0)
-		pic->mpred_mv_wr_start_addr =
-			hevc->work_space_buf->mpred_mv.buf_start
-			+ (pic->index * MPRED_MV_BUF_SIZE);
+	if (pic && pic->index >= 0) {
+		if (IS_8K_SIZE(pic->width, pic->height)) {
+			pic->mpred_mv_wr_start_addr =
+				hevc->work_space_buf->mpred_mv.buf_start
+				+ (pic->index * MPRED_8K_MV_BUF_SIZE);
+		} else {
+			pic->mpred_mv_wr_start_addr =
+				hevc->work_space_buf->mpred_mv.buf_start
+				+ (pic->index * MPRED_4K_MV_BUF_SIZE);
+		}
+	}
 	return 0;
 #else
 	int i;
 	int ret = -1;
 	int new_size;
-	if (pic->width > 1920 || pic->height > 1088)
-		new_size = MPRED_MV_BUF_SIZE + 0x10000; /*0x120000*/
+	if (IS_8K_SIZE(pic->width, pic->height))
+		new_size = MPRED_8K_MV_BUF_SIZE + 0x10000;
+	else if (IS_4K_SIZE(pic->width, pic->height))
+		new_size = MPRED_4K_MV_BUF_SIZE + 0x10000; /*0x120000*/
 	else
-		new_size = 0x40000 + 0x10000;
+		new_size = MPRED_MV_BUF_SIZE + 0x10000;
 	if (new_size != hevc->mv_buf_size) {
 		dealloc_mv_bufs(hevc);
 		hevc->mv_buf_size = new_size;
@@ -2381,7 +2396,8 @@ static int cal_current_buf_size(struct hevc_state_s *hevc,
 	int dw_mode = get_double_write_mode(hevc);
 
 	if (hevc->mmu_enable) {
-		if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_TL1)
+		if ((get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_TL1) &&
+			(IS_8K_SIZE(hevc->pic_w, hevc->pic_h)))
 			buf_size = ((MMU_COMPRESS_8K_HEADER_SIZE + 0xffff) >> 16)
 				<< 16;
 		else
@@ -2606,7 +2622,8 @@ static int config_pic(struct hevc_state_s *hevc, struct PIC_s *pic)
 
 	if (hevc->mmu_enable) {
 		pic->header_adr = hevc->m_BUF[i].start_adr;
-		if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_TL1)
+		if ((get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_TL1) &&
+			(IS_8K_SIZE(hevc->pic_w, hevc->pic_h)))
 			y_adr = hevc->m_BUF[i].start_adr +
 				MMU_COMPRESS_8K_HEADER_SIZE;
 		else