From bd5db4543aa8352865319b71104043d3389ccfd1 Mon Sep 17 00:00:00 2001 From: Zhang Yubing Date: Tue, 4 Jun 2024 09:42:05 +0800 Subject: [PATCH] drm/rockchip: vop2: enable switch dclk to avoid turn off esmart pd failed When enable vrr by switch dclk, the dclk source may be vp1 dclk. In this case, if we want turn off esmart pd, the vp1 dclk should be enable. Change-Id: I2ad5a716763607693723fc8af6275444edae3dee Signed-off-by: Zhang Yubing --- drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c index dc307bbff265..a356469f08b6 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c @@ -4773,6 +4773,8 @@ static void vop2_power_domain_off_by_disabled_vp(struct vop2_power_domain *pd) } if (vp) { + if (vp->dclk_switch) + clk_prepare_enable(vp->dclk_switch); ret = clk_prepare_enable(vp->dclk); if (ret < 0) DRM_DEV_ERROR(vop2->dev, "failed to enable dclk for video port%d - %d\n", @@ -4791,6 +4793,8 @@ static void vop2_power_domain_off_by_disabled_vp(struct vop2_power_domain *pd) DRM_DEV_INFO(vop2->dev, "wait for vp%d dsp_hold timeout\n", vp->id); vop2_dsp_hold_valid_irq_disable(crtc); + if (vp->dclk_switch) + clk_disable_unprepare(vp->dclk_switch); clk_disable_unprepare(vp->dclk); } }