From bdc1cace606d82842e7d0a9dcbfced594111d691 Mon Sep 17 00:00:00 2001 From: Chaoyi Chen Date: Fri, 8 Nov 2024 07:18:00 +0000 Subject: [PATCH] drm/rockchip: vop: Add support for RV1126B VOP on RV1126B support 2 win, max output resolution 1920x1080P60: Win0 MAX 1920x1080, support line YUV/RGB Win2 MAX 1920x1080, support RGB RV1126B VOP also supports write back feature, max resolution 1920x1080. Change-Id: I07376ec32e5200f29038b5bdcacc0ac31bd7e915 Signed-off-by: Chaoyi Chen --- drivers/gpu/drm/rockchip/Kconfig | 2 +- drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 3 +- drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 96 +++++++++++++++++++++ drivers/gpu/drm/rockchip/rockchip_vop_reg.h | 2 + 4 files changed, 100 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/rockchip/Kconfig b/drivers/gpu/drm/rockchip/Kconfig index ea80ce92fd67..1bdc3d5941b0 100644 --- a/drivers/gpu/drm/rockchip/Kconfig +++ b/drivers/gpu/drm/rockchip/Kconfig @@ -49,7 +49,7 @@ config ROCKCHIP_VOP CPU_PX30 || CPU_RK3308 || CPU_RV1106 || \ CPU_RV1126 || CPU_RK3288 || CPU_RK3368 || \ CPU_RK3399 || CPU_RK322X || CPU_RK3328 || \ - CPU_RK3576 || CPU_RK3506 + CPU_RK3576 || CPU_RK3506 || CPU_RV1126B default y if !ROCKCHIP_MINI_KERNEL help This selects support for the VOP driver. You should enable it diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h index e3c3c54b69b1..0f6f83f078a3 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h @@ -259,11 +259,10 @@ struct vop_reg_data { struct vop_reg { uint32_t mask; - uint32_t offset:17; + uint32_t offset:19; uint32_t shift:5; uint32_t begin_minor:4; uint32_t end_minor:4; - uint32_t reserved:2; uint32_t major:3; uint32_t write_mask:1; }; diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c index 2d28b8b37775..01a9578176e1 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c @@ -1898,6 +1898,98 @@ static const struct vop_data rv1126_vop = { .win_size = ARRAY_SIZE(rv1126_vop_win_data), }; +static const struct vop_ctrl rv1126b_ctrl_data = { + .cfg_done = VOP_REG(RK3366_LIT_REG_CFG_DONE, 0x1, 0), + .dsp_background = VOP_REG(RK3366_LIT_DSP_BG, 0x00ffffff, 0), + + .mcu_pix_total = VOP_REG(RK3366_LIT_MCU_CTRL, 0x3f, 0), + .mcu_cs_pst = VOP_REG(RK3366_LIT_MCU_CTRL, 0xf, 6), + .mcu_cs_pend = VOP_REG(RK3366_LIT_MCU_CTRL, 0x3f, 10), + .mcu_rw_pst = VOP_REG(RK3366_LIT_MCU_CTRL, 0xf, 16), + .mcu_rw_pend = VOP_REG(RK3366_LIT_MCU_CTRL, 0x3f, 20), + .mcu_clk_sel = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 26), + .mcu_hold_mode = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 27), + .mcu_frame_st = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 28), + .mcu_rs = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 29), + .mcu_bypass = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 30), + .mcu_type = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 31), + .mcu_rw_bypass_port = VOP_REG(RK3366_LIT_MCU_RW_BYPASS_PORT, + 0xffffffff, 0), + + .axi_max_outstanding_en = VOP_REG(RK3366_LIT_SYS_CTRL1, 0x1, 12), + .axi_outstanding_max_num = VOP_REG(RK3366_LIT_SYS_CTRL1, 0x1f, 16), + + .auto_gate_en = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 0), + .standby = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 1), + .dsp_outzero = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 3), + .yuv_clip = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 4), + .global_regdone_en = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 13), + + .rgb_en = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 0), + .rgb_dclk_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 1), + .rgb_pin_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x7, 2), + .core_dclk_div = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 13), + .mipi_en = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 24), + .mipi_dclk_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 25), + .mipi_pin_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x7, 26), + .bt1120_yc_swap = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 30), + .bt1120_en = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 31), + + .dsp_interlace = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 0), + .dither_up_en = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 2), + .overlay_mode = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 4), + .dsp_lut_en = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 5), + .dither_down_mode = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 6), + .dither_down_sel = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 7), + .dither_down_en = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 8), + .dsp_bg_swap = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 9), + .dsp_data_swap = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1f, 9), + .dsp_rb_swap = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 11), + .dsp_rg_swap = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 12), + .dsp_blank = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 14), + .dsp_black = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 15), + .out_mode = VOP_REG(RK3366_LIT_DSP_CTRL2, 0xf, 16), + .dsp_layer_sel = VOP_REG(RK3366_LIT_DSP_CTRL2, 0xff, 22), + + .htotal_pw = VOP_REG(RK3366_LIT_DSP_HTOTAL_HS_END, 0x0fff0fff, 0), + .hact_st_end = VOP_REG(RK3366_LIT_DSP_HACT_ST_END, 0x0fff0fff, 0), + .vtotal_pw = VOP_REG(RK3366_LIT_DSP_VTOTAL_VS_END, 0x0fff0fff, 0), + .vact_st_end = VOP_REG(RK3366_LIT_DSP_VACT_ST_END, 0x0fff0fff, 0), + .vact_st_end_f1 = VOP_REG(RK3366_LIT_DSP_VACT_ST_END_F1, 0x0fff0fff, 0), + .vs_st_end_f1 = VOP_REG(RK3366_LIT_DSP_VS_ST_END_F1, 0x0fff0fff, 0), + + .bcsh_en = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x1, 0), + .bcsh_r2y_csc_mode = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x1, 1), + .bcsh_out_mode = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x3, 2), + .bcsh_y2r_csc_mode = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x3, 4), + .bcsh_y2r_en = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x1, 6), + .bcsh_r2y_en = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x1, 7), + + .bcsh_color_bar = VOP_REG(RK3366_LIT_BCSH_COL_BAR, 0xffffff, 0), + .bcsh_brightness = VOP_REG(RK3366_LIT_BCSH_BCS, 0xff, 0), + .bcsh_contrast = VOP_REG(RK3366_LIT_BCSH_BCS, 0x1ff, 8), + .bcsh_sat_con = VOP_REG(RK3366_LIT_BCSH_BCS, 0x3ff, 20), + .bcsh_sin_hue = VOP_REG(RK3366_LIT_BCSH_H, 0x1ff, 0), + .bcsh_cos_hue = VOP_REG(RK3366_LIT_BCSH_H, 0x1ff, 16), +}; + +static const struct vop_grf_ctrl rv1126b_grf_ctrl = { + .grf_dclk_inv = VOP_REG(RV1126B_GRF_VOP_LCDC_CON, 0x1, 0), +}; + +static const struct vop_data rv1126b_vop = { + .soc_id = 0x1126b, + .vop_id = 0, + .version = VOP_VERSION(2, 5), + .max_input = {1920, 1920}, + .max_output = {1920, 1080}, + .ctrl = &rv1126b_ctrl_data, + .intr = &rk3366_lit_intr, + .grf = &rv1126b_grf_ctrl, + .win = rv1126_vop_win_data, + .win_size = ARRAY_SIZE(rv1126_vop_win_data), +}; + static const struct vop_ctrl rv1106_ctrl_data = { .standby = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 1), .axi_outstanding_max_num = VOP_REG(RK3366_LIT_SYS_CTRL1, 0x1f, 16), @@ -2294,6 +2386,10 @@ static const struct of_device_id vop_driver_dt_match[] = { { .compatible = "rockchip,rv1126-vop", .data = &rv1126_vop }, #endif +#if IS_ENABLED(CONFIG_CPU_RV1126B) + { .compatible = "rockchip,rv1126b-vop", + .data = &rv1126b_vop }, +#endif #if IS_ENABLED(CONFIG_CPU_RK3288) { .compatible = "rockchip,rk3288-vop-big", .data = &rk3288_vop_big }, diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.h b/drivers/gpu/drm/rockchip/rockchip_vop_reg.h index 0344f215ecdb..40bf432fa6b0 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.h +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.h @@ -1039,6 +1039,8 @@ #define RV1126_GRF_IOFUNC_CON3 0x1026c +#define RV1126B_GRF_VOP_LCDC_CON 0x30b9c + #define RK3506_GRF_SOC_CON2 0x0008 #define RK3562_GRF_IOC_VO_IO_CON 0x10500