diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
index 788d74cf047c..2b7cd013cd60 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
@@ -3538,6 +3538,10 @@ static int vop2_extend_clk_switch_pll(struct vop2 *vop2, struct vop2_extend_pll
 	return 0;
 }
 
+static inline int vop2_extend_clk_get_vp_id(struct vop2_extend_pll *ext_pll)
+{
+	return ffs(ext_pll->vp_mask) - 1;
+}
 
 /*
  * Here are 2 hdmi phy pll can use for video port dclk. The strategies of how to use hdmi phy pll
@@ -3598,13 +3602,13 @@ static int vop2_clk_set_parent_extend(struct vop2_video_port *vp,
 		    (vcstate->output_if & VOP_OUTPUT_IF_HDMI1)) {
 			if (hdmi0_phy_pll->vp_mask) {
 				DRM_ERROR("hdmi0 phy pll is used by vp%d\n",
-					  hdmi0_phy_pll->vp_mask);
+					  vop2_extend_clk_get_vp_id(hdmi0_phy_pll));
 				return -EBUSY;
 			}
 
 			if (hdmi1_phy_pll->vp_mask) {
 				DRM_ERROR("hdmi1 phy pll is used by vp%d\n",
-					  hdmi1_phy_pll->vp_mask);
+					  vop2_extend_clk_get_vp_id(hdmi1_phy_pll));
 				return -EBUSY;
 			}
 
@@ -3621,8 +3625,8 @@ static int vop2_clk_set_parent_extend(struct vop2_video_port *vp,
 				if (hdmi1_phy_pll) {
 					if (hdmi1_phy_pll->vp_mask) {
 						DRM_ERROR("hdmi0: phy pll is used by vp%d:vp%d\n",
-							  hdmi0_phy_pll->vp_mask,
-							  hdmi1_phy_pll->vp_mask);
+							  vop2_extend_clk_get_vp_id(hdmi0_phy_pll),
+							  vop2_extend_clk_get_vp_id(hdmi1_phy_pll));
 						return -EBUSY;
 					}
 
@@ -3630,7 +3634,7 @@ static int vop2_clk_set_parent_extend(struct vop2_video_port *vp,
 								   hdmi1_phy_pll);
 				} else {
 					DRM_ERROR("hdmi0: phy pll is used by vp%d\n",
-						  hdmi0_phy_pll->vp_mask);
+						  vop2_extend_clk_get_vp_id(hdmi0_phy_pll));
 					return -EBUSY;
 				}
 			}
@@ -3647,8 +3651,8 @@ static int vop2_clk_set_parent_extend(struct vop2_video_port *vp,
 				if (hdmi0_phy_pll) {
 					if (hdmi0_phy_pll->vp_mask) {
 						DRM_ERROR("hdmi1: phy pll is used by vp%d:vp%d\n",
-							  hdmi0_phy_pll->vp_mask,
-							  hdmi1_phy_pll->vp_mask);
+							  vop2_extend_clk_get_vp_id(hdmi0_phy_pll),
+							  vop2_extend_clk_get_vp_id(hdmi1_phy_pll));
 						return -EBUSY;
 					}
 
@@ -3656,7 +3660,7 @@ static int vop2_clk_set_parent_extend(struct vop2_video_port *vp,
 								   hdmi0_phy_pll);
 				} else {
 					DRM_ERROR("hdmi1: phy pll is used by vp%d\n",
-						  hdmi1_phy_pll->vp_mask);
+						  vop2_extend_clk_get_vp_id(hdmi1_phy_pll));
 					return -EBUSY;
 				}
 			}