diff --git a/drivers/gpu/drm/panel/panel-maxim-max96752f.c b/drivers/gpu/drm/panel/panel-maxim-max96752f.c
index f0679619fba1..aef19b4d179b 100644
--- a/drivers/gpu/drm/panel/panel-maxim-max96752f.c
+++ b/drivers/gpu/drm/panel/panel-maxim-max96752f.c
@@ -451,9 +451,38 @@ static const struct panel_desc hannstar_hsd123jpw3_a15 = {
 	.disable		= hannstar_hsd123jpw3_a15_disable,
 };
 
+static int ogm_101fhbllm01_prepare(struct max96752f *max96752f)
+{
+	maxim_deserializer_write(max96752f, 0x01ce, 0x5e);
+
+	maxim_deserializer_write(max96752f, 0x0203, 0x84);	/* GPIO1 -> BL_PWM */
+	maxim_deserializer_write(max96752f, 0x0206, 0x84);	/* GPIO2 -> TP_RST */
+	maxim_deserializer_write(max96752f, 0x0209, 0x83);	/* GPIO3 <- TP_INT */
+
+	maxim_deserializer_write(max96752f, 0x0001, 0x02);
+
+	return 0;
+}
+
+static int ogm_101fhbllm01_unprepare(struct max96752f *max96752f)
+{
+	maxim_deserializer_write(max96752f, 0x0001, 0x01);
+
+	return 0;
+}
+
+static const struct panel_desc ogm_101fhbllm01 = {
+	.name			= "ogm,101fhbllm01",
+	.width_mm		= 126,
+	.height_mm		= 223,
+	.prepare		= ogm_101fhbllm01_prepare,
+	.unprepare		= ogm_101fhbllm01_unprepare,
+};
+
 static const struct of_device_id max96752f_of_match[] = {
 	{ .compatible = "boe,av156fht-l83", &boe_av156fht_l83 },
 	{ .compatible = "hannstar,hsd123jpw3-a15", &hannstar_hsd123jpw3_a15 },
+	{ .compatible = "ogm,101fhbllm01", &ogm_101fhbllm01 },
 	{ }
 };
 MODULE_DEVICE_TABLE(of, max96752f_of_match);