From c119759b78eeb3af5b9c83439d0868c8e33ad556 Mon Sep 17 00:00:00 2001 From: Dezhi Kong Date: Thu, 31 May 2018 19:04:59 +0800 Subject: [PATCH] di: ensure mif path reset to default PD#165270: di: ensure mif path reset to default Change-Id: I122a48efc49ef89cab5b647e3af7ea6d78e5f4fb Signed-off-by: Dezhi Kong --- .../amlogic/media/deinterlace/deinterlace_hw.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/drivers/amlogic/media/deinterlace/deinterlace_hw.c b/drivers/amlogic/media/deinterlace/deinterlace_hw.c index c4b3bcd829ed..01a43b3c3b80 100644 --- a/drivers/amlogic/media/deinterlace/deinterlace_hw.c +++ b/drivers/amlogic/media/deinterlace/deinterlace_hw.c @@ -2487,15 +2487,14 @@ void di_hw_disable(bool mc_enable) enable_di_pre_mif(false, mc_enable); DI_Wr(DI_POST_SIZE, (32-1) | ((128-1) << 16)); DI_Wr_reg_bits(DI_IF1_GEN_REG, 0, 0, 1); - if (cpu_after_eq(MESON_CPU_MAJOR_ID_TXL)) { + if (cpu_after_eq(MESON_CPU_MAJOR_ID_TXL)) DI_Wr_reg_bits(DI_IF2_GEN_REG, 0, 0, 1); - /* disable ma,enable if0 to vpp,enable afbc to vpp */ - if (!cpu_after_eq(MESON_CPU_MAJOR_ID_G12A)) { - if (Rd_reg_bits(VIU_MISC_CTRL0, 16, 4) != 0) - DI_Wr_reg_bits(VIU_MISC_CTRL0, 0, 16, 4); - /* DI inp(current data) switch to memory */ - DI_Wr_reg_bits(VIUB_MISC_CTRL0, 0, 16, 1); - } + /* disable ma,enable if0 to vpp,enable afbc to vpp */ + if (!cpu_after_eq(MESON_CPU_MAJOR_ID_G12A)) { + if (Rd_reg_bits(VIU_MISC_CTRL0, 16, 4) != 0) + DI_Wr_reg_bits(VIU_MISC_CTRL0, 0, 16, 4); + /* DI inp(current data) switch to memory */ + DI_Wr_reg_bits(VIUB_MISC_CTRL0, 0, 16, 1); } } /*