From c385226ffcb31d2c310546207c47a17837ca3935 Mon Sep 17 00:00:00 2001 From: Lei Yang Date: Sun, 29 Sep 2019 15:18:06 +0800 Subject: [PATCH] hdmirx: modify recovery flow for aud_pll error [1/1] PD#SWPL-14776 Problem: aud pll is zero. need to reset aud bandgap Solution: modify related recovery flow Verify: TXLX Change-Id: If8ba596cb7bec81165a0b2f80aa388579cc68411 Signed-off-by: Lei Yang --- .../media/vin/tvin/hdmirx/hdmi_rx_drv.c | 3 +- .../media/vin/tvin/hdmirx/hdmi_rx_drv.h | 3 +- .../media/vin/tvin/hdmirx/hdmi_rx_hw.c | 40 ++++++++++++++----- .../media/vin/tvin/hdmirx/hdmi_rx_hw.h | 6 +-- .../media/vin/tvin/hdmirx/hdmi_rx_wrapper.c | 12 +++--- 5 files changed, 41 insertions(+), 23 deletions(-) diff --git a/drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_drv.c b/drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_drv.c index 529af126b508..19fe7cf78370 100644 --- a/drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_drv.c +++ b/drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_drv.c @@ -312,8 +312,7 @@ int hdmirx_dec_open(struct tvin_frontend_s *fe, enum tvin_port_e port) devp->param.port = port; /* should enable the adc ref signal for audio pll */ - vdac_enable(1, 0x10); - + /* vdac_enable(1, 0x10); */ hdmirx_open_port(port); rx.open_fg = 1; rx_pr("%s port:%x ok nosignal:%d\n", __func__, port, rx.no_signal); diff --git a/drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_drv.h b/drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_drv.h index 306b2874d397..a7178aa07ba6 100644 --- a/drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_drv.h +++ b/drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_drv.h @@ -34,7 +34,7 @@ #include "hdmi_rx_edid.h" -#define RX_VER0 "ver.2019-09-26" +#define RX_VER0 "ver.2019-09-27" /* * * @@ -366,6 +366,7 @@ struct aud_info_s { int real_channel_num; int real_sample_size; int real_sr; + u32 aud_clk; }; struct phy_sts { diff --git a/drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_hw.c b/drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_hw.c index ef8c0d6355b5..67477f796ac2 100644 --- a/drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_hw.c +++ b/drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_hw.c @@ -972,6 +972,8 @@ void rx_get_audinfo(struct aud_info_s *audio_info) audio_info->n/128; } else audio_info->arc = 0; + + audio_info->aud_clk = rx_measure_clock(MEASURE_CLK_AUD_PLL); } /* @@ -2393,11 +2395,28 @@ void hdmirx_load_firm_reset(int type) */ void rx_audio_bandgap_rst(void) { -vdac_enable(0, 0x10); -udelay(20); -vdac_enable(1, 0x10); -if (log_level & AUDIO_LOG) - rx_pr("%s\n", __func__); + if (rx.chip_id >= CHIP_ID_TL1) + return; + + wr_reg_hhi_bits(HHI_VDAC_CNTL0_TXLX, _BIT(13), 1); + udelay(10); + wr_reg_hhi_bits(HHI_VDAC_CNTL0_TXLX, _BIT(13), 0); + if (log_level & AUDIO_LOG) + rx_pr("%s\n", __func__); +} + +void rx_audio_bandgap_en(void) +{ + if (rx.chip_id >= CHIP_ID_TL1) + return; + + wr_reg_hhi_bits(HHI_VDAC_CNTL0_TXLX, _BIT(9), 1); + wr_reg_hhi_bits(HHI_VDAC_CNTL0_TXLX, _BIT(13), 1); + udelay(10); + wr_reg_hhi_bits(HHI_VDAC_CNTL0_TXLX, _BIT(13), 0); + + if (log_level & AUDIO_LOG) + rx_pr("%s\n", __func__); } void rx_sw_reset(int level) @@ -2531,10 +2550,10 @@ return ret; */ bool is_aud_pll_error(void) { -bool ret = true; -int32_t clk = rx_measure_clock(MEASURE_CLK_AUD_PLL); -int32_t aud_128fs = rx.aud_info.real_sr * 128; -int32_t aud_512fs = rx.aud_info.real_sr * 512; + bool ret = true; + u32 clk = rx.aud_info.aud_clk; + int32_t aud_128fs = rx.aud_info.real_sr * 128; + int32_t aud_512fs = rx.aud_info.real_sr * 512; if (rx.aud_info.real_sr == 0) return false; @@ -2589,6 +2608,7 @@ void rx_aud_pll_ctl(bool en) } } else { if (en) { + rx_audio_bandgap_en(); tmp = hdmirx_rd_phy(PHY_MAINFSM_STATUS1); wr_reg_hhi(HHI_AUD_PLL_CNTL, 0x20000000); /* audio pll div depends on input freq */ @@ -3326,7 +3346,7 @@ int rx_get_aud_pll_err_sts(void) { int ret = E_AUDPLL_OK; int32_t req_clk = rx_measure_clock(MEASURE_CLK_MPLL); - int32_t aud_clk = rx_measure_clock(MEASURE_CLK_AUD_PLL); + u32 aud_clk = rx.aud_info.aud_clk; uint32_t phy_pll_rate = (hdmirx_rd_phy(PHY_MAINFSM_STATUS1)>>9)&0x3; uint32_t aud_pll_cntl = (rd_reg_hhi(HHI_AUD_PLL_CNTL6)>>28)&0x3; diff --git a/drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_hw.h b/drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_hw.h index 18c7047c5ff9..f3c63593047a 100644 --- a/drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_hw.h +++ b/drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_hw.h @@ -53,7 +53,7 @@ /* TXLX */ /* unified_register.h by wujun */ #define HHI_AUDPLL_CLK_OUT_CNTL (0x8c << 2) - +#define HHI_VDAC_CNTL0_TXLX (0xBD * 4) #define PREG_PAD_GPIO0_EN_N (0x0c * 4) #define PREG_PAD_GPIO0_O (0x0d * 4) #define PREG_PAD_GPIO0_I (0x0e * 4) @@ -1221,8 +1221,8 @@ extern void cec_hw_reset(unsigned int cec_sel); extern void rx_force_hpd_cfg(uint8_t hpd_level); extern void rx_force_rxsense_cfg(uint8_t level); extern void rx_force_hpd_rxsense_cfg(uint8_t level); -extern void rx_audio_bandgap_rst(void); -extern void rx_audio_bandgap_rst(void); +void rx_audio_bandgap_rst(void); +void rx_audio_bandgap_en(void); extern void rx_phy_rxsense_pulse(unsigned int t1, unsigned int t2, bool en); extern void rx_phy_power_on(unsigned int onoff); diff --git a/drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_wrapper.c b/drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_wrapper.c index b18748d91e6d..905fd79eb2c3 100644 --- a/drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_wrapper.c +++ b/drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_wrapper.c @@ -95,7 +95,7 @@ int force_vic; uint32_t fsm_log_en; uint32_t err_chk_en; -static int aud_sr_stb_max = 20; +static int aud_sr_stb_max = 30; /* used in other module */ static int audio_sample_rate; @@ -2407,16 +2407,14 @@ void rx_main_state_machine(void) rx_pr("reqclk err->wait_clk\n"); } else if (aud_sts == E_PLLRATE_CHG) rx_aud_pll_ctl(1); - else if (aud_sts == E_AUDCLK_ERR) { + else if (aud_sts == E_AUDCLK_ERR) rx_audio_bandgap_rst(); - rx.aud_sr_stable_cnt = 0; - } else { + else { rx_acr_info_sw_update(); rx_audio_pll_sw_update(); - if (log_level & AUDIO_LOG) - rx_pr("update audio-err\n"); } - + if (log_level & AUDIO_LOG) + rx_pr("update audio-err:%d\n, aud_sts"); rx.aud_sr_unstable_cnt = 0; } } else