diff --git a/drivers/clk/rockchip/clk-rk3576.c b/drivers/clk/rockchip/clk-rk3576.c
index 19f3c94e8202..abbbab4df754 100644
--- a/drivers/clk/rockchip/clk-rk3576.c
+++ b/drivers/clk/rockchip/clk-rk3576.c
@@ -455,25 +455,25 @@ static struct rockchip_clk_branch rk3576_clk_branches[] __initdata = {
 	COMPOSITE(ACLK_VO0VOP_CHANNEL, "aclk_vo0vop_channel", gpll_cpll_lpll_bpll_p, CLK_IS_CRITICAL,
 			RK3576_CLKSEL_CON(19), 12, 2, MFLAGS, 8, 4, DFLAGS,
 			RK3576_CLKGATE_CON(2), 1, GFLAGS),
-	MUX(0, "clk_audio_frac_0_src", gpll_cpll_aupll_24m_p, 0,
+	MUX(CLK_AUDIO_FRAC_0_SRC, "clk_audio_frac_0_src", gpll_cpll_aupll_24m_p, 0,
 			RK3576_CLKSEL_CON(13), 0, 2, MFLAGS),
 	COMPOSITE_FRAC(CLK_AUDIO_FRAC_0, "clk_audio_frac_0", "clk_audio_frac_0_src", 0,
-			RK3576_CLKSEL_CON(12), 0,
+			RK3576_CLKSEL_CON(12), CLK_FRAC_DIVIDER_NO_LIMIT,
 			RK3576_CLKGATE_CON(1), 10, GFLAGS),
-	MUX(0, "clk_audio_frac_1_src", gpll_cpll_aupll_24m_p, 0,
+	MUX(CLK_AUDIO_FRAC_1_SRC, "clk_audio_frac_1_src", gpll_cpll_aupll_24m_p, 0,
 			RK3576_CLKSEL_CON(15), 0, 2, MFLAGS),
 	COMPOSITE_FRAC(CLK_AUDIO_FRAC_1, "clk_audio_frac_1", "clk_audio_frac_1_src", 0,
-			RK3576_CLKSEL_CON(14), 0,
+			RK3576_CLKSEL_CON(14), CLK_FRAC_DIVIDER_NO_LIMIT,
 			RK3576_CLKGATE_CON(1), 11, GFLAGS),
-	MUX(0, "clk_audio_frac_2_src", gpll_cpll_aupll_24m_p, 0,
+	MUX(CLK_AUDIO_FRAC_2_SRC, "clk_audio_frac_2_src", gpll_cpll_aupll_24m_p, 0,
 			RK3576_CLKSEL_CON(17), 0, 2, MFLAGS),
 	COMPOSITE_FRAC(CLK_AUDIO_FRAC_2, "clk_audio_frac_2", "clk_audio_frac_2_src", 0,
-			RK3576_CLKSEL_CON(16), 0,
+			RK3576_CLKSEL_CON(16), CLK_FRAC_DIVIDER_NO_LIMIT,
 			RK3576_CLKGATE_CON(1), 12, GFLAGS),
-	MUX(0, "clk_audio_frac_3_src", gpll_cpll_aupll_24m_p, 0,
+	MUX(CLK_AUDIO_FRAC_3_SRC, "clk_audio_frac_3_src", gpll_cpll_aupll_24m_p, 0,
 			RK3576_CLKSEL_CON(19), 0, 2, MFLAGS),
 	COMPOSITE_FRAC(CLK_AUDIO_FRAC_3, "clk_audio_frac_3", "clk_audio_frac_3_src", 0,
-			RK3576_CLKSEL_CON(18), 0,
+			RK3576_CLKSEL_CON(18), CLK_FRAC_DIVIDER_NO_LIMIT,
 			RK3576_CLKGATE_CON(1), 13, GFLAGS),
 	MUX(0, "clk_uart_frac_0_src", gpll_cpll_aupll_24m_p, 0,
 			RK3576_CLKSEL_CON(22), 0, 2, MFLAGS),
diff --git a/include/dt-bindings/clock/rockchip,rk3576-cru.h b/include/dt-bindings/clock/rockchip,rk3576-cru.h
index 8125fcbdd38c..4d262a77aa1f 100644
--- a/include/dt-bindings/clock/rockchip,rk3576-cru.h
+++ b/include/dt-bindings/clock/rockchip,rk3576-cru.h
@@ -553,6 +553,10 @@
 #define ACLK_CRYPTO_NS			551
 #define CLK_PKA_CRYPTO_NS		552
 #define ACLK_RKVDEC_ROOT_BAK		553
+#define CLK_AUDIO_FRAC_0_SRC		554
+#define CLK_AUDIO_FRAC_1_SRC		555
+#define CLK_AUDIO_FRAC_2_SRC		556
+#define CLK_AUDIO_FRAC_3_SRC		557
 
 /* secure clk */
 #define CLK_STIMER0_ROOT		600