diff --git a/arch/arm64/boot/dts/rockchip/rk3562-dictpen-test3-v20.dts b/arch/arm64/boot/dts/rockchip/rk3562-dictpen-test3-v20.dts index f2198a8b3e8d..0123146714bb 100644 --- a/arch/arm64/boot/dts/rockchip/rk3562-dictpen-test3-v20.dts +++ b/arch/arm64/boot/dts/rockchip/rk3562-dictpen-test3-v20.dts @@ -167,6 +167,8 @@ }; &cpu0_opp_table { + rockchip,low-temp-min-volt = <1000000>; + opp-408000000 { /delete-property/ opp-suspend; }; @@ -680,7 +682,7 @@ regulator-boot-on; regulator-min-microvolt = <800000>; regulator-max-microvolt = <1350000>; - regulator-init-microvolt = <900000>; + regulator-init-microvolt = <950000>; regulator-ramp-delay = <6001>; regulator-initial-mode = <0x2>; regulator-name = "vdd_logic"; @@ -695,7 +697,7 @@ regulator-boot-on; regulator-min-microvolt = <825000>; regulator-max-microvolt = <1350000>; - regulator-init-microvolt = <900000>; + regulator-init-microvolt = <1000000>; regulator-ramp-delay = <6001>; regulator-initial-mode = <0x2>; regulator-name = "vdd_cpu"; diff --git a/arch/arm64/boot/dts/rockchip/rk3562-rk809.dtsi b/arch/arm64/boot/dts/rockchip/rk3562-rk809.dtsi index 02f91919b705..1bf64d327fdd 100644 --- a/arch/arm64/boot/dts/rockchip/rk3562-rk809.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3562-rk809.dtsi @@ -76,7 +76,7 @@ regulator-boot-on; regulator-min-microvolt = <500000>; regulator-max-microvolt = <1350000>; - regulator-init-microvolt = <900000>; + regulator-init-microvolt = <950000>; regulator-ramp-delay = <6001>; regulator-initial-mode = <0x2>; regulator-name = "vdd_logic"; @@ -90,7 +90,7 @@ regulator-boot-on; regulator-min-microvolt = <500000>; regulator-max-microvolt = <1350000>; - regulator-init-microvolt = <900000>; + regulator-init-microvolt = <1050000>; regulator-ramp-delay = <6001>; regulator-initial-mode = <0x2>; regulator-name = "vdd_cpu"; diff --git a/arch/arm64/boot/dts/rockchip/rk3562-rk817-tablet-v10.dts b/arch/arm64/boot/dts/rockchip/rk3562-rk817-tablet-v10.dts index 4f9edc072df7..5dd4cc96f112 100644 --- a/arch/arm64/boot/dts/rockchip/rk3562-rk817-tablet-v10.dts +++ b/arch/arm64/boot/dts/rockchip/rk3562-rk817-tablet-v10.dts @@ -601,7 +601,7 @@ regulator-boot-on; regulator-min-microvolt = <500000>; regulator-max-microvolt = <1350000>; - regulator-init-microvolt = <900000>; + regulator-init-microvolt = <950000>; regulator-ramp-delay = <6001>; regulator-initial-mode = <0x2>; regulator-name = "vdd_logic"; @@ -616,7 +616,7 @@ regulator-boot-on; regulator-min-microvolt = <500000>; regulator-max-microvolt = <1350000>; - regulator-init-microvolt = <900000>; + regulator-init-microvolt = <1050000>; regulator-ramp-delay = <6001>; regulator-initial-mode = <0x2>; regulator-name = "vdd_cpu"; diff --git a/arch/arm64/boot/dts/rockchip/rk3562-rk817.dtsi b/arch/arm64/boot/dts/rockchip/rk3562-rk817.dtsi index 8bfd2466c232..25c8c62e077e 100644 --- a/arch/arm64/boot/dts/rockchip/rk3562-rk817.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3562-rk817.dtsi @@ -72,7 +72,7 @@ regulator-boot-on; regulator-min-microvolt = <500000>; regulator-max-microvolt = <1350000>; - regulator-init-microvolt = <900000>; + regulator-init-microvolt = <950000>; regulator-ramp-delay = <6001>; regulator-initial-mode = <0x2>; regulator-name = "vdd_logic"; @@ -87,7 +87,7 @@ regulator-boot-on; regulator-min-microvolt = <500000>; regulator-max-microvolt = <1350000>; - regulator-init-microvolt = <900000>; + regulator-init-microvolt = <1050000>; regulator-ramp-delay = <6001>; regulator-initial-mode = <0x2>; regulator-name = "vdd_cpu"; diff --git a/arch/arm64/boot/dts/rockchip/rk3562.dtsi b/arch/arm64/boot/dts/rockchip/rk3562.dtsi index 212e4154d4b0..d9e9064a2986 100644 --- a/arch/arm64/boot/dts/rockchip/rk3562.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3562.dtsi @@ -273,7 +273,7 @@ rockchip,grf = <&sys_grf>; rockchip,temp-hysteresis = <5000>; rockchip,low-temp = <10000>; - rockchip,low-temp-min-volt = <925000>; + rockchip,low-temp-min-volt = <1050000>; opp-408000000 { opp-hz = /bits/ 64 <408000000>; @@ -501,7 +501,7 @@ rockchip,temp-hysteresis = <5000>; rockchip,low-temp = <10000>; - rockchip,low-temp-min-volt = <900000>; + rockchip,low-temp-min-volt = <950000>; rockchip,leakage-voltage-sel = < 1 15 0 diff --git a/arch/arm64/boot/dts/rockchip/rk3562j-core-ddr4-v10.dts b/arch/arm64/boot/dts/rockchip/rk3562j-core-ddr4-v10.dts index bdd68af31952..c98056c4517f 100644 --- a/arch/arm64/boot/dts/rockchip/rk3562j-core-ddr4-v10.dts +++ b/arch/arm64/boot/dts/rockchip/rk3562j-core-ddr4-v10.dts @@ -180,7 +180,7 @@ regulator-boot-on; regulator-min-microvolt = <500000>; regulator-max-microvolt = <1350000>; - regulator-init-microvolt = <900000>; + regulator-init-microvolt = <950000>; regulator-ramp-delay = <6001>; regulator-initial-mode = <0x2>; regulator-name = "vdd_logic"; @@ -194,7 +194,7 @@ regulator-boot-on; regulator-min-microvolt = <500000>; regulator-max-microvolt = <1350000>; - regulator-init-microvolt = <900000>; + regulator-init-microvolt = <1050000>; regulator-ramp-delay = <6001>; regulator-initial-mode = <0x2>; regulator-name = "vdd_cpu"; diff --git a/drivers/media/platform/rockchip/isp/rkisp.c b/drivers/media/platform/rockchip/isp/rkisp.c index fe2d2643b588..6087cd2b07fd 100644 --- a/drivers/media/platform/rockchip/isp/rkisp.c +++ b/drivers/media/platform/rockchip/isp/rkisp.c @@ -1059,8 +1059,10 @@ static void rkisp_rdbk_work(struct work_struct *work) void rkisp_check_idle(struct rkisp_device *dev, u32 irq) { + unsigned long lock_flags = 0; u32 val = 0; + spin_lock_irqsave(&dev->hw_dev->rdbk_lock, lock_flags); dev->irq_ends |= (irq & dev->irq_ends_mask); v4l2_dbg(3, rkisp_debug, &dev->v4l2_dev, "%s irq:0x%x ends:0x%x mask:0x%x\n", @@ -1072,8 +1074,11 @@ void rkisp_check_idle(struct rkisp_device *dev, u32 irq) complete(&dev->hw_dev->monitor.cmpl); } if ((dev->irq_ends & dev->irq_ends_mask) != dev->irq_ends_mask || - !IS_HDR_RDBK(dev->rd_mode)) + !IS_HDR_RDBK(dev->rd_mode)) { + spin_unlock_irqrestore(&dev->hw_dev->rdbk_lock, lock_flags); return; + } + spin_unlock_irqrestore(&dev->hw_dev->rdbk_lock, lock_flags); if (dev->sw_rd_cnt) goto end; diff --git a/drivers/mfd/rkx110_x120/hal/cru_rkx110.c b/drivers/mfd/rkx110_x120/hal/cru_rkx110.c index 5d53ec33dd60..4e1533fe1b31 100644 --- a/drivers/mfd/rkx110_x120/hal/cru_rkx110.c +++ b/drivers/mfd/rkx110_x120/hal/cru_rkx110.c @@ -263,6 +263,7 @@ static HAL_Status RKX11x_HAL_CRU_ClkSetFreq(struct hwclk *hw, uint32_t clockName uint32_t pll; uint8_t overMax = 0; HAL_Status ret = HAL_OK; + int i; if (clockName == RKX110_CLK_D_DSI_0_PATTERN_GEN || clockName == RKX110_CLK_D_DSI_1_PATTERN_GEN) { @@ -326,12 +327,21 @@ static HAL_Status RKX11x_HAL_CRU_ClkSetFreq(struct hwclk *hw, uint32_t clockName /* PLL change closest new rate <= 1200M if need */ if (!pRate) { - pRate = (_MHZ(1200) / rate) * rate; - } - - ret = RKX11x_HAL_CRU_ClkSetFreq(hw, pll, pRate); - if (ret != HAL_OK) { - return ret; + if (!rate || rate > _MHZ(1200)) + return HAL_ERROR; + for (i = _MHZ(1200) / rate; i > _MHZ(24) / rate; i--) { + pRate = i * rate; + ret = RKX11x_HAL_CRU_ClkSetFreq(hw, pll, pRate); + if (ret == HAL_OK) + break; + } + if (ret != HAL_OK) + return ret; + } else { + ret = RKX11x_HAL_CRU_ClkSetFreq(hw, pll, pRate); + if (ret != HAL_OK) { + return ret; + } } /* if success, continue to set divider */ diff --git a/drivers/mfd/rkx110_x120/hal/cru_rkx111.c b/drivers/mfd/rkx110_x120/hal/cru_rkx111.c index 41da74fb027b..1f22f406ffce 100644 --- a/drivers/mfd/rkx110_x120/hal/cru_rkx111.c +++ b/drivers/mfd/rkx110_x120/hal/cru_rkx111.c @@ -304,6 +304,7 @@ static HAL_Status RKX11x_HAL_CRU_ClkSetFreq(struct hwclk *hw, uint32_t clockName uint32_t pll; uint8_t overMax = 0; HAL_Status ret = HAL_OK; + int i; if (clockName == RKX110_CLK_D_DSI_0_PATTERN_GEN) { clockName = RKX111_CPS_DCLK_D_DSI_0_REC; @@ -371,12 +372,21 @@ static HAL_Status RKX11x_HAL_CRU_ClkSetFreq(struct hwclk *hw, uint32_t clockName /* PLL change closest new rate <= 1200M if need */ if (!pRate) { - pRate = (_MHZ(1200) / rate) * rate; - } - - ret = RKX11x_HAL_CRU_ClkSetFreq(hw, pll, pRate); - if (ret != HAL_OK) { - return ret; + if (!rate || rate > _MHZ(1200)) + return HAL_ERROR; + for (i = _MHZ(1200) / rate; i > _MHZ(24) / rate; i--) { + pRate = i * rate; + ret = RKX11x_HAL_CRU_ClkSetFreq(hw, pll, pRate); + if (ret == HAL_OK) + break; + } + if (ret != HAL_OK) + return ret; + } else { + ret = RKX11x_HAL_CRU_ClkSetFreq(hw, pll, pRate); + if (ret != HAL_OK) { + return ret; + } } /* if success, continue to set divider */ diff --git a/drivers/mfd/rkx110_x120/hal/cru_rkx120.c b/drivers/mfd/rkx110_x120/hal/cru_rkx120.c index 07da30ba0fd4..025a913626f8 100644 --- a/drivers/mfd/rkx110_x120/hal/cru_rkx120.c +++ b/drivers/mfd/rkx110_x120/hal/cru_rkx120.c @@ -252,6 +252,7 @@ static HAL_Status RKX12x_HAL_CRU_ClkSetFreq(struct hwclk *hw, uint32_t clockName uint32_t pll; uint8_t overMax; HAL_Status ret = HAL_OK; + int i; switch (clockName) { case RKX120_CPS_PLL_TXPLL: @@ -298,12 +299,21 @@ static HAL_Status RKX12x_HAL_CRU_ClkSetFreq(struct hwclk *hw, uint32_t clockName /* PLL change closest new rate <= 1200M if need */ if (!pRate) { - pRate = (_MHZ(1200) / rate) * rate; - } - - ret = RKX12x_HAL_CRU_ClkSetFreq(hw, pll, pRate); - if (ret != HAL_OK) { - return ret; + if (!rate || rate > _MHZ(1200)) + return HAL_ERROR; + for (i = _MHZ(1200) / rate; i > _MHZ(24) / rate; i--) { + pRate = i * rate; + ret = RKX12x_HAL_CRU_ClkSetFreq(hw, pll, pRate); + if (ret == HAL_OK) + break; + } + if (ret != HAL_OK) + return ret; + } else { + ret = RKX12x_HAL_CRU_ClkSetFreq(hw, pll, pRate); + if (ret != HAL_OK) { + return ret; + } } /* if success, continue to set divider */ diff --git a/drivers/mfd/rkx110_x120/hal/cru_rkx121.c b/drivers/mfd/rkx110_x120/hal/cru_rkx121.c index 350ce6c47f48..dfa1c62a30bd 100644 --- a/drivers/mfd/rkx110_x120/hal/cru_rkx121.c +++ b/drivers/mfd/rkx110_x120/hal/cru_rkx121.c @@ -263,6 +263,7 @@ static HAL_Status RKX12x_HAL_CRU_ClkSetFreq(struct hwclk *hw, uint32_t clockName uint32_t pll; uint8_t overMax; HAL_Status ret = HAL_OK; + int i; switch (clockName) { case RKX120_CPS_PLL_TXPLL: @@ -309,12 +310,21 @@ static HAL_Status RKX12x_HAL_CRU_ClkSetFreq(struct hwclk *hw, uint32_t clockName /* PLL change closest new rate <= 1200M if need */ if (!pRate) { - pRate = (_MHZ(1200) / rate) * rate; - } - - ret = RKX12x_HAL_CRU_ClkSetFreq(hw, pll, pRate); - if (ret != HAL_OK) { - return ret; + if (!rate || rate > _MHZ(1200)) + return HAL_ERROR; + for (i = _MHZ(1200) / rate; i > _MHZ(24) / rate; i--) { + pRate = i * rate; + ret = RKX12x_HAL_CRU_ClkSetFreq(hw, pll, pRate); + if (ret == HAL_OK) + break; + } + if (ret != HAL_OK) + return ret; + } else { + ret = RKX12x_HAL_CRU_ClkSetFreq(hw, pll, pRate); + if (ret != HAL_OK) { + return ret; + } } /* if success, continue to set divider */