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root
2010-07-23 17:23:35 +08:00
parent 4318594d32 4339a2c95b
commit c57328247e
8 changed files with 700 additions and 194 deletions
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2
.config
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@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.32.9
# Fri Jul 23 11:30:51 2010
# Thu Jul 22 11:54:10 2010
#
CONFIG_ARM=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y

7
arch/arm/mach-rk2818/Kconfig
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@@ -17,6 +17,13 @@ config MACH_RK2818PHONE
help
Support for the ROCKCHIP Board For Rk2818 Phone.
config MACH_RAHO
depends on ARCH_RK2818
default n
bool "ROCKCHIP Board For raho"
help
Support for the ROCKCHIP Board For raho Phone.
config RK28_GPIO_IRQ
int
default 16 if ARCH_RK2818

1
arch/arm/mach-rk2818/Makefile
View File

@@ -8,3 +8,4 @@ obj-$(CONFIG_PM) += pm.o
obj-$(CONFIG_RK28_ADC) += adc.o
obj-$(CONFIG_MACH_RK2818MID) += board-midsdk.o
obj-$(CONFIG_MACH_RK2818PHONE) += board-phonesdk.o
obj-$(CONFIG_MACH_RAHO) += board-raho.o

586
arch/arm/mach-rk2818/board-raho.c Normal file
View File

@@ -0,0 +1,586 @@
/* linux/arch/arm/mach-rk2818/board-phonesdk.c
*
* Copyright (C) 2010 ROCKCHIP, Inc.
*
* This software is licensed under the terms of the GNU General Public
* License version 2, as published by the Free Software Foundation, and
* may be copied, distributed, and modified under those terms.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/input.h>
#include <linux/io.h>
#include <linux/delay.h>
#include <linux/i2c.h>
#include <linux/spi/spi.h>
#include <linux/mmc/host.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/flash.h>
#include <mach/irqs.h>
#include <mach/board.h>
#include <mach/rk2818_iomap.h>
#include <mach/iomux.h>
#include <mach/gpio.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include "devices.h"
/* --------------------------------------------------------------------
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>rk2818_gpioBank<6E><6B><EFBFBD>飬<EFBFBD><E9A3AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>GPIO<49>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ID<49>ͼĴ<CDBC><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>
* -------------------------------------------------------------------- */
static struct rk2818_gpio_bank rk2818_gpioBank[] = {
{
.id = RK2818_ID_PIOA,
.offset = RK2818_GPIO0_BASE,
.clock = NULL,
},
{
.id = RK2818_ID_PIOB,
.offset = RK2818_GPIO0_BASE,
.clock = NULL,
},
{
.id = RK2818_ID_PIOC,
.offset = RK2818_GPIO0_BASE,
.clock = NULL,
},
{
.id = RK2818_ID_PIOD,
.offset = RK2818_GPIO0_BASE,
.clock = NULL,
},
{
.id = RK2818_ID_PIOE,
.offset = RK2818_GPIO1_BASE,
.clock = NULL,
},
{
.id = RK2818_ID_PIOF,
.offset = RK2818_GPIO1_BASE,
.clock = NULL,
},
{
.id = RK2818_ID_PIOG,
.offset = RK2818_GPIO1_BASE,
.clock = NULL,
},
{
.id = RK2818_ID_PIOH,
.offset = RK2818_GPIO1_BASE,
.clock = NULL,
}
};
//IOӳ<4F>䷽ʽ<E4B7BD><CABD><EFBFBD><EFBFBD> <20><>ÿ<EFBFBD><C3BF>Ϊһ<CEAA><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӳ<EFBFBD><D3B3>
static struct map_desc rk2818_io_desc[] __initdata = {
{
.virtual = RK2818_MCDMA_BASE, //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ
.pfn = __phys_to_pfn(RK2818_MCDMA_PHYS), //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ҳ<EFBFBD><D2B3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
.length = RK2818_MCDMA_SIZE, //<2F><><EFBFBD><EFBFBD>
.type = MT_DEVICE //ӳ<>䷽ʽ
},
{
.virtual = RK2818_DWDMA_BASE,
.pfn = __phys_to_pfn(RK2818_DWDMA_PHYS),
.length = RK2818_DWDMA_SIZE,
.type = MT_DEVICE
},
{
.virtual = RK2818_INTC_BASE,
.pfn = __phys_to_pfn(RK2818_INTC_PHYS),
.length = RK2818_INTC_SIZE,
.type = MT_DEVICE
},
{
.virtual = RK2818_NANDC_BASE,
.pfn = __phys_to_pfn(RK2818_NANDC_PHYS),
.length = RK2818_NANDC_SIZE,
.type = MT_DEVICE
},
{
.virtual = RK2818_SDRAMC_BASE,
.pfn = __phys_to_pfn(RK2818_SDRAMC_PHYS),
.length = RK2818_SDRAMC_SIZE,
.type = MT_DEVICE
},
{
.virtual = RK2818_ARMDARBITER_BASE,
.pfn = __phys_to_pfn(RK2818_ARMDARBITER_PHYS),
.length = RK2818_ARMDARBITER_SIZE,
.type = MT_DEVICE
},
{
.virtual = RK2818_APB_BASE,
.pfn = __phys_to_pfn(RK2818_APB_PHYS),
.length = 0xa0000,
.type = MT_DEVICE
},
{
.virtual = RK2818_WDT_BASE,
.pfn = __phys_to_pfn(RK2818_WDT_PHYS),
.length = 0xa0000, ///apb bus i2s i2c spi no map in this
.type = MT_DEVICE
},
};
/*****************************************************************************************
* SDMMC devices
*author: kfx
*****************************************************************************************/
void rk2818_sdmmc0_cfg_gpio(struct platform_device *dev)
{
#if 0
rk2818_mux_api_set(GPIOF3_APWM1_MMC0DETN_NAME, IOMUXA_SDMMC1_DETECT_N);
rk2818_mux_api_set(GPIOH_MMC0D_SEL_NAME, IOMUXA_SDMMC0_DATA123);
rk2818_mux_api_set(GPIOH_MMC0_SEL_NAME, IOMUXA_SDMMC0_CMD_DATA0_CLKOUT);
#endif
}
void rk2818_sdmmc1_cfg_gpio(struct platform_device *dev)
{
rk2818_mux_api_set(GPIOG_MMC1_SEL_NAME, IOMUXA_SDMMC1_CMD_DATA0_CLKOUT);
rk2818_mux_api_set(GPIOG_MMC1D_SEL_NAME, IOMUXA_SDMMC1_DATA123);
#if 0
/* wifi power up (gpio control) */
rk2818_mux_api_set(GPIOH7_HSADCCLK_SEL_NAME,IOMUXB_GPIO1_D7);
rk2818_mux_api_set(GPIOF5_APWM3_DPWM3_NAME,IOMUXB_GPIO1_B5);
gpio_request(RK2818_PIN_PH7, "sdio");
gpio_direction_output(RK2818_PIN_PH7,GPIO_HIGH);
#endif
}
#define CONFIG_SDMMC0_USE_DMA
#define CONFIG_SDMMC1_USE_DMA
struct rk2818_sdmmc_platform_data default_sdmmc0_data = {
.host_ocr_avail = (MMC_VDD_27_28|MMC_VDD_28_29|MMC_VDD_29_30|
MMC_VDD_30_31|MMC_VDD_31_32|MMC_VDD_32_33|
MMC_VDD_33_34|MMC_VDD_34_35| MMC_VDD_35_36),
.host_caps = (MMC_CAP_4_BIT_DATA|MMC_CAP_MMC_HIGHSPEED|MMC_CAP_SD_HIGHSPEED),
.cfg_gpio = rk2818_sdmmc0_cfg_gpio,
.no_detect = 0,
.dma_name = "sd_mmc",
#ifdef CONFIG_SDMMC0_USE_DMA
.use_dma = 1,
#else
.use_dma = 0,
#endif
};
struct rk2818_sdmmc_platform_data default_sdmmc1_data = {
.host_ocr_avail = (MMC_VDD_26_27|MMC_VDD_27_28|MMC_VDD_28_29|
MMC_VDD_29_30|MMC_VDD_30_31|MMC_VDD_31_32|
MMC_VDD_32_33|MMC_VDD_33_34),
.host_caps = (MMC_CAP_4_BIT_DATA|MMC_CAP_SDIO_IRQ|
MMC_CAP_MMC_HIGHSPEED|MMC_CAP_SD_HIGHSPEED),
.cfg_gpio = rk2818_sdmmc1_cfg_gpio,
.no_detect = 1,
.dma_name = "sdio",
#ifdef CONFIG_SDMMC1_USE_DMA
.use_dma = 1,
#else
.use_dma = 0,
#endif
};
/*****************************************************************************************
* extern gpio devices
*author: xxx
*****************************************************************************************/
#if defined (CONFIG_GPIO_PCA9554)
struct rk2818_gpio_expander_info extern_gpio_settinginfo[] = {
{
.gpio_num =RK2818_PIN_PI0,
.pin_type = GPIO_IN,
//.pin_value =GPIO_HIGH,
},
{
.gpio_num =RK2818_PIN_PI4,// tp3
.pin_type = GPIO_IN,
//.pin_value =GPIO_HIGH,
},
{
.gpio_num =RK2818_PIN_PI5,//tp4
.pin_type = GPIO_IN,
//.pin_value =GPIO_HIGH,
},
{
.gpio_num =RK2818_PIN_PI6,//tp2
.pin_type = GPIO_OUT,
//.pin_value =GPIO_HIGH,
},
{
.gpio_num =RK2818_PIN_PI7,//tp1
.pin_type = GPIO_OUT,
.pin_value =GPIO_HIGH,
},
};
struct pca9554_platform_data rk2818_pca9554_data={
.gpio_base=GPIOS_EXPANDER_BASE,
.gpio_pin_num=CONFIG_EXPANDED_GPIO_NUM,
.gpio_irq_start=NR_AIC_IRQS + 2*NUM_GROUP,
.irq_pin_num=CONFIG_EXPANDED_GPIO_IRQ_NUM,
.pca9954_irq_pin=RK2818_PIN_PE2,
.settinginfo=extern_gpio_settinginfo,
.settinginfolen=ARRAY_SIZE(extern_gpio_settinginfo),
.names="pca9554",
};
#endif
/*****************************************************************************************
* I2C devices
*author: kfx
*****************************************************************************************/
void rk2818_i2c0_cfg_gpio(struct platform_device *dev)
{
rk2818_mux_api_set(GPIOE_I2C0_SEL_NAME, IOMUXA_I2C0);
}
void rk2818_i2c1_cfg_gpio(struct platform_device *dev)
{
rk2818_mux_api_set(GPIOE_U1IR_I2C1_NAME, IOMUXA_I2C1);
}
struct rk2818_i2c_platform_data default_i2c0_data = {
.bus_num = 0,
.flags = 0,
.slave_addr = 0xff,
.scl_rate = 400*1000,
.cfg_gpio = rk2818_i2c0_cfg_gpio,
};
struct rk2818_i2c_platform_data default_i2c1_data = {
#ifdef CONFIG_I2C0_RK2818
.bus_num = 1,
#else
.bus_num = 0,
#endif
.flags = 0,
.slave_addr = 0xff,
.scl_rate = 400*1000,
.cfg_gpio = rk2818_i2c1_cfg_gpio,
};
struct rk2818_i2c_platform_data default_i2c2_data = {
.bus_num = 2,
.flags = 0,
.slave_addr = 0xff,
.scl_rate = 400*1000,
};
struct rk2818_i2c_platform_data default_i2c3_data = {
.bus_num = 3,
.flags = 0,
.slave_addr = 0xff,
.scl_rate = 400*1000,
};
static struct i2c_board_info __initdata board_i2c0_devices[] = {
#if defined (CONFIG_RK1000_CONTROL)
{
.type = "rk1000_control",
.addr = 0x40,
.flags = 0,
},
#endif
#if defined (CONFIG_RK1000_TVOUT)
{
.type = "rk1000_tvout",
.addr = 0x42,
.flags = 0,
},
#endif
#if defined (CONFIG_SND_SOC_RK1000)
{
.type = "rk1000_i2c_codec",
.addr = 0x60,
.flags = 0,
},
#endif
#if defined (CONFIG_SND_SOC_WM8988)
{
.type = "wm8988",
.addr = 0x1a,
.flags = 0,
}
#endif
};
static struct i2c_board_info __initdata board_i2c1_devices[] = {
#if defined (CONFIG_RTC_HYM8563)
{
.type = "rtc_hym8563",
.addr = 0x51,
.flags = 0,
},
#endif
#if defined (CONFIG_FM_QN8006)
{
.type = "fm_qn8006",
.addr = 0x2b,
.flags = 0,
},
#endif
#if defined (CONFIG_GPIO_PCA9554)
{
.type = "extend_gpio_pca9554",
.addr = 0x3c,
.flags = 0,
.platform_data=&rk2818_pca9554_data.gpio_base,
},
#endif
#if defined (CONFIG_SND_SOC_WM8994)
{
.type = "wm8994",
.addr = 0x1a,
.flags = 0,
},
#endif
#if defined (CONFIG_PMIC_LP8725)
{
.type = "lp8725",
.addr = 0x79,
.flags = 0,
},
#endif
#if defined (CONFIG_GS_MMA7660)
{
.type = "gs_mma7660",
.addr = 0x4c,
.flags = 0,
.irq = RK2818_PIN_PE3,
},
#endif
{},
};
static struct i2c_board_info __initdata board_i2c2_devices[] = {
};
static struct i2c_board_info __initdata board_i2c3_devices[] = {
};
/*****************************************************************************************
* SPI devices
*author: lhh
*****************************************************************************************/
static struct spi_board_info board_spi_devices[] = {
#if defined(CONFIG_SPI_FPGA)
{ /* fpga ice65l08xx */
.modalias = "spi_fpga",
.chip_select = 1,
.max_speed_hz = 8 * 1000 * 1000,
.bus_num = 0,
.mode = SPI_MODE_0,
},
#endif
#if defined(CONFIG_ENC28J60)
{ /* net chip */
.modalias = "enc28j60",
.chip_select = 1,
.max_speed_hz = 12 * 1000 * 1000,
.bus_num = 0,
.mode = SPI_MODE_0,
},
#endif
#if defined(CONFIG_TOUCHSCREEN_XPT2046_320X480_SPI) || defined(CONFIG_TOUCHSCREEN_XPT2046_320X480_CBN_SPI)
{
.modalias = "xpt2046_ts",
.chip_select = 0,
.max_speed_hz = 125 * 1000 * 26,/* (max sample rate @ 3V) * (cmd + data + overhead) */
.bus_num = 0,
.irq = RK2818_PIN_PE1,
},
#endif
};
/*rk2818_fb gpio information*/
static struct rk2818_fb_gpio rk2818_fb_gpio_info = {
.display_on = (GPIO_LOW<<16)|RK2818_PIN_PA2,
.lcd_standby = 0,
.mcu_fmk_pin = 0,
};
/*rk2818_fb iomux information*/
static struct rk2818_fb_iomux rk2818_fb_iomux_info = {
.data16 = GPIOC_LCDC16BIT_SEL_NAME,
.data18 = GPIOC_LCDC18BIT_SEL_NAME,
.data24 = GPIOC_LCDC24BIT_SEL_NAME,
.den = CXGPIO_LCDDEN_SEL_NAME,
.vsync = CXGPIO_LCDVSYNC_SEL_NAME,
.mcu_fmk = 0,
};
/*rk2818_fb*/
struct rk2818_fb_mach_info rk2818_fb_mach_info = {
.gpio = &rk2818_fb_gpio_info,
.iomux = &rk2818_fb_iomux_info,
};
struct rk2818bl_info rk2818_bl_info = {
.pwm_id = 0,
.pw_pin = GPIO_HIGH | (RK2818_PIN_PF4<< 8) ,
.bl_ref = 0,
.pw_iomux = GPIOF34_UART3_SEL_NAME,
};
static struct platform_device *devices[] __initdata = {
&rk2818_device_uart1,
#ifdef CONFIG_DM9000
&rk2818_device_dm9k,
#endif
#ifdef CONFIG_I2C0_RK2818
&rk2818_device_i2c0,
#endif
#ifdef CONFIG_I2C1_RK2818
&rk2818_device_i2c1,
#endif
#ifdef CONFIG_SPI_I2C
&rk2818_device_i2c2,
#endif
#ifdef CONFIG_SPI_I2C
&rk2818_device_i2c3,
#endif
#ifdef CONFIG_SDMMC0_RK2818
&rk2818_device_sdmmc0,
#endif
#ifdef CONFIG_SDMMC1_RK2818
&rk2818_device_sdmmc1,
#endif
&rk2818_device_spim,
&rk2818_device_i2s,
#if defined(CONFIG_ANDROID_PMEM)
&rk2818_device_pmem,
&rk2818_device_pmem_dsp,
#endif
&rk2818_device_adc,
&rk2818_device_adckey,
&rk2818_device_battery,
&rk2818_device_fb,
&rk2818_device_backlight,
&rk2818_device_dsp,
#ifdef CONFIG_MTD_NAND_RK2818
&rk2818_nand_device,
#endif
#ifdef CONFIG_DWC_OTG
&rk2818_device_dwc_otg,
#endif
#ifdef CONFIG_RK2818_HOST11
&rk2818_device_host11,
#endif
#ifdef CONFIG_USB_ANDROID
&android_usb_device,
&usb_mass_storage_device,
#endif
};
extern struct sys_timer rk2818_timer;
#define POWER_PIN RK2818_PIN_PB1
static void rk2818_power_on(void)
{
int ret;
ret = gpio_request(POWER_PIN, NULL);
if (ret) {
printk("failed to request power_off gpio\n");
goto err_free_gpio;
}
gpio_pull_updown(POWER_PIN, GPIOPullUp);
ret = gpio_direction_output(POWER_PIN, GPIO_HIGH);
if (ret) {
printk("failed to set power_off gpio output\n");
goto err_free_gpio;
}
gpio_set_value(POWER_PIN, 1);/*power on*/
err_free_gpio:
gpio_free(POWER_PIN);
}
static void rk2818_power_off(void)
{
printk("shut down system now ...\n");
gpio_set_value(POWER_PIN, 0);/*power down*/
}
static void __init machine_rk2818_init_irq(void)
{
rk2818_init_irq();
rk2818_gpio_init(rk2818_gpioBank, 8);
rk2818_gpio_irq_setup();
}
static void __init machine_rk2818_board_init(void)
{
rk2818_power_on();
pm_power_off = rk2818_power_off;
#ifdef CONFIG_I2C0_RK2818
i2c_register_board_info(default_i2c0_data.bus_num, board_i2c0_devices,
ARRAY_SIZE(board_i2c0_devices));
#endif
#ifdef CONFIG_I2C1_RK2818
i2c_register_board_info(default_i2c1_data.bus_num, board_i2c1_devices,
ARRAY_SIZE(board_i2c1_devices));
#endif
#ifdef CONFIG_SPI_I2C
i2c_register_board_info(default_i2c2_data.bus_num, board_i2c2_devices,
ARRAY_SIZE(board_i2c2_devices));
i2c_register_board_info(default_i2c3_data.bus_num, board_i2c3_devices,
ARRAY_SIZE(board_i2c3_devices));
#endif
platform_add_devices(devices, ARRAY_SIZE(devices));
spi_register_board_info(board_spi_devices, ARRAY_SIZE(board_spi_devices));
rk2818_mux_api_set(GPIOB4_SPI0CS0_MMC0D4_NAME,IOMUXA_GPIO0_B4); //IOMUXA_SPI0_CSN0);//use for gpio SPI CS0
rk2818_mux_api_set(GPIOB0_SPI0CSN1_MMC1PCA_NAME,IOMUXA_GPIO0_B0); //IOMUXA_SPI0_CSN1);//use for gpio SPI CS1
rk2818_mux_api_set(GPIOB_SPI0_MMC0_NAME,IOMUXA_SPI0);//use for SPI CLK SDI SDO
}
static void __init machine_rk2818_mapio(void)
{
iotable_init(rk2818_io_desc, ARRAY_SIZE(rk2818_io_desc));
rk2818_clock_init();
rk2818_iomux_init();
}
MACHINE_START(RK2818, "RK28board")
/* UART for LL DEBUG */
.phys_io = 0x18002000,
.io_pg_offst = ((0xFF100000) >> 18) & 0xfffc,
.boot_params = RK2818_SDRAM_PHYS + 0xf8000,
.map_io = machine_rk2818_mapio,
.init_irq = machine_rk2818_init_irq,
.init_machine = machine_rk2818_board_init,
.timer = &rk2818_timer,
MACHINE_END

2
arch/arm/mach-rk2818/ddr.c
View File

@@ -1749,7 +1749,7 @@ static int __init update_frq(void)
#endif
return 0;
}
core_initcall_sync(update_frq);
//core_initcall_sync(update_frq);
#endif //endi of #ifdef DRIVERS_SDRAM

279
sound/soc/codecs/wm8994.c
View File

@@ -39,7 +39,7 @@
#define DBG(x...) do { } while (0)
#endif
#define WM8994_TEST
//#define WM8994_TEST
struct i2c_client *wm8994_client;
int reg_send_data(struct i2c_client *client, unsigned short *reg, unsigned short *data, u32 scl_rate);
@@ -134,10 +134,11 @@ static int wm8994_read(unsigned short reg,unsigned short *value)
if (reg_recv_data(wm8994_client,&regs,&values,400000) >= 0)
{
*value=((values>>8)& 0x00FF)|((values<<8)&0xFF00);
DBG("Enter::%s----line->%d--reg=0x%x value=%x\n",__FUNCTION__,__LINE__,reg,*value);
return 0;
}
printk("%s---line->%d:Codec read error!\n",__FUNCTION__,__LINE__);
return -EIO;
}
@@ -146,12 +147,11 @@ static int wm8994_write(unsigned short reg,unsigned short value)
{
unsigned short regs=((reg>>8)&0x00FF)|((reg<<8)&0xFF00),values=((value>>8)&0x00FF)|((value<<8)&0xFF00);
DBG("Enter::%s----line->%d-- reg=%x--value=%x -- regs=%x--values=%x\n",__FUNCTION__,__LINE__,reg,value,regs,values);
if (reg_send_data(wm8994_client,&regs,&values,400000)>=0)
return 0;
printk("%s---line->%d:Codec write error!\n",__FUNCTION__,__LINE__);
return -EIO;
}
@@ -159,12 +159,13 @@ static int wm8994_write(unsigned short reg,unsigned short value)
void AP_to_Headset(void)
{
DBG("Enter::%s----line->%d-- AP_to_Headset\n",__FUNCTION__,__LINE__);
DBG("%s::%d\n",__FUNCTION__,__LINE__);
wm8994_mode=wm8994_AP_to_Headset;
wm8994_reset();
mdelay(50);
#if 1
wm8994_write(0x01, 0x0003);
mdelay(50);
wm8994_write(0x221, 0x0700);
@@ -200,44 +201,17 @@ void AP_to_Headset(void)
wm8994_write(0x23, 0x0100);
wm8994_write(0x36, 0x0003);
#endif
#if 0
wm8994_write(0x01, 0x0003);
mdelay(50);
wm8994_write(0x221, 0x0700);
wm8994_write(0x222, 0x3127);
wm8994_write(0x223, 0x0100);
wm8994_write(0x220, 0x0004);
mdelay(50);
wm8994_write(0x220, 0x0005);
wm8994_write(0x01, 0x0303); // sysclk = fll (bit4 =1) 0x0011
wm8994_write(0x05, 0x0303); // i2s 16 bits
wm8994_write(0x2D, 0x0100);
wm8994_write(0x2E, 0x0100);
wm8994_write(0x4C, 0x9F25);
wm8994_write(0x60, 0x00EE);
wm8994_write(0x200, 0x0011);
wm8994_write(0x208, 0x000A);
wm8994_write(0x601, 0x0001);
wm8994_write(0x602, 0x0001);
wm8994_write(0x610, 0x01C0);
wm8994_write(0x611, 0x01C0);
wm8994_write(0x420, 0x0000);
#endif
}
void AP_to_Speakers(void)
{
DBG("Enter::%s----line->%d-- AP_to_Speakers\n",__FUNCTION__,__LINE__);
DBG("%s::%d\n",__FUNCTION__,__LINE__);
wm8994_mode=wm8994_AP_to_Speakers;
wm8994_reset();
mdelay(50);
#if 1 // codec slave
wm8994_write(0x01, 0x0003);
mdelay(50);
wm8994_write(0x221, 0x0700);
@@ -274,42 +248,13 @@ void AP_to_Speakers(void)
wm8994_write(0x23, 0x0100);
wm8994_write(0x36, 0x0003);
mdelay(50);
#endif
#if 0
wm8994_write(0x01, 0x0003);
mdelay(50);
wm8994_write(0x221, 0x0700);
wm8994_write(0x222, 0x3127);
wm8994_write(0x223, 0x0100);
wm8994_write(0x220, 0x0004);
mdelay(50);
wm8994_write(0x220, 0x0005);
wm8994_write(0x01, 0x3003); // sysclk = fll (bit4 =1) 0x0011
wm8994_write(0x03, 0x0330);
wm8994_write(0x05, 0x0303); // i2s 16 bits
wm8994_write(0x22, 0x0000);
wm8994_write(0x23, 0x0100);
wm8994_write(0x2D, 0x0001);
wm8994_write(0x2E, 0x0001);
// wm8994_write(0x4C, 0x9F25);
// wm8994_write(0x60, 0x00EE);
wm8994_write(0x200, 0x0011);
wm8994_write(0x208, 0x000A);
wm8994_write(0x601, 0x0001);
wm8994_write(0x602, 0x0001);
wm8994_write(0x610, 0x01C0);
wm8994_write(0x611, 0x01C0);
wm8994_write(0x620, 0x0000);
wm8994_write(0x420, 0x0000);
#endif
}
void Recorder(void)
{
DBG("Enter::%s----line->%d-- Recorder\n",__FUNCTION__,__LINE__);
DBG("%s::%d\n",__FUNCTION__,__LINE__);
wm8994_mode=wm8994_Recorder;
wm8994_reset();
mdelay(50);
@@ -347,7 +292,9 @@ void Recorder(void)
void FM_to_Headset(void)
{
DBG("Enter::%s----line->%d-- FM_to_Headset\n",__FUNCTION__,__LINE__);
DBG("%s::%d\n",__FUNCTION__,__LINE__);
wm8994_mode=wm8994_FM_to_Headset;
wm8994_reset();
mdelay(50);
@@ -375,7 +322,9 @@ void FM_to_Headset(void)
void FM_to_Headset_and_Record(void)
{
DBG("Enter::%s----line->%d-- FM_to_Headset_and_Record\n",__FUNCTION__,__LINE__);
DBG("%s::%d\n",__FUNCTION__,__LINE__);
wm8994_mode=wm8994_FM_to_Headset_and_Record;
wm8994_reset();
mdelay(50);
@@ -419,7 +368,9 @@ void FM_to_Headset_and_Record(void)
void FM_to_Speakers(void)
{
DBG("Enter::%s----line->%d-- FM_to_Speakers\n",__FUNCTION__,__LINE__);
DBG("%s::%d\n",__FUNCTION__,__LINE__);
wm8994_mode=wm8994_FM_to_Speakers;
wm8994_reset();
mdelay(50);
@@ -439,8 +390,6 @@ void FM_to_Speakers(void)
wm8994_write(0x2A, 0x0100);
wm8994_write(0x2D, 0x0040);
wm8994_write(0x2E, 0x0040);
// wm8994_write(0x4C, 0x9F25);
// wm8994_write(0x60, 0x00EE);
wm8994_write(0x220, 0x0003);
wm8994_write(0x221, 0x0700);
@@ -453,7 +402,9 @@ void FM_to_Speakers(void)
void FM_to_Speakers_and_Record(void)
{
DBG("Enter::%s----line->%d-- FM_to_Speakers_and_Record\n",__FUNCTION__,__LINE__);
DBG("%s::%d\n",__FUNCTION__,__LINE__);
wm8994_mode=wm8994_FM_to_Speakers_and_Record;
wm8994_reset();
mdelay(50);
@@ -484,8 +435,6 @@ void FM_to_Speakers_and_Record(void)
wm8994_write(0x2A, 0x0100);
wm8994_write(0x2D, 0x0040);
wm8994_write(0x2E, 0x0040);
// wm8994_write(0x4C, 0x9F25);
// wm8994_write(0x60, 0x00EE);
wm8994_write(0x220, 0x0003);
wm8994_write(0x221, 0x0700);
@@ -504,7 +453,9 @@ void FM_to_Speakers_and_Record(void)
void HandsetMIC_to_Baseband_to_Headset(void)
{
DBG("Enter::%s----line->%d-- HandsetMIC_to_Baseband_to_Headset\n",__FUNCTION__,__LINE__);
DBG("%s::%d\n",__FUNCTION__,__LINE__);
wm8994_mode=wm8994_HandsetMIC_to_Baseband_to_Headset;
wm8994_reset();
mdelay(50);
@@ -533,7 +484,9 @@ void HandsetMIC_to_Baseband_to_Headset(void)
void HandsetMIC_to_Baseband_to_Headset_and_Record(void)
{
DBG("Enter::%s----line->%d-- HandsetMIC_to_Baseband_to_Headset_and_Record\n",__FUNCTION__,__LINE__);
DBG("%s::%d\n",__FUNCTION__,__LINE__);
wm8994_mode=wm8994_HandsetMIC_to_Baseband_to_Headset_and_Record;
wm8994_reset();
mdelay(50);
@@ -573,7 +526,9 @@ void HandsetMIC_to_Baseband_to_Headset_and_Record(void)
void MainMIC_to_Baseband_to_Earpiece(void)
{
DBG("Enter::%s----line->%d-- MainMIC_to_Baseband_to_Earpiece\n",__FUNCTION__,__LINE__);
DBG("%s::%d\n",__FUNCTION__,__LINE__);
wm8994_mode=wm8994_MainMIC_to_Baseband_to_Earpiece;
wm8994_reset();
mdelay(50);
@@ -593,7 +548,9 @@ void MainMIC_to_Baseband_to_Earpiece(void)
void MainMIC_to_Baseband_to_Earpiece_and_Record(void)
{
DBG("Enter::%s----line->%d-- MainMIC_to_Baseband_to_Earpiece_and_Record\n",__FUNCTION__,__LINE__);
DBG("%s::%d\n",__FUNCTION__,__LINE__);
wm8994_mode=wm8994_MainMIC_to_Baseband_to_Earpiece_and_Record;
wm8994_reset();
mdelay(50);
@@ -628,7 +585,9 @@ void MainMIC_to_Baseband_to_Earpiece_and_Record(void)
void MainMIC_to_Baseband_to_Speakers(void)
{
DBG("Enter::%s----line->%d-- MainMIC_to_Baseband_to_Speakers\n",__FUNCTION__,__LINE__);
DBG("%s::%d\n",__FUNCTION__,__LINE__);
wm8994_mode=wm8994_MainMIC_to_Baseband_to_Speakers;
wm8994_reset();
mdelay(50);
@@ -653,7 +612,9 @@ void MainMIC_to_Baseband_to_Speakers(void)
void MainMIC_to_Baseband_to_Speakers_and_Record(void)
{
DBG("Enter::%s----line->%d-- MainMIC_to_Baseband_to_Speakers_and_Record\n",__FUNCTION__,__LINE__);
DBG("%s::%d\n",__FUNCTION__,__LINE__);
wm8994_mode=wm8994_MainMIC_to_Baseband_to_Speakers_and_Record;
wm8994_reset();
mdelay(50);
@@ -690,11 +651,13 @@ void MainMIC_to_Baseband_to_Speakers_and_Record(void)
void BT_Baseband(void)
{
DBG("Enter::%s----line->%d-- BT_Baseband\n",__FUNCTION__,__LINE__);
DBG("%s::%d\n",__FUNCTION__,__LINE__);
wm8994_mode=wm8994_BT_Baseband;
wm8994_reset();
mdelay(50);
#if 1
wm8994_write(0x01, 0x0003);
mdelay(50);
wm8994_write(0x221, 0x0700);
@@ -751,49 +714,13 @@ void BT_Baseband(void)
wm8994_write(0x313, 0x0090); //master 0x0090 lrck2 8kHz bclk2 1MH
wm8994_write(0x315, 0x007D); //master 0x007D lrck2 8kHz bclk2 1MH
#endif
#endif
#if 0
wm8994_write(0x01 ,0x0003);
wm8994_write(0x02 ,0x63A0);
wm8994_write(0x03 ,0x30A0);
wm8994_write(0x04 ,0x0303);
wm8994_write(0x05 ,0x0202);
wm8994_write(0x06 ,0x0001);
wm8994_write(0x19 ,0x014B);
wm8994_write(0x1B ,0x014B);
wm8994_write(0x1E ,0x0006);
wm8994_write(0x28 ,0x00CC);
wm8994_write(0x29 ,0x0100);
wm8994_write(0x2A ,0x0100);
wm8994_write(0x2D ,0x0001);
wm8994_write(0x34 ,0x0001);
wm8994_write(0x200 ,0x0001);
wm8994_write(0x208 ,0x000A);
#ifdef CONFIG_SND_CODEC_SOC_MASTER
wm8994_write(0x302 ,0x7000);
#endif
wm8994_write(0x303, 0x0090); //master 0x0090 lrck1 8kHz bclk1 1MH
wm8994_write(0x305, 0x007D); //master 0x007D lrck1 8kHz bclk1 1MH
wm8994_write(0x420 ,0x0000);
wm8994_write(0x601 ,0x0001);
wm8994_write(0x602 ,0x0001);
wm8994_write(0x606 ,0x0002);
wm8994_write(0x607 ,0x0002);
wm8994_write(0x610 ,0x01C0);
wm8994_write(0x611 ,0x01C0);
wm8994_write(0x620 ,0x0000);
wm8994_write(0x707 ,0xA100);
wm8994_write(0x708 ,0x2100);
wm8994_write(0x709 ,0x2100);
wm8994_write(0x70A ,0x2100);
#endif
}
void BT_Baseband_and_record(void)
{
DBG("Enter::%s----line->%d-- BT_Baseband_and_record\n",__FUNCTION__,__LINE__);
DBG("%s::%d\n",__FUNCTION__,__LINE__);
wm8994_mode=wm8994_BT_Baseband_and_record;
wm8994_reset();
mdelay(50);
@@ -853,11 +780,13 @@ void BT_Baseband_and_record(void)
}
///PCM BB BEGIN////////////////////////////////////
///PCM BB BEGIN//
void HandsetMIC_to_PCMBaseband_to_Headset(void)
{
DBG("Enter::%s----line->%d-- HandsetMIC_to_PCMBaseband_to_Headset\n",__FUNCTION__,__LINE__);
DBG("%s::%d\n",__FUNCTION__,__LINE__);
wm8994_mode=wm8994_HandsetMIC_to_PCMBaseband_to_Headset;
wm8994_reset();
mdelay(50);
@@ -910,7 +839,6 @@ void HandsetMIC_to_PCMBaseband_to_Headset(void)
wm8994_write(0x604, 0x0010);
wm8994_write(0x605, 0x0010);
wm8994_write(0x621, 0x0001);
// wm8994_write(0x317, 0x0003);
#ifdef CONFIG_SND_CODEC_SOC_MASTER
wm8994_write(0x312, 0x4000); //AIF2 SET AS MASTER
#endif
@@ -918,7 +846,9 @@ void HandsetMIC_to_PCMBaseband_to_Headset(void)
void HandsetMIC_to_PCMBaseband_to_Headset_and_Record(void)
{
DBG("Enter::%s----line->%d-- HandsetMIC_to_PCMBaseband_to_Headset_and_Record\n",__FUNCTION__,__LINE__);
DBG("%s::%d\n",__FUNCTION__,__LINE__);
wm8994_mode=wm8994_HandsetMIC_to_PCMBaseband_to_Headset_and_Record;
wm8994_reset();
mdelay(50);
@@ -972,7 +902,6 @@ void HandsetMIC_to_PCMBaseband_to_Headset_and_Record(void)
wm8994_write(0x604, 0x0010);
wm8994_write(0x605, 0x0010);
wm8994_write(0x621, 0x0000);
// wm8994_write(0x317, 0x0003);
#ifdef CONFIG_SND_CODEC_SOC_MASTER
wm8994_write(0x312, 0x4000); //AIF2 SET AS MASTER
#endif
@@ -1004,7 +933,9 @@ void HandsetMIC_to_PCMBaseband_to_Headset_and_Record(void)
void MainMIC_to_PCMBaseband_to_Earpiece(void)
{
DBG("Enter::%s----line->%d-- MainMIC_to_PCMBaseband_to_Earpiece\n",__FUNCTION__,__LINE__);
DBG("%s::%d\n",__FUNCTION__,__LINE__);
wm8994_mode=wm8994_MainMIC_to_PCMBaseband_to_Earpiece;
wm8994_reset();
mdelay(50);
@@ -1030,8 +961,6 @@ void MainMIC_to_PCMBaseband_to_Earpiece(void)
wm8994_write(0x2D, 0x0001);
wm8994_write(0x2E, 0x0001);
wm8994_write(0x33, 0x0018);
// wm8994_write(0x4C, 0x9F25);
// wm8994_write(0x60, 0x00EE);
wm8994_write(0x200, 0x0001);
wm8994_write(0x204, 0x0001);
wm8994_write(0x208, 0x0007);
@@ -1060,7 +989,7 @@ void MainMIC_to_PCMBaseband_to_Earpiece(void)
wm8994_write(0x604, 0x0010);
wm8994_write(0x605, 0x0010);
wm8994_write(0x621, 0x0001);
// wm8994_write(0x317, 0x0003);
#ifdef CONFIG_SND_CODEC_SOC_MASTER
wm8994_write(0x312, 0x4000); //AIF2 SET AS MASTER
#endif
@@ -1068,7 +997,9 @@ void MainMIC_to_PCMBaseband_to_Earpiece(void)
void MainMIC_to_PCMBaseband_to_Earpiece_and_Record(void)
{
DBG("Enter::%s----line->%d-- MainMIC_to_PCMBaseband_to_Earpiece_and_Record\n",__FUNCTION__,__LINE__);
DBG("%s::%d\n",__FUNCTION__,__LINE__);
wm8994_mode=wm8994_MainMIC_to_PCMBaseband_to_Earpiece_and_Record;
wm8994_reset();
mdelay(50);
@@ -1094,8 +1025,6 @@ void MainMIC_to_PCMBaseband_to_Earpiece_and_Record(void)
wm8994_write(0x2D, 0x0001);
wm8994_write(0x2E, 0x0001);
wm8994_write(0x33, 0x0018);
// wm8994_write(0x4C, 0x9F25);
// wm8994_write(0x60, 0x00EE);
wm8994_write(0x200, 0x0001);
wm8994_write(0x204, 0x0001);
wm8994_write(0x208, 0x0007);
@@ -1123,7 +1052,7 @@ void MainMIC_to_PCMBaseband_to_Earpiece_and_Record(void)
wm8994_write(0x604, 0x0010);
wm8994_write(0x605, 0x0010);
wm8994_write(0x621, 0x0001);
// wm8994_write(0x317, 0x0003);
#ifdef CONFIG_SND_CODEC_SOC_MASTER
wm8994_write(0x312, 0x4000); //AIF2 SET AS MASTER
#endif
@@ -1156,11 +1085,13 @@ void MainMIC_to_PCMBaseband_to_Earpiece_and_Record(void)
void MainMIC_to_PCMBaseband_to_Speakers(void)
{
DBG("Enter::%s----line->%d-- MainMIC_to_PCMBaseband_to_Speakers\n",__FUNCTION__,__LINE__);
DBG("%s::%d\n",__FUNCTION__,__LINE__);
wm8994_mode=wm8994_MainMIC_to_PCMBaseband_to_Speakers;
wm8994_reset();
mdelay(50);
#if 1
wm8994_write(0x01, 0x0013);
mdelay(50);
wm8994_write(0x221, 0x0700); //MCLK=12MHz //FLL1 CONTRLO(2)
@@ -1183,8 +1114,6 @@ void MainMIC_to_PCMBaseband_to_Speakers(void)
wm8994_write(0x2D, 0x0001);
wm8994_write(0x2E, 0x0001);
wm8994_write(0x36, 0x000C); //MIXOUTL_TO_SPKMIXL MIXOUTR_TO_SPKMIXR
// wm8994_write(0x4C, 0x9F25);
// wm8994_write(0x60, 0x00EE);
wm8994_write(0x200, 0x0001); //AIF1 CLOCKING(1)
wm8994_write(0x204, 0x0001); //AIF2 CLOCKING(1)
wm8994_write(0x208, 0x0007); //CLOCKING(1)
@@ -1212,16 +1141,17 @@ void MainMIC_to_PCMBaseband_to_Speakers(void)
wm8994_write(0x604, 0x0010); //ADC2_TO_DAC2L
wm8994_write(0x605, 0x0010); //ADC2_TO_DAC2R
wm8994_write(0x621, 0x0001);
// wm8994_write(0x317, 0x0003);
#ifdef CONFIG_SND_CODEC_SOC_MASTER
wm8994_write(0x312, 0x4000); //AIF2 SET AS MASTER
#endif
#endif
}
void MainMIC_to_PCMBaseband_to_Speakers_and_Record(void)
{
DBG("Enter::%s----line->%d-- MainMIC_to_PCMBaseband_to_Speakers_and_Record\n",__FUNCTION__,__LINE__);
DBG("%s::%d\n",__FUNCTION__,__LINE__);
wm8994_mode=wm8994_MainMIC_to_PCMBaseband_to_Speakers_and_Record;
wm8994_reset();
mdelay(50);
@@ -1248,8 +1178,6 @@ void MainMIC_to_PCMBaseband_to_Speakers_and_Record(void)
wm8994_write(0x2D, 0x0001);
wm8994_write(0x2E, 0x0001);
wm8994_write(0x36, 0x000C);
// wm8994_write(0x4C, 0x9F25);
// wm8994_write(0x60, 0x00EE);
wm8994_write(0x200, 0x0001);
wm8994_write(0x204, 0x0001);
wm8994_write(0x208, 0x0007);
@@ -1278,7 +1206,6 @@ void MainMIC_to_PCMBaseband_to_Speakers_and_Record(void)
wm8994_write(0x604, 0x0010);
wm8994_write(0x605, 0x0010);
wm8994_write(0x621, 0x0001);
// wm8994_write(0x317, 0x0003);
#ifdef CONFIG_SND_CODEC_SOC_MASTER
wm8994_write(0x312, 0x4000); //AIF2 SET AS MASTER
#endif
@@ -1311,7 +1238,9 @@ void MainMIC_to_PCMBaseband_to_Speakers_and_Record(void)
void BT_PCMBaseband(void)
{
DBG("Enter::%s----line->%d-- BT_PCMBaseband\n",__FUNCTION__,__LINE__);
DBG("%s::%d\n",__FUNCTION__,__LINE__);
wm8994_mode=wm8994_BT_PCMBaseband;
wm8994_reset();
mdelay(50);
@@ -1357,24 +1286,19 @@ void BT_PCMBaseband(void)
wm8994_write(0x04 ,0x3301); //ADCL off
wm8994_write(0x05 ,0x3301); //DACL off
// wm8994_write(0x29 ,0x0005);
wm8994_write(0x2A ,0x0005);
wm8994_write(0x313 ,0x00F0);
wm8994_write(0x314 ,0x0020);
wm8994_write(0x315 ,0x0020);
// wm8994_write(0x2D ,0x0001);
wm8994_write(0x2E ,0x0001);
wm8994_write(0x420 ,0x0000);
wm8994_write(0x520 ,0x0000);
// wm8994_write(0x601 ,0x0001);
wm8994_write(0x602 ,0x0001);
wm8994_write(0x604 ,0x0001);
wm8994_write(0x605 ,0x0001);
// wm8994_write(0x606 ,0x0002);
wm8994_write(0x607 ,0x0002);
// wm8994_write(0x610 ,0x01C0);
wm8994_write(0x611 ,0x01C0);
wm8994_write(0x612 ,0x01C0);
wm8994_write(0x613 ,0x01C0);
@@ -1395,7 +1319,9 @@ void BT_PCMBaseband(void)
void BT_PCMBaseband_and_record(void)
{
DBG("Enter::%s----line->%d-- BT_PCMBaseband_and_record\n",__FUNCTION__,__LINE__);
DBG("%s::%d\n",__FUNCTION__,__LINE__);
wm8994_mode=wm8994_BT_PCMBaseband_and_record;
wm8994_reset();
mdelay(50);
@@ -1440,25 +1366,20 @@ void BT_PCMBaseband_and_record(void)
wm8994_write(0x03 ,0x0030);
wm8994_write(0x04 ,0x3301); //ADCL off
wm8994_write(0x05 ,0x3301); //DACL off
// wm8994_write(0x29 ,0x0005);
wm8994_write(0x2A ,0x0005);
wm8994_write(0x313 ,0x00F0);
wm8994_write(0x314 ,0x0020);
wm8994_write(0x315 ,0x0020);
// wm8994_write(0x2D ,0x0001);
wm8994_write(0x2E ,0x0001);
wm8994_write(0x420 ,0x0000);
wm8994_write(0x520 ,0x0000);
// wm8994_write(0x601 ,0x0001);
wm8994_write(0x602 ,0x0001);
wm8994_write(0x604 ,0x0001);
wm8994_write(0x605 ,0x0001);
// wm8994_write(0x606 ,0x0002);
wm8994_write(0x607 ,0x0002);
// wm8994_write(0x610 ,0x01C0);
wm8994_write(0x611 ,0x01C0);
wm8994_write(0x612 ,0x01C0);
wm8994_write(0x613 ,0x01C0);
@@ -1508,7 +1429,7 @@ wm8994_codec_fnc_t *wm8994_codec_sequence[] = {
///PCM BB END
};
/********************set wm8994 volume*****volume=0\1\2\3\4\5\6\7*******************/
/*************set wm8994 volume****************/
unsigned char Handset_maxvol=0x3f,VRX_maxvol=0x07,Speaker_maxvol=0x3f,AP_maxvol=0xff,Recorder_maxvol=0x1f,FM_maxvol=0x1f;
@@ -1569,8 +1490,6 @@ void wm8994_codec_set_volume(unsigned char mode,unsigned char volume)
int snd_soc_info_route(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
{
//uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
uinfo->count = 1;
@@ -1582,15 +1501,14 @@ int snd_soc_info_route(struct snd_kcontrol *kcontrol,
int snd_soc_get_route(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
DBG("@@@Enter::%s----line->%d\n",__FUNCTION__,__LINE__);
return 0;
}
int snd_soc_put_route(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
{
{
DBG("@@@Enter::%s----line->%d\n",__FUNCTION__,__LINE__);
DBG("%s::%d\n",__FUNCTION__,__LINE__);
int route = kcontrol->private_value & 0xff;
switch(route)
@@ -1726,8 +1644,6 @@ static int wm8994_lrc_control(struct snd_soc_dapm_widget *w,
adctl2 &= ~0x4;
else
adctl2 |= 0x4;
DBG("Enter::%s----line->%d, adctl2 = %x\n",__FUNCTION__,__LINE__,adctl2);
return snd_soc_write(codec, WM8994_ADCTL2, adctl2);
}
@@ -2035,7 +1951,7 @@ static int wm8994_set_dai_sysclk(struct snd_soc_dai *codec_dai,
struct snd_soc_codec *codec = codec_dai->codec;
struct wm8994_priv *wm8994 = codec->private_data;
DBG("Enter::%s----line->%d\n",__FUNCTION__,__LINE__);
DBG("%s----%d\n",__FUNCTION__,__LINE__);
switch (freq) {
case 11289600:
@@ -2117,7 +2033,6 @@ static int wm8994_set_dai_fmt(struct snd_soc_dai *codec_dai,
return -EINVAL;
}
DBG("Enter::%s----line->%d iface=%x\n",__FUNCTION__,__LINE__,iface);
snd_soc_write(codec, WM8994_IFACE, iface);
return 0;
}
@@ -2131,7 +2046,7 @@ static int wm8994_pcm_startup(struct snd_pcm_substream *substream,
/* The set of sample rates that can be supported depends on the
* MCLK supplied to the CODEC - enforce this.
*/
DBG("Enter::%s----line->%d wm8994->sysclk=%d\n",__FUNCTION__,__LINE__,wm8994->sysclk);
if (!wm8994->sysclk) {
dev_err(codec->dev,
"No MCLK configured, call set_sysclk() on init\n");
@@ -2183,7 +2098,7 @@ static int wm8994_pcm_hw_params(struct snd_pcm_substream *substream,
iface |= 0x000c;
break;
}
DBG("Enter::%s----line->%d iface=%x srate =%x rate=%d\n",__FUNCTION__,__LINE__,iface,srate,params_rate(params));
DBG("%s::%d-- iface=%x srate =%x rate=%d\n",__FUNCTION__,__LINE__,iface,srate,params_rate(params));
/* set iface & srate */
snd_soc_write(codec, WM8994_IFACE, iface);
@@ -2203,7 +2118,7 @@ static int wm8994_set_bias_level(struct snd_soc_codec *codec,
enum snd_soc_bias_level level)
{
u16 pwr_reg = snd_soc_read(codec, WM8994_PWR1) & ~0x1c1;
DBG("Enter::%s----line->%d level =%d\n",__FUNCTION__,__LINE__,level);
switch (level) {
case SND_SOC_BIAS_ON:
break;
@@ -2234,9 +2149,7 @@ static int wm8994_set_bias_level(struct snd_soc_codec *codec,
return 0;
}
//#define WM8994_RATES SNDRV_PCM_RATE_8000_96000//cjq
#define WM8994_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
#define WM8994_RATES SNDRV_PCM_RATE_48000
#define WM8994_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
SNDRV_PCM_FMTBIT_S24_LE)
@@ -2274,7 +2187,7 @@ static int wm8994_suspend(struct platform_device *pdev, pm_message_t state)
{
struct snd_soc_device *socdev = platform_get_drvdata(pdev);
struct snd_soc_codec *codec = socdev->card->codec;
DBG("Enter::%s----line->%d\n",__FUNCTION__,__LINE__);
wm8994_set_bias_level(codec, SND_SOC_BIAS_OFF);
wm8994_reset();
mdelay(50);
@@ -2289,7 +2202,7 @@ static int wm8994_resume(struct platform_device *pdev)
u8 data[2];
u16 *cache = codec->reg_cache;
wm8994_codec_fnc_t **wm8994_fnc_ptr=wm8994_codec_sequence;
DBG("Enter::%s----line->%d\n",__FUNCTION__,__LINE__);
/* Sync reg_cache with the hardware */
for (i = 0; i < WM8994_NUM_REG; i++) {
if (i == WM8994_RESET)
@@ -2309,7 +2222,7 @@ static int wm8994_resume(struct platform_device *pdev)
{
wm8994_fnc_ptr+=wm8994_mode;
(*wm8994_fnc_ptr)() ;
printk("%s----line->%d--: Wm8994 resume with error mode\n",__FUNCTION__,__LINE__);
printk("%s--%d--: Wm8994 resume with error mode\n",__FUNCTION__,__LINE__);
}
return 0;
@@ -2385,11 +2298,17 @@ static int wm8994_register(struct wm8994_priv *wm8994,
int ret;
u16 reg;
#ifdef WM8994_TEST
/*************text----------cjq**************/
DBG("\n\n\nEnter::%s----line->%d-- WM8994 test begin\n",__FUNCTION__,__LINE__);
DBG("%s::%d-- WM8994 test begin\n",__FUNCTION__,__LINE__);
AP_to_Headset();
//HandsetMIC_to_Baseband_to_Headset();
DBG("Enter::%s----line->%d-- WM8994 test end\n\n\n\n",__FUNCTION__,__LINE__);
DBG("%s::%d-- WM8994 test end",__FUNCTION__,__LINE__);
#endif
if (wm8994_codec) {
dev_err(codec->dev, "Another WM8994 is registered\n");

9
sound/soc/rk2818/rk2818_i2s.c
View File

@@ -342,14 +342,7 @@ int rockchip_i2s_resume(struct snd_soc_dai *cpu_dai)
#define rockchip_i2s_resume NULL
#endif
/*#define ROCKCHIP_I2S_RATES \
(SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_16000 | \
SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)*///cjq
#define ROCKCHIP_I2S_RATES \
(SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
#define ROCKCHIP_I2S_RATES SNDRV_PCM_RATE_48000
static struct snd_soc_dai_ops rockchip_i2s_dai_ops = {
.trigger = rockchip_i2s_trigger,

8
sound/soc/rk2818/rk2818_wm8994.c
View File

@@ -51,22 +51,22 @@ static int rk2818_hw_params(struct snd_pcm_substream *substream,
else
{
/* set codec DAI configuration */
#if defined (CONFIG_SND_ROCKCHIP_SOC_MASTER)
#if defined (CONFIG_SND_CODEC_SOC_SLAVE)
ret = codec_dai->ops->set_fmt(codec_dai, SND_SOC_DAIFMT_I2S |
SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS);
#endif
#if defined (CONFIG_SND_ROCKCHIP_SOC_SLAVE)
#if defined (CONFIG_SND_CODEC_SOC_MASTER)
ret = codec_dai->ops->set_fmt(codec_dai, SND_SOC_DAIFMT_I2S |
SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBM_CFM );
#endif
if (ret < 0)
return ret;
/* set cpu DAI configuration */
#if defined (CONFIG_SND_ROCKCHIP_SOC_MASTER)
#if defined (CONFIG_SND_CODEC_SOC_SLAVE)
ret = cpu_dai->ops->set_fmt(cpu_dai, SND_SOC_DAIFMT_I2S |
SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBM_CFM);
#endif
#if defined (CONFIG_SND_ROCKCHIP_SOC_SLAVE)
#if defined (CONFIG_SND_CODEC_SOC_MASTER)
ret = cpu_dai->ops->set_fmt(cpu_dai, SND_SOC_DAIFMT_I2S |
SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS);
#endif