From c64efffd36b1454d93ad3b1334db87af55a7e5a5 Mon Sep 17 00:00:00 2001 From: Elaine Zhang Date: Thu, 20 May 2021 09:36:03 +0800 Subject: [PATCH] FROMLIST: clk: rockchip: fix rk3568 cpll clk gate bits The cpll clk gate bits had an ordering issue. This led to the loss of the boot sdmmc controller when the gmac was shut down with: `ip link set eth0 down` as the cpll_100m was shut off instead of the cpll_62p5. cpll_62p5, cpll_50m, cpll_25m were all off by one with cpll_100m misplaced. Fixes: e9ac850b8828 ("clk: rockchip: add clock controller for rk3568") Signed-off-by: Peter Geis Link: https://patchwork.kernel.org/project/linux-clk/patch/20210519174149.3691335-1-pgwipeout@gmail.com/ Signed-off-by: Elaine Zhang Change-Id: I012bdbdc44c4e8de1b42a00c2a9bffb7bd66faef --- drivers/clk/rockchip/clk-rk3568.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/clk/rockchip/clk-rk3568.c b/drivers/clk/rockchip/clk-rk3568.c index 89d02c56e602..798433b6bc1a 100644 --- a/drivers/clk/rockchip/clk-rk3568.c +++ b/drivers/clk/rockchip/clk-rk3568.c @@ -474,17 +474,17 @@ static struct rockchip_clk_branch rk3568_clk_branches[] __initdata = { COMPOSITE_NOMUX(CPLL_125M, "cpll_125m", "cpll", CLK_IGNORE_UNUSED, RK3568_CLKSEL_CON(80), 0, 5, DFLAGS, RK3568_CLKGATE_CON(35), 10, GFLAGS), - COMPOSITE_NOMUX(CPLL_62P5M, "cpll_62p5", "cpll", CLK_IGNORE_UNUSED, - RK3568_CLKSEL_CON(80), 8, 5, DFLAGS, - RK3568_CLKGATE_CON(35), 11, GFLAGS), - COMPOSITE_NOMUX(CPLL_50M, "cpll_50m", "cpll", CLK_IGNORE_UNUSED, - RK3568_CLKSEL_CON(81), 0, 5, DFLAGS, - RK3568_CLKGATE_CON(35), 12, GFLAGS), - COMPOSITE_NOMUX(CPLL_25M, "cpll_25m", "cpll", CLK_IGNORE_UNUSED, - RK3568_CLKSEL_CON(81), 8, 6, DFLAGS, - RK3568_CLKGATE_CON(35), 13, GFLAGS), COMPOSITE_NOMUX(CPLL_100M, "cpll_100m", "cpll", CLK_IGNORE_UNUSED, RK3568_CLKSEL_CON(82), 0, 5, DFLAGS, + RK3568_CLKGATE_CON(35), 11, GFLAGS), + COMPOSITE_NOMUX(CPLL_62P5M, "cpll_62p5", "cpll", CLK_IGNORE_UNUSED, + RK3568_CLKSEL_CON(80), 8, 5, DFLAGS, + RK3568_CLKGATE_CON(35), 12, GFLAGS), + COMPOSITE_NOMUX(CPLL_50M, "cpll_50m", "cpll", CLK_IGNORE_UNUSED, + RK3568_CLKSEL_CON(81), 0, 5, DFLAGS, + RK3568_CLKGATE_CON(35), 13, GFLAGS), + COMPOSITE_NOMUX(CPLL_25M, "cpll_25m", "cpll", CLK_IGNORE_UNUSED, + RK3568_CLKSEL_CON(81), 8, 6, DFLAGS, RK3568_CLKGATE_CON(35), 14, GFLAGS), COMPOSITE_NOMUX(0, "clk_osc0_div_750k", "xin24m", CLK_IGNORE_UNUSED, RK3568_CLKSEL_CON(82), 8, 6, DFLAGS,