From c6be2b1160570d14ee83928cfda14e48f098948e Mon Sep 17 00:00:00 2001
From: zhangqing <zhangqing@rock-chips.com>
Date: Thu, 24 Dec 2020 09:06:16 +0800
Subject: [PATCH] arm64: dts: rockchip: rk3568: modify gpu clk

GPU clk using SCMI,replace <&cru CLK_GPU> with <&scmi_clk 1>

Signed-off-by: zhangqing <zhangqing@rock-chips.com>
Change-Id: I12d263b29caa8dd5b635a5d6bbf86677ed12414d
---
 arch/arm64/boot/dts/rockchip/rk3568.dtsi | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
index b23781914eb3..1654e87d9653 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
@@ -942,8 +942,8 @@
 		upthreshold = <40>;
 		downdifferential = <10>;
 
-		clocks = <&cru CLK_GPU>;
-		clock-names = "clk_mali";
+		clocks = <&scmi_clk 1>, <&cru CLK_GPU>;
+		clock-names = "clk_mali", "clk_gpu";
 		power-domains = <&power RK3568_PD_GPU>;
 		#cooling-cells = <2>;
 		operating-points-v2 = <&gpu_opp_table>;
@@ -975,11 +975,15 @@
 		};
 		opp-600000000 {
 			opp-hz = /bits/ 64 <600000000>;
+			opp-microvolt = <825000>;
+		};
+		opp-700000000 {
+			opp-hz = /bits/ 64 <700000000>;
 			opp-microvolt = <900000>;
 		};
 		opp-800000000 {
 			opp-hz = /bits/ 64 <800000000>;
-			opp-microvolt = <1075000>;
+			opp-microvolt = <1000000>;
 		};
 	};