From c7377b7be5e4454418b2390147e49fe16513c3dc Mon Sep 17 00:00:00 2001 From: Ding Wei Date: Thu, 26 Mar 2020 17:38:56 +0800 Subject: [PATCH] video: rockchip: mpp: reset osd plt clock config before setting register rkvenc: osd plt clock should reset, othterwise, osd setting will not work Change-Id: I47752b735b6f63303e9b12f4616510f2701970bd Signed-off-by: Ding Wei --- drivers/video/rockchip/mpp/mpp_rkvenc.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/video/rockchip/mpp/mpp_rkvenc.c b/drivers/video/rockchip/mpp/mpp_rkvenc.c index 0cbdcd623656..28514742cd93 100644 --- a/drivers/video/rockchip/mpp/mpp_rkvenc.c +++ b/drivers/video/rockchip/mpp/mpp_rkvenc.c @@ -384,6 +384,12 @@ static int rkvenc_run(struct mpp_dev *mpp, struct mpp_request *req; u32 reg_en = task->hw_info->reg_en; + /* + * Tips: ensure osd plt clock is 0 before setting register, + * otherwise, osd setting will not work + */ + mpp_write_relaxed(mpp, RKVENC_OSD_CFG_BASE, 0); + wmb(); for (i = 0; i < task->w_req_cnt; i++) { int s, e;