From c771f313d23ada1fd2f287b18c541f0930528ee9 Mon Sep 17 00:00:00 2001 From: Wyon Bi Date: Tue, 13 Aug 2019 15:27:52 +0800 Subject: [PATCH] arm64: dts: rockchip: Change rk618 clkin rate to 11.2896MHz Change-Id: I5d4b00855d29bc4f2ccf6754eb191e70f1632f51 Signed-off-by: Wyon Bi --- .../boot/dts/rockchip/px30-ad-r35-mb-rk618-dual-lvds.dts | 2 +- .../boot/dts/rockchip/px30-ad-r35-mb-rk618-hdmi-lvds.dts | 2 +- arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-hdmi.dts | 2 +- arch/arm64/boot/dts/rockchip/px30-evb-ext-rk618.dtsi | 2 +- .../boot/dts/rockchip/rk3326-w7-icn6211-rk618-hdmi-rgb.dts | 4 ++-- arch/arm64/boot/dts/rockchip/rk3326-w7-icn6211-rk618-hdmi.dts | 4 ++-- arch/arm64/boot/dts/rockchip/rk3368-sziauto-rk618.dts | 2 +- 7 files changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-dual-lvds.dts b/arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-dual-lvds.dts index 13123b53ab4e..b278f8746aec 100644 --- a/arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-dual-lvds.dts +++ b/arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-dual-lvds.dts @@ -69,7 +69,7 @@ clocks = <&cru SCLK_I2S1_OUT>; clock-names = "clkin"; assigned-clocks = <&cru SCLK_I2S1_OUT>; - assigned-clock-rates = <12000000>; + assigned-clock-rates = <11289600>; reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>; status = "okay"; diff --git a/arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-hdmi-lvds.dts b/arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-hdmi-lvds.dts index 4bc82c0fdf40..1d3f5923a196 100644 --- a/arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-hdmi-lvds.dts +++ b/arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-hdmi-lvds.dts @@ -70,7 +70,7 @@ clocks = <&cru SCLK_I2S1_OUT>; clock-names = "clkin"; assigned-clocks = <&cru SCLK_I2S1_OUT>; - assigned-clock-rates = <12000000>; + assigned-clock-rates = <11289600>; reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>; status = "okay"; diff --git a/arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-hdmi.dts b/arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-hdmi.dts index 5820490008ec..0ea056682e57 100644 --- a/arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-hdmi.dts +++ b/arch/arm64/boot/dts/rockchip/px30-ad-r35-mb-rk618-hdmi.dts @@ -22,7 +22,7 @@ clocks = <&cru SCLK_I2S1_OUT>; clock-names = "clkin"; assigned-clocks = <&cru SCLK_I2S1_OUT>; - assigned-clock-rates = <12000000>; + assigned-clock-rates = <11289600>; reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>; status = "okay"; diff --git a/arch/arm64/boot/dts/rockchip/px30-evb-ext-rk618.dtsi b/arch/arm64/boot/dts/rockchip/px30-evb-ext-rk618.dtsi index 67155b6c6a23..a82e90c1fe79 100644 --- a/arch/arm64/boot/dts/rockchip/px30-evb-ext-rk618.dtsi +++ b/arch/arm64/boot/dts/rockchip/px30-evb-ext-rk618.dtsi @@ -31,7 +31,7 @@ clocks = <&cru SCLK_I2S1_OUT>; clock-names = "clkin"; assigned-clocks = <&cru SCLK_I2S1_OUT>; - assigned-clock-rates = <12000000>; + assigned-clock-rates = <11289600>; reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>; status = "okay"; diff --git a/arch/arm64/boot/dts/rockchip/rk3326-w7-icn6211-rk618-hdmi-rgb.dts b/arch/arm64/boot/dts/rockchip/rk3326-w7-icn6211-rk618-hdmi-rgb.dts index 13a7c6bedaea..63c1e96b0d0d 100644 --- a/arch/arm64/boot/dts/rockchip/rk3326-w7-icn6211-rk618-hdmi-rgb.dts +++ b/arch/arm64/boot/dts/rockchip/rk3326-w7-icn6211-rk618-hdmi-rgb.dts @@ -98,7 +98,7 @@ clocks = <&cru SCLK_I2S1_OUT>; clock-names = "clkin"; assigned-clocks = <&cru SCLK_I2S1_OUT>; - assigned-clock-rates = <12000000>; + assigned-clock-rates = <11289600>; reset-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>; status = "okay"; @@ -113,7 +113,7 @@ <&clock CODEC_CLK>, <&clock DITHER_CLK>; assigned-clock-parents = <&cru SCLK_I2S1_OUT>, - <&cru SCLK_I2S1_OUT>, + <&clock LCDC0_CLK>, <&clock SCALER_PLL_CLK>, <&clock VIF_PLL_CLK>, <&cru SCLK_I2S1_OUT>, diff --git a/arch/arm64/boot/dts/rockchip/rk3326-w7-icn6211-rk618-hdmi.dts b/arch/arm64/boot/dts/rockchip/rk3326-w7-icn6211-rk618-hdmi.dts index 3a03af228d89..aa155a7db7f0 100644 --- a/arch/arm64/boot/dts/rockchip/rk3326-w7-icn6211-rk618-hdmi.dts +++ b/arch/arm64/boot/dts/rockchip/rk3326-w7-icn6211-rk618-hdmi.dts @@ -58,7 +58,7 @@ clocks = <&cru SCLK_I2S1_OUT>; clock-names = "clkin"; assigned-clocks = <&cru SCLK_I2S1_OUT>; - assigned-clock-rates = <12000000>; + assigned-clock-rates = <11289600>; reset-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>; status = "okay"; @@ -73,7 +73,7 @@ <&clock CODEC_CLK>, <&clock DITHER_CLK>; assigned-clock-parents = <&cru SCLK_I2S1_OUT>, - <&cru SCLK_I2S1_OUT>, + <&clock LCDC0_CLK>, <&clock SCALER_PLL_CLK>, <&clock VIF_PLL_CLK>, <&cru SCLK_I2S1_OUT>, diff --git a/arch/arm64/boot/dts/rockchip/rk3368-sziauto-rk618.dts b/arch/arm64/boot/dts/rockchip/rk3368-sziauto-rk618.dts index 4de749dfd28e..21f56ebb4e53 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368-sziauto-rk618.dts +++ b/arch/arm64/boot/dts/rockchip/rk3368-sziauto-rk618.dts @@ -250,7 +250,7 @@ clocks = <&cru SCLK_I2S_8CH_OUT>; clock-names = "clkin"; assigned-clocks = <&cru SCLK_I2S_8CH_OUT>; - assigned-clock-rates = <12000000>; + assigned-clock-rates = <11289600>; reset-gpios = <&gpio3 14 GPIO_ACTIVE_LOW>; status = "okay";