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spi: spi-microchip-core: Fix the number of chip selects supported

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[ Upstream commit a7ed3a11202d90939a3d00ffcc8cf50703cb7b35 ]

The SPI "hard" controller in PolarFire SoC has eight CS lines, but only
one CS line is wired. When the 'num-cs' property is not specified in
the device tree, the driver defaults to the MAX_CS value, which has
been fixed to 1 to match the hardware configuration; however, when the
'num-cs' property is explicitly defined in the device tree, it
overrides the default value.

Fixes: 9ac8d17694 ("spi: add support for microchip fpga spi controllers")
Signed-off-by: Prajna Rajendra Kumar <prajna.rajendrakumar@microchip.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://msgid.link/r/20240514104508.938448-3-prajna.rajendrakumar@microchip.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Prajna Rajendra Kumar
2024-05-14 11:45:07 +01:00
committed by Greg Kroah-Hartman
parent 4a0a49a898
commit c775eec144
1 changed files with 1 additions and 1 deletions
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2
drivers/spi/spi-microchip-core.c
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@@ -21,7 +21,7 @@
#include <linux/spi/spi.h> #include <linux/spi/spi.h>
#define MAX_LEN (0xffff) #define MAX_LEN (0xffff)
#define MAX_CS (8) #define MAX_CS (1)
#define DEFAULT_FRAMESIZE (8) #define DEFAULT_FRAMESIZE (8)
#define FIFO_DEPTH (32) #define FIFO_DEPTH (32)
#define CLK_GEN_MODE1_MAX (255) #define CLK_GEN_MODE1_MAX (255)