From 74790cf981afd9806939427ad7701f3022ee5c06 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 10 Nov 2020 16:20:46 +0100 Subject: [PATCH 1/3] arm64: zynqmp: Move gic node to axi bus The reason for this change is that after change from amba to axi U-Boot started to show error like: Unable to update property /axi/ethernet@ff0e0000:mac-address, err=FDT_ERR_NOTFOUND Unable to update property /axi/ethernet@ff0e0000:local-mac-address, err=FDT_ERR_NOTFOUND The reason is implementation in fdt_nodename_eq_() which is taken from dtc to the kernel and to the U-Boot. Especially DTC commit d2a9da045897 ("libfdt: Make unit address optional for finding nodes") which is in DTC from 2007. The part of commit description is " This is contrary to traditional OF-like finddevice() behaviour, which allows the unit address to be omitted (which is useful when the device name is unambiguous without the address)." The kernel commit dfff9066e60e ("arm64: dts: zynqmp: Rename buses to be align with simple-bus yaml") changed amba-apu/amba to axi@0/axi but fdt_nodename_eq_() detects /axi/ as match for /axi@0/ because of commit above. That's why it easier to fix one DT inside the kernel by moving GIC node from own bus to generic axi bus as is done by others SoCs. This will avoid incorrect match because the unit address is omitted. Reported-by: Paul Thomas Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/f767fe007e446a2299fda9905e75b723c650a424.1605021644.git.michal.simek@xilinx.com --- arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 31 ++++++++++---------------- 1 file changed, 12 insertions(+), 19 deletions(-) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index 771f60e0346d..515b15ed634a 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -182,25 +182,6 @@ ranges; }; - amba_apu: axi@0 { - compatible = "simple-bus"; - #address-cells = <2>; - #size-cells = <1>; - ranges = <0 0 0 0 0xffffffff>; - - gic: interrupt-controller@f9010000 { - compatible = "arm,gic-400"; - #interrupt-cells = <3>; - reg = <0x0 0xf9010000 0x10000>, - <0x0 0xf9020000 0x20000>, - <0x0 0xf9040000 0x20000>, - <0x0 0xf9060000 0x20000>; - interrupt-controller; - interrupt-parent = <&gic>; - interrupts = <1 9 0xf04>; - }; - }; - amba: axi { compatible = "simple-bus"; #address-cells = <2>; @@ -339,6 +320,18 @@ power-domains = <&zynqmp_firmware PD_GDMA>; }; + gic: interrupt-controller@f9010000 { + compatible = "arm,gic-400"; + #interrupt-cells = <3>; + reg = <0x0 0xf9010000 0x0 0x10000>, + <0x0 0xf9020000 0x0 0x20000>, + <0x0 0xf9040000 0x0 0x20000>, + <0x0 0xf9060000 0x0 0x20000>; + interrupt-controller; + interrupt-parent = <&gic>; + interrupts = <1 9 0xf04>; + }; + /* LPDDMA default allows only secured access. inorder to enable * These dma channels, Users should ensure that these dma * Channels are allowed for non secure access. From 48ab2996f6837aa888ccc0671de7ef3e3185992e Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Tue, 29 Sep 2020 13:43:22 +0200 Subject: [PATCH 2/3] arm64: dts: zynqmp: Fix pcie ranges description DT schema is checking tuples which should be properly separated. The patch is doing this separation to avoid the following warning: ..yaml: axi: pcie@fd0e0000:ranges: [[33554432, 0, 3758096384, 0, 3758096384, 0, 268435456, 1124073472, 6, 0, 6, 0, 2, 0]] is not valid under any of the given schemas (Possible causes of the failure): ...dt.yaml: axi: pcie@fd0e0000:ranges: True was expected ...dt.yaml: axi: pcie@fd0e0000:ranges:0: [33554432, 0, 3758096384, 0, 3758096384, 0, 268435456, 1124073472, 6, 0, 6, 0, 2, 0] is too long Signed-off-by: Michal Simek Reviewed-by: Laurent Pinchart Link: https://lore.kernel.org/r/f59a63d8cb941592de6d2dee8afa6f120b2e40c8.1601379794.git.michal.simek@xilinx.com --- arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index 515b15ed634a..66dad22b8a76 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -535,8 +535,8 @@ <0x0 0xfd480000 0x0 0x1000>, <0x80 0x00000000 0x0 0x1000000>; reg-names = "breg", "pcireg", "cfg"; - ranges = <0x02000000 0x00000000 0xe0000000 0x00000000 0xe0000000 0x00000000 0x10000000 /* non-prefetchable memory */ - 0x43000000 0x00000006 0x00000000 0x00000006 0x00000000 0x00000002 0x00000000>;/* prefetchable memory */ + ranges = <0x02000000 0x00000000 0xe0000000 0x00000000 0xe0000000 0x00000000 0x10000000>,/* non-prefetchable memory */ + <0x43000000 0x00000006 0x00000000 0x00000006 0x00000000 0x00000002 0x00000000>;/* prefetchable memory */ bus-range = <0x00 0xff>; interrupt-map-mask = <0x0 0x0 0x0 0x7>; interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>, From 9854bc7dfa5f7661538b08dc44d5e6c8876832fb Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 12 Nov 2020 13:52:34 +0100 Subject: [PATCH 3/3] arm64: dts: zynqmp: Wire mailbox with zynqmp-power driver The support to driver was added by commit ffdbae28d9d1 ("drivers: soc: xilinx: Use mailbox IPI callback") that's why also enable it via DT by default. It setups communication with firmware via IPI interface. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/5d3523150890e494df308ee69523d0f0e7b33b22.1605185549.git.michal.simek@xilinx.com --- arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index 66dad22b8a76..68923fbd0e89 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -99,6 +99,29 @@ }; }; + zynqmp_ipi { + compatible = "xlnx,zynqmp-ipi-mailbox"; + interrupt-parent = <&gic>; + interrupts = <0 35 4>; + xlnx,ipi-id = <0>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + ipi_mailbox_pmu1: mailbox@ff990400 { + reg = <0x0 0xff9905c0 0x0 0x20>, + <0x0 0xff9905e0 0x0 0x20>, + <0x0 0xff990e80 0x0 0x20>, + <0x0 0xff990ea0 0x0 0x20>; + reg-names = "local_request_region", + "local_response_region", + "remote_request_region", + "remote_response_region"; + #mbox-cells = <1>; + xlnx,ipi-id = <4>; + }; + }; + dcc: dcc { compatible = "arm,dcc"; status = "disabled"; @@ -128,6 +151,8 @@ compatible = "xlnx,zynqmp-power"; interrupt-parent = <&gic>; interrupts = <0 35 4>; + mboxes = <&ipi_mailbox_pmu1 0>, <&ipi_mailbox_pmu1 1>; + mbox-names = "tx", "rx"; }; zynqmp_clk: clock-controller {