From c97b33bbbdc11f62922cf1f48a0a8fb848018c21 Mon Sep 17 00:00:00 2001 From: Jianqun Xu Date: Tue, 10 Nov 2020 14:45:42 +0800 Subject: [PATCH] pinctrl: rockchip: rk3568 drive strength fix Change-Id: Ifeee29a71aa1ae09e3b2ff59d7c0c05cc05b45f2 Signed-off-by: Jianqun Xu --- drivers/pinctrl/pinctrl-rockchip.c | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c index 3a0f2985e9c0..98f214ee6970 100644 --- a/drivers/pinctrl/pinctrl-rockchip.c +++ b/drivers/pinctrl/pinctrl-rockchip.c @@ -2800,6 +2800,10 @@ static int rockchip_set_drive_perpin(struct rockchip_pin_bank *bank, rmask_bits = RV1126_DRV_BITS_PER_PIN; ret = strength; goto config; + } else if (ctrl->type == RK3568) { + rmask_bits = RK3568_DRV_BITS_PER_PIN; + ret = (1 << (strength + 1)) - 1; + goto config; } ret = -EINVAL; @@ -2878,6 +2882,29 @@ config: ret = regmap_update_bits(regmap, reg, rmask, data); + if (ctrl->type == RK3568) { + if (bank->bank_num == 1 && pin_num == 21) + reg = 0x0840; + else if (bank->bank_num == 2 && pin_num == 2) + reg = 0x0844; + else if (bank->bank_num == 2 && pin_num == 8) + reg = 0x0848; + else if (bank->bank_num == 3 && pin_num == 0) + reg = 0x084c; + else if (bank->bank_num == 3 && pin_num == 6) + reg = 0x0850; + else if (bank->bank_num == 4 && pin_num == 0) + reg = 0x0854; + else + return ret; + + data = ((1 << rmask_bits) - 1) << 16; + rmask = data | (data >> 16); + data |= (ret << bit); + + ret = regmap_update_bits(regmap, reg, rmask, data); + } + return ret; }