From ca0399cbf4826741acff99608a675d72e8c45e55 Mon Sep 17 00:00:00 2001
From: Wu Liangqing <wlq@rock-chips.com>
Date: Fri, 19 Nov 2021 14:48:05 +0800
Subject: [PATCH] arm64: dts: rockchip: rk3588s-tablet: sdhci enabled hs400 add
 tsadc

and rkvdec/rkvenc

Change-Id: Iaf30b749510864360968e51b6612326b2208ec8d
Signed-off-by: Wu Liangqing <wlq@rock-chips.com>
---
 .../boot/dts/rockchip/rk3588s-tablet.dtsi     | 50 +++++++++++++++++++
 1 file changed, 50 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-tablet.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s-tablet.dtsi
index 3a0fccc8ce91..408ede02d2cc 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s-tablet.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-tablet.dtsi
@@ -471,6 +471,34 @@
 		     &i2s0_sdo0>;
 };
 
+&iep {
+	status = "okay";
+};
+
+&iep_mmu {
+	status = "okay";
+};
+
+&jpegd {
+	status = "okay";
+};
+
+&jpegd_mmu {
+	status = "okay";
+};
+
+&jpege0 {
+	status = "okay";
+};
+
+&jpege0_mmu {
+	status = "okay";
+};
+
+&mpp_srv {
+	status = "okay";
+};
+
 &pcie2x1l2 {
 	reset-gpios = <&gpio4 RK_PC1 GPIO_ACTIVE_HIGH>;
 	status = "okay";
@@ -555,6 +583,22 @@
 	status = "okay";
 };
 
+&rkvdec0 {
+	status = "okay";
+};
+
+&rkvdec0_mmu {
+	status = "okay";
+};
+
+&rkvenc0 {
+	status = "okay";
+};
+
+&rkvenc0_mmu {
+	status = "okay";
+};
+
 &saradc {
 	status = "okay";
 	vref-supply = <&avcc_1v8_s0>;
@@ -566,6 +610,8 @@
 	no-sd;
 	non-removable;
 	max-frequency = <200000000>;
+	mmc-hs400-1_8v;
+	mmc-hs400-enhanced-strobe;
 	status = "okay";
 };
 
@@ -633,6 +679,10 @@
 	};
 };
 
+&tsadc {
+	status = "okay";
+};
+
 &uart7 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&uart7m1_xfer &uart7m1_ctsn>;