From ca9e80a44a6b66fc73b52c2a0c5cb4a2d32db036 Mon Sep 17 00:00:00 2001 From: Jon Lin Date: Thu, 18 Nov 2021 20:45:07 +0800 Subject: [PATCH] arm64: dts: rockchip: rk3588s-evb3-lp4x: Fix pcie1l2 configuration Change-Id: I5535bf887b5d0f84c82c0459dcd834d8980195e2 Signed-off-by: Jon Lin --- arch/arm64/boot/dts/rockchip/rk3588s-evb3-lp4x.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-evb3-lp4x.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s-evb3-lp4x.dtsi index 4b3c31eb5d92..afe2518df016 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-evb3-lp4x.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s-evb3-lp4x.dtsi @@ -34,7 +34,7 @@ regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; enable-active-high; - gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>; + gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; startup-delay-us = <5000>; vin-supply = <&vcc12v_dcin>; }; @@ -52,7 +52,7 @@ }; }; -&combphy2_psu { +&combphy0_ps { status = "okay"; }; @@ -212,7 +212,7 @@ }; &pcie2x1l2 { - reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; + reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>; vpcie3v3-supply = <&vcc3v3_pcie20>; status = "okay"; };