From cb24e1ba5eef6cbe0ebe50fad3c1dca0fd755b8f Mon Sep 17 00:00:00 2001
From: Jian Hu <jian.hu@amlogic.com>
Date: Sun, 28 Apr 2019 18:54:39 +0800
Subject: [PATCH] clk: tm2: add CLK_IGNORE_UNUSED flag for pcie gates [1/1]

PD#SWPL-7855

Problem:
pcie A does not work when enable alone

---hcsl_r_exen[bit29]---pcie A gate [bit3]
                     |
                     ---pcie B gate [bit28]

bit29/bit28: HHI_PCIE0_PLL_CNTL1
bit3: HHI_PCIE0_PLL_CNTL5

clk core will disable unused clock, So
CLK_IGNORE_UNUSED flag is necessary for
the three gates to avoid closing.

Solution:
add CLK_IGNORE_UNUSED flag for pcie gates

Verify:
test passed on tm2 ab31

Change-Id: I1121c75ab8fb847ec2ba1f7a0975619b36b0938e
Signed-off-by: Jian Hu <jian.hu@amlogic.com>
---
 drivers/amlogic/clk/tm2/tm2.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/amlogic/clk/tm2/tm2.c b/drivers/amlogic/clk/tm2/tm2.c
index 2ff1dc2bc9f0..70605220d905 100644
--- a/drivers/amlogic/clk/tm2/tm2.c
+++ b/drivers/amlogic/clk/tm2/tm2.c
@@ -28,7 +28,7 @@
 #include "tm2.h"
 
 static const struct pll_rate_table tm2_pcie_pll_rate_table[] = {
-	PLL_RATE(100000000, 100, 1, 6),
+	PLL_RATE(100000000, 200, 1, 12),
 	{ /* sentinel */ },
 };
 
@@ -74,7 +74,7 @@ static struct clk_gate tm2_pcie01_enable = {
 		.ops = &clk_gate_ops,
 		.parent_names = (const char *[]){ "pcie_pll" },
 		.num_parents = 1,
-		.flags = CLK_SET_RATE_PARENT,
+		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
 	},
 };
 
@@ -87,7 +87,7 @@ static struct clk_gate tm2_pcie0_gate = {
 		.ops = &clk_gate_ops,
 		.parent_names = (const char *[]){ "tm2_pcie01" },
 		.num_parents = 1,
-		.flags = CLK_SET_RATE_PARENT,
+		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
 	},
 };
 
@@ -100,7 +100,7 @@ static struct clk_gate tm2_pcie1_gate = {
 		.ops = &clk_gate_ops,
 		.parent_names = (const char *[]){ "tm2_pcie01" },
 		.num_parents = 1,
-		.flags = CLK_SET_RATE_PARENT,
+		.flags = CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED,
 	},
 };