From cbb0b7c4f6a8a7e3b5b43aa1b0c77f3bdaa7d9a8 Mon Sep 17 00:00:00 2001 From: William Wu Date: Mon, 21 Oct 2019 18:11:35 +0800 Subject: [PATCH] phy: rockchip-inno-combphy: avoid reinit usb3 phy When the combphy work as USB3 PHY (e.g. RK1808 EVB USB3 port), the PHY init and exit ops are called dynamically in the runtime process of USB3 controller driver. Because it only needs to init the USB3 PHY once in the PHY init, and reinit the USB3 PHY in the runtime process may cause USB3 work abnormally, so this patch doesn't clear the phy_initialized flag for USB3 in the PHY exit ops. Change-Id: Ifc2eb3edac25bd10db6d47b4c9e197cc15c4aef7 Signed-off-by: William Wu --- drivers/phy/rockchip/phy-rockchip-inno-combphy.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/phy/rockchip/phy-rockchip-inno-combphy.c b/drivers/phy/rockchip/phy-rockchip-inno-combphy.c index df1e052edb51..b6dd1b9b9e42 100644 --- a/drivers/phy/rockchip/phy-rockchip-inno-combphy.c +++ b/drivers/phy/rockchip/phy-rockchip-inno-combphy.c @@ -464,13 +464,12 @@ static int rockchip_combphy_exit(struct phy *phy) */ clk_disable_unprepare(priv->ref_clk); - priv->phy_initialized = false; - /* in case of waiting phy PLL lock timeout */ if (priv->phy_type == PHY_TYPE_PCIE) { reset_control_assert(priv->rsts[PHY_GRF_P_RSTN]); udelay(5); reset_control_deassert(priv->rsts[PHY_GRF_P_RSTN]); + priv->phy_initialized = false; } return 0;