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rk3368 lcdc: In advance 500us to trigger lineflage1x interrupt

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Signed-off-by: hjc <hjc@rock-chips.com>
This commit is contained in:
hjc
2015-08-24 10:35:51 +08:00
parent 9ab8fff395
commit cc6e554e54
1 changed files with 45 additions and 3 deletions
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48
drivers/video/rockchip/lcdc/rk3368_lcdc.c
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@@ -50,6 +50,7 @@ module_param(dbg_thresd, int, S_IRUGO | S_IWUSR);
pr_info(x);\ pr_info(x);\
} while (0) } while (0)
#define EARLY_TIME 500 /*us*/
static struct rk_lcdc_win lcdc_win[] = { static struct rk_lcdc_win lcdc_win[] = {
[0] = { [0] = {
.name = "win0", .name = "win0",
@@ -1589,10 +1590,11 @@ static int rk3368_config_timing(struct rk_lcdc_driver *dev_drv)
u32 mask, val; u32 mask, val;
u16 h_total, v_total; u16 h_total, v_total;
u16 vact_end_f1, vact_st_f1, vs_end_f1, vs_st_f1; u16 vact_end_f1, vact_st_f1, vs_end_f1, vs_st_f1;
u32 frame_time;
h_total = hsync_len + left_margin + x_res + right_margin; h_total = hsync_len + left_margin + x_res + right_margin;
v_total = vsync_len + upper_margin + y_res + lower_margin; v_total = vsync_len + upper_margin + y_res + lower_margin;
frame_time = 1000 * v_total * h_total / (screen->mode.pixclock / 1000);
mask = m_DSP_HS_PW | m_DSP_HTOTAL; mask = m_DSP_HS_PW | m_DSP_HTOTAL;
val = v_DSP_HS_PW(hsync_len) | v_DSP_HTOTAL(h_total); val = v_DSP_HS_PW(hsync_len) | v_DSP_HTOTAL(h_total);
lcdc_msk_reg(lcdc_dev, DSP_HTOTAL_HS_END, mask, val); lcdc_msk_reg(lcdc_dev, DSP_HTOTAL_HS_END, mask, val);
@@ -1667,7 +1669,8 @@ static int rk3368_config_timing(struct rk_lcdc_driver *dev_drv)
mask = m_DSP_LINE_FLAG0_NUM | m_DSP_LINE_FLAG1_NUM; mask = m_DSP_LINE_FLAG0_NUM | m_DSP_LINE_FLAG1_NUM;
val = val =
v_DSP_LINE_FLAG0_NUM(vact_end_f1) | v_DSP_LINE_FLAG0_NUM(vact_end_f1) |
v_DSP_LINE_FLAG1_NUM(vact_end_f1); v_DSP_LINE_FLAG1_NUM(vact_end_f1 -
EARLY_TIME * v_total / frame_time);
lcdc_msk_reg(lcdc_dev, LINE_FLAG, mask, val); lcdc_msk_reg(lcdc_dev, LINE_FLAG, mask, val);
} else { } else {
mask = m_DSP_VS_PW | m_DSP_VTOTAL; mask = m_DSP_VS_PW | m_DSP_VTOTAL;
@@ -1713,7 +1716,8 @@ static int rk3368_config_timing(struct rk_lcdc_driver *dev_drv)
mask = m_DSP_LINE_FLAG0_NUM | m_DSP_LINE_FLAG1_NUM; mask = m_DSP_LINE_FLAG0_NUM | m_DSP_LINE_FLAG1_NUM;
val = v_DSP_LINE_FLAG0_NUM(vsync_len + upper_margin + y_res) | val = v_DSP_LINE_FLAG0_NUM(vsync_len + upper_margin + y_res) |
v_DSP_LINE_FLAG1_NUM(vsync_len + upper_margin + y_res); v_DSP_LINE_FLAG1_NUM(vsync_len + upper_margin + y_res -
EARLY_TIME * v_total / frame_time);
lcdc_msk_reg(lcdc_dev, LINE_FLAG, mask, val); lcdc_msk_reg(lcdc_dev, LINE_FLAG, mask, val);
} }
rk3368_lcdc_post_cfg(dev_drv); rk3368_lcdc_post_cfg(dev_drv);
@@ -2149,6 +2153,43 @@ static void rk3368_lcdc_layer_enable(struct lcdc_device *lcdc_dev,
spin_unlock(&lcdc_dev->reg_lock); spin_unlock(&lcdc_dev->reg_lock);
} }
static int rk3368_lcdc_lineflag_config(struct rk_lcdc_driver *dev_drv)
{
struct lcdc_device *lcdc_dev =
container_of(dev_drv, struct lcdc_device, driver);
struct rk_screen *screen = dev_drv->cur_screen;
u16 hsync_len = screen->mode.hsync_len;
u16 left_margin = screen->mode.left_margin;
u16 right_margin = screen->mode.right_margin;
u16 vsync_len = screen->mode.vsync_len;
u16 upper_margin = screen->mode.upper_margin;
u16 lower_margin = screen->mode.lower_margin;
u16 x_res = screen->mode.xres;
u16 y_res = screen->mode.yres;
u32 mask, val, frame_time;
u16 h_total, v_total, vact_end_f1;
h_total = hsync_len + left_margin + x_res + right_margin;
v_total = vsync_len + upper_margin + y_res + lower_margin;
frame_time = 1000 * v_total * h_total / (screen->mode.pixclock / 1000);
if (screen->mode.vmode == FB_VMODE_INTERLACED) {
vact_end_f1 = 2 * (vsync_len + upper_margin) + y_res +
lower_margin + 1;
mask = m_DSP_LINE_FLAG0_NUM | m_DSP_LINE_FLAG1_NUM;
val = v_DSP_LINE_FLAG0_NUM(vact_end_f1) |
v_DSP_LINE_FLAG1_NUM(vact_end_f1 -
EARLY_TIME * v_total / frame_time);
lcdc_msk_reg(lcdc_dev, LINE_FLAG, mask, val);
} else {
mask = m_DSP_LINE_FLAG0_NUM | m_DSP_LINE_FLAG1_NUM;
val = v_DSP_LINE_FLAG0_NUM(vsync_len + upper_margin + y_res) |
v_DSP_LINE_FLAG1_NUM(vsync_len + upper_margin + y_res -
EARLY_TIME * v_total / frame_time);
lcdc_msk_reg(lcdc_dev, LINE_FLAG, mask, val);
}
return 0;
}
static int rk3368_lcdc_enable_irq(struct rk_lcdc_driver *dev_drv) static int rk3368_lcdc_enable_irq(struct rk_lcdc_driver *dev_drv)
{ {
struct lcdc_device *lcdc_dev = container_of(dev_drv, struct lcdc_device *lcdc_dev = container_of(dev_drv,
@@ -2221,6 +2262,7 @@ static int rk3368_lcdc_open(struct rk_lcdc_driver *dev_drv, int win_id,
rk3368_lcdc_mmu_en(dev_drv); */ rk3368_lcdc_mmu_en(dev_drv); */
if ((support_uboot_display() && (lcdc_dev->prop == PRMRY))) { if ((support_uboot_display() && (lcdc_dev->prop == PRMRY))) {
rk3368_lcdc_set_dclk(dev_drv, 0); rk3368_lcdc_set_dclk(dev_drv, 0);
rk3368_lcdc_lineflag_config(dev_drv);
/*rk3368_lcdc_enable_irq(dev_drv);*/ /*rk3368_lcdc_enable_irq(dev_drv);*/
} else { } else {
rk3368_load_screen(dev_drv, 1); rk3368_load_screen(dev_drv, 1);