shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-09 20:32:04 +09:00
Code Issues Packages Projects Releases Wiki Activity

UPSTREAM: arm64: dts: rockchip: extent bus-ranges of PCIe for rk3399

Browse Source 
In order to support multiple hierarchy of PCIe buses,
or instance, PCIe switch, we need to extent bus-ranges
to as max as possible. We have 32 regions and could support
up to 31 buses except bus 0 for our root bridge.

Change-Id: Iccca42642442a73b1828b17110b11891f1ee5feb
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
(cherry picked from d633becc58)
This commit is contained in:
Shawn Lin
2017-11-27 10:16:54 +08:00
parent 8fb451af77
commit ccb9ef6d55
1 changed files with 1 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm64/boot/dts/rockchip/rk3399.dtsi
View File

@@ -1196,7 +1196,7 @@
<&cru PCLK_PCIE>, <&cru SCLK_PCIE_PM>;
clock-names = "aclk", "aclk-perf",
"hclk", "pm";
bus-range = <0x0 0x1>;
bus-range = <0x0 0x1f>;
max-link-speed = <1>;
linux,pci-domain = <0>;
msi-map = <0x0 &its 0x0 0x1000>;