From ccb9ef6d5544682beadd34c9f160f263a87014e8 Mon Sep 17 00:00:00 2001 From: Shawn Lin Date: Mon, 27 Nov 2017 10:16:54 +0800 Subject: [PATCH] UPSTREAM: arm64: dts: rockchip: extent bus-ranges of PCIe for rk3399 In order to support multiple hierarchy of PCIe buses, or instance, PCIe switch, we need to extent bus-ranges to as max as possible. We have 32 regions and could support up to 31 buses except bus 0 for our root bridge. Change-Id: Iccca42642442a73b1828b17110b11891f1ee5feb Signed-off-by: Heiko Stuebner Signed-off-by: Shawn Lin (cherry picked from d633becc583e13b38c4aea53b97a197acd61a521) --- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index c516b1e00d7b..f3077a57f7ef 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -1196,7 +1196,7 @@ <&cru PCLK_PCIE>, <&cru SCLK_PCIE_PM>; clock-names = "aclk", "aclk-perf", "hclk", "pm"; - bus-range = <0x0 0x1>; + bus-range = <0x0 0x1f>; max-link-speed = <1>; linux,pci-domain = <0>; msi-map = <0x0 &its 0x0 0x1000>;