From cdc628fd6c3d002894c117f2fb7a9c81ccda6708 Mon Sep 17 00:00:00 2001 From: Qiufang Dai Date: Mon, 6 Nov 2017 20:56:46 +0800 Subject: [PATCH] clk: axg fix_pll use frac mode PD#154040: axg fix_pll enable frac mode describe Change-Id: I1223b5710687a2e9902d953fd7c8eac9c8574f4d Signed-off-by: Qiufang Dai --- drivers/amlogic/clk/axg/axg.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/amlogic/clk/axg/axg.c b/drivers/amlogic/clk/axg/axg.c index 33de54786a06..5aa86e246e3f 100644 --- a/drivers/amlogic/clk/axg/axg.c +++ b/drivers/amlogic/clk/axg/axg.c @@ -60,6 +60,11 @@ static struct meson_clk_pll axg_fixed_pll = { .shift = 16, .width = 2, }, + .frac = { + .reg_off = HHI_MPLL_CNTL2, + .shift = 0, + .width = 12, + }, .lock = &clk_lock, .hw.init = &(struct clk_init_data){ .name = "fixed_pll",