From cdf1300d505436fcbcccb221448a7d77bf3c3ad9 Mon Sep 17 00:00:00 2001 From: Rocky Hao Date: Wed, 7 Feb 2018 15:52:25 +0800 Subject: [PATCH] arm64: dts: rockchip: px30: add basic thermal config Change-Id: I4febd05098d1adb1cf26e20fa4929d6c3a65541f Signed-off-by: Rocky Hao --- arch/arm64/boot/dts/rockchip/px30.dtsi | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi index 5cc2a4ed89b0..1920f16ef56a 100644 --- a/arch/arm64/boot/dts/rockchip/px30.dtsi +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi @@ -12,6 +12,7 @@ #include #include #include +#include / { compatible = "rockchip,px30"; @@ -635,6 +636,23 @@ }; }; + thermal_zones: thermal-zones { + soc_thermal: soc-thermal { + polling-delay-passive = <20>; /* milliseconds */ + polling-delay = <1000>; /* milliseconds */ + sustainable-power = <1000>; /* milliwatts */ + + thermal-sensors = <&tsadc 0>; + }; + + gpu_thermal: gpu-thermal { + polling-delay-passive = <100>; /* milliseconds */ + polling-delay = <1000>; /* milliseconds */ + + thermal-sensors = <&tsadc 1>; + }; + }; + tsadc: tsadc@ff280000 { compatible = "rockchip,px30-tsadc"; reg = <0x0 0xff280000 0x0 0x100>; @@ -644,7 +662,7 @@ clock-names = "tsadc", "apb_pclk"; assigned-clocks = <&cru SCLK_TSADC>; assigned-clock-rates = <50000>; - resets = <&cru SRST_TSADC_P>; + resets = <&cru SRST_TSADC>; reset-names = "tsadc-apb"; pinctrl-names = "init", "default", "sleep"; pinctrl-0 = <&tsadc_otp_gpio>;