From ce960453e1da13e9a35fc391dba5391116d018d7 Mon Sep 17 00:00:00 2001
From: William Wu <william.wu@rock-chips.com>
Date: Tue, 10 Nov 2020 17:19:04 +0800
Subject: [PATCH] arm64: dts: rockchip: rk3568: add usb2 phy nodes for usb host
 controllers

Change-Id: Id62fd95c0e016ab265ee248cb9a282241ab2d271
Signed-off-by: William Wu <william.wu@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3568.dtsi | 33 ++++++++++++++++++------
 1 file changed, 25 insertions(+), 8 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3568.dtsi b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
index 8130fbb268ad..c3cfda546259 100644
--- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
@@ -277,6 +277,8 @@
 			reg = <0x0 0xfd000000 0x0 0x400000>;
 			interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
 			dr_mode = "host";
+			phys = <&u2phy0_host>;
+			phy-names = "usb2-phy";
 			phy_type = "utmi_wide";
 			power-domains = <&power RK3568_PD_PIPE>;
 			resets = <&cru SRST_USB3OTG1>;
@@ -314,8 +316,11 @@
 		compatible = "generic-ehci";
 		reg = <0x0 0xfd800000 0x0 0x40000>;
 		interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru HCLK_USB2HOST0>, <&cru HCLK_USB2HOST0_ARB>;
-		clock-names = "usbhost", "arbiter";
+		clocks = <&cru HCLK_USB2HOST0>, <&cru HCLK_USB2HOST0_ARB>,
+			 <&usb2phy1>;
+		clock-names = "usbhost", "arbiter", "utmi";
+		phys = <&u2phy1_otg>;
+		phy-names = "usb2-phy";
 		status = "disabled";
 	};
 
@@ -323,8 +328,11 @@
 		compatible = "generic-ohci";
 		reg = <0x0 0xfd840000 0x0 0x40000>;
 		interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru HCLK_USB2HOST0>, <&cru HCLK_USB2HOST0_ARB>;
-		clock-names = "usbhost", "arbiter";
+		clocks = <&cru HCLK_USB2HOST0>, <&cru HCLK_USB2HOST0_ARB>,
+			 <&usb2phy1>;
+		clock-names = "usbhost", "arbiter", "utmi";
+		phys = <&u2phy1_otg>;
+		phy-names = "usb2-phy";
 		status = "disabled";
 	};
 
@@ -332,8 +340,11 @@
 		compatible = "generic-ehci";
 		reg = <0x0 0xfd880000 0x0 0x40000>;
 		interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru HCLK_USB2HOST1>, <&cru HCLK_USB2HOST1_ARB>;
-		clock-names = "usbhost", "arbiter";
+		clocks = <&cru HCLK_USB2HOST1>, <&cru HCLK_USB2HOST1_ARB>,
+			 <&usb2phy1>;
+		clock-names = "usbhost", "arbiter", "utmi";
+		phys = <&u2phy1_host>;
+		phy-names = "usb2-phy";
 		status = "disabled";
 	};
 
@@ -341,8 +352,11 @@
 		compatible = "generic-ohci";
 		reg = <0x0 0xfd8c0000 0x0 0x40000>;
 		interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&cru HCLK_USB2HOST1>, <&cru HCLK_USB2HOST1_ARB>;
-		clock-names = "usbhost", "arbiter";
+		clocks = <&cru HCLK_USB2HOST1>, <&cru HCLK_USB2HOST1_ARB>,
+			 <&usb2phy1>;
+		clock-names = "usbhost", "arbiter", "utmi";
+		phys = <&u2phy1_host>;
+		phy-names = "usb2-phy";
 		status = "disabled";
 	};
 
@@ -2296,6 +2310,8 @@
 		clocks = <&pmucru CLK_USBPHY0_REF>;
 		clock-names = "phyclk";
 		#clock-cells = <0>;
+		assigned-clocks = <&cru USB480M>;
+		assigned-clock-parents = <&usb2phy0>;
 		clock-output-names = "usb480m_phy";
 		rockchip,usbgrf = <&usb2phy0_grf>;
 		status = "disabled";
@@ -2317,6 +2333,7 @@
 		interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&pmucru CLK_USBPHY1_REF>;
 		clock-names = "phyclk";
+		#clock-cells = <0>;
 		rockchip,usbgrf = <&usb2phy1_grf>;
 		status = "disabled";