From cec4062336f13d2e32226096db13a290f6f7d093 Mon Sep 17 00:00:00 2001 From: Jason Zhu Date: Mon, 10 Mar 2025 10:10:53 +0800 Subject: [PATCH] arm64: dts: rockchip: rv1126b: add rkadc Change-Id: I63a4babcf8df5e3ec5ea0845116e3eb9c017a989 Signed-off-by: Jason Zhu --- arch/arm64/boot/dts/rockchip/rv1126b.dtsi | 24 +++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rv1126b.dtsi b/arch/arm64/boot/dts/rockchip/rv1126b.dtsi index 8d268f255a90..1608354c82b1 100644 --- a/arch/arm64/boot/dts/rockchip/rv1126b.dtsi +++ b/arch/arm64/boot/dts/rockchip/rv1126b.dtsi @@ -757,6 +757,18 @@ }; }; + audio_codec_pmu: audio-codec@20890000 { + compatible = "rockchip,rv1126b-codec", "rockchip,rk3506-codec"; + reg = <0x20890000 0x1000>; + #sound-dai-cells = <0>; + clocks = <&cru PCLK_AUDIO_ADC_PMU>, <&cru MCLK_AUDIO_ADC_PMU>; + clock-names = "pclk", "mclk"; + resets = <&cru SRST_MRESETN_AUDIO_ADC_PMU>; + reset-names = "rst"; + rockchip,grf = <&grf>; + status = "disabled"; + }; + fspi1: spi@208c0000 { compatible = "rockchip,rv1126b-fspi", "rockchip,fspi"; reg = <0x208c0000 0x4000>; @@ -981,6 +993,18 @@ status = "disabled"; }; + audio_codec: audio-codec@20bf0000 { + compatible = "rockchip,rv1126b-codec", "rockchip,rk3506-codec"; + reg = <0x20bf0000 0x1000>; + #sound-dai-cells = <0>; + clocks = <&cru PCLK_AUDIO_ADC_BUS>, <&cru MCLK_AUDIO_ADC_BUS>; + clock-names = "pclk", "mclk"; + resets = <&cru SRST_MRESETN_AUDIO_ADC_BUS>; + reset-names = "rst"; + rockchip,grf = <&grf>; + status = "disabled"; + }; + rktimer: timer@20c00000 { compatible = "rockchip,rv1126b-timer", "rockchip,rk3288-timer"; reg = <0x20c00000 0x20>;