From d1ff22dec8032b3803546d1032c72d43b9d13f2e Mon Sep 17 00:00:00 2001 From: Yu Qiaowei Date: Mon, 6 Dec 2021 11:49:39 +0800 Subject: [PATCH] video: rockchip: rga3: Fix the warning in rga2/rga3_reg_info.c. Signed-off-by: Yu Qiaowei Change-Id: I5918d5aa2a1ace4303b952865667e9565fa1577a --- drivers/video/rockchip/rga3/rga2_reg_info.c | 20 -------------------- drivers/video/rockchip/rga3/rga3_reg_info.c | 12 ++++++++---- 2 files changed, 8 insertions(+), 24 deletions(-) diff --git a/drivers/video/rockchip/rga3/rga2_reg_info.c b/drivers/video/rockchip/rga3/rga2_reg_info.c index f79fb9d5804e..3cb77f157156 100644 --- a/drivers/video/rockchip/rga3/rga2_reg_info.c +++ b/drivers/video/rockchip/rga3/rga2_reg_info.c @@ -115,24 +115,15 @@ static struct rga_scheduler_t *get_scheduler(int core) static void RGA2_reg_get_param(unsigned char *base, struct rga2_req *msg) { - u32 *bRGA_SRC_INFO; u32 *bRGA_SRC_X_FACTOR; u32 *bRGA_SRC_Y_FACTOR; u32 sw, sh; u32 dw, dh; u32 param_x, param_y; - u8 x_flag, y_flag; - - u32 reg; - - bRGA_SRC_INFO = (u32 *) (base + RGA2_SRC_INFO_OFFSET); - reg = *bRGA_SRC_INFO; bRGA_SRC_X_FACTOR = (u32 *) (base + RGA2_SRC_X_FACTOR_OFFSET); bRGA_SRC_Y_FACTOR = (u32 *) (base + RGA2_SRC_Y_FACTOR_OFFSET); - x_flag = y_flag = 0; - if (((msg->rotate_mode & 0x3) == 1) || ((msg->rotate_mode & 0x3) == 3)) { dw = msg->dst.act_h; @@ -146,7 +137,6 @@ static void RGA2_reg_get_param(unsigned char *base, struct rga2_req *msg) sh = msg->src.act_h; if (sw > dw) { - x_flag = 1; #if SCALE_DOWN_LARGE param_x = ((dw) << 16) / (sw) + 1; #else @@ -154,7 +144,6 @@ static void RGA2_reg_get_param(unsigned char *base, struct rga2_req *msg) #endif *bRGA_SRC_X_FACTOR |= ((param_x & 0xffff) << 0); } else if (sw < dw) { - x_flag = 2; #if SCALE_UP_LARGE param_x = ((sw - 1) << 16) / (dw - 1); #else @@ -166,7 +155,6 @@ static void RGA2_reg_get_param(unsigned char *base, struct rga2_req *msg) } if (sh > dh) { - y_flag = 1; #if SCALE_DOWN_LARGE param_y = ((dh) << 16) / (sh) + 1; #else @@ -174,7 +162,6 @@ static void RGA2_reg_get_param(unsigned char *base, struct rga2_req *msg) #endif *bRGA_SRC_Y_FACTOR |= ((param_y & 0xffff) << 0); } else if (sh < dh) { - y_flag = 2; #if SCALE_UP_LARGE param_y = ((sh - 1) << 16) / (dh - 1); #else @@ -184,13 +171,6 @@ static void RGA2_reg_get_param(unsigned char *base, struct rga2_req *msg) } else { *bRGA_SRC_Y_FACTOR = 0; //((1 << 14) << 16) | (1 << 14); } - - reg = - ((reg & (~m_RGA2_SRC_INFO_SW_SW_SRC_HSCL_MODE)) | - (s_RGA2_SRC_INFO_SW_SW_SRC_HSCL_MODE(x_flag))); - reg = - ((reg & (~m_RGA2_SRC_INFO_SW_SW_SRC_VSCL_MODE)) | - (s_RGA2_SRC_INFO_SW_SW_SRC_VSCL_MODE(y_flag))); } static void RGA2_set_mode_ctrl(u8 *base, struct rga2_req *msg) diff --git a/drivers/video/rockchip/rga3/rga3_reg_info.c b/drivers/video/rockchip/rga3/rga3_reg_info.c index 3c2cfb9bef2d..157c1b471a33 100644 --- a/drivers/video/rockchip/rga3/rga3_reg_info.c +++ b/drivers/video/rockchip/rga3/rga3_reg_info.c @@ -18,13 +18,14 @@ static void RGA3_set_reg_win0_info(u8 *base, struct rga3_req *msg) u32 *bRGA3_WIN0_Y_BASE, *bRGA3_WIN0_U_BASE, *bRGA3_WIN0_V_BASE; u32 *bRGA3_WIN0_VIR_STRIDE; u32 *bRGA3_WIN0_UV_VIR_STRIDE; - u32 *bRGA3_WIN0_FBC_OFF; u32 *bRGA3_WIN0_SRC_SIZE; u32 *bRGA3_WIN0_ACT_OFF; u32 *bRGA3_WIN0_ACT_SIZE; u32 *bRGA3_WIN0_DST_SIZE; u32 *bRGA3_WIN0_SCL_FAC; + /* Not used yet. */ + // u32 *bRGA3_WIN0_FBC_OFF; u32 sw = 0, sh = 0; u32 dw = 0, dh = 0; @@ -69,7 +70,8 @@ static void RGA3_set_reg_win0_info(u8 *base, struct rga3_req *msg) bRGA3_WIN0_UV_VIR_STRIDE = (u32 *) (base + RGA3_WIN0_UV_VIR_STRIDE_OFFSET); - bRGA3_WIN0_FBC_OFF = (u32 *) (base + RGA3_WIN0_FBC_OFF_OFFSET); + /* Not used yet. */ + // bRGA3_WIN0_FBC_OFF = (u32 *) (base + RGA3_WIN0_FBC_OFF_OFFSET); bRGA3_WIN0_ACT_OFF = (u32 *) (base + RGA3_WIN0_ACT_OFF_OFFSET); bRGA3_WIN0_SRC_SIZE = (u32 *) (base + RGA3_WIN0_SRC_SIZE_OFFSET); bRGA3_WIN0_ACT_SIZE = (u32 *) (base + RGA3_WIN0_ACT_SIZE_OFFSET); @@ -428,13 +430,14 @@ static void RGA3_set_reg_win1_info(u8 *base, struct rga3_req *msg) u32 *bRGA3_WIN1_Y_BASE, *bRGA3_WIN1_U_BASE, *bRGA3_WIN1_V_BASE; u32 *bRGA3_WIN1_VIR_STRIDE; u32 *bRGA3_WIN1_UV_VIR_STRIDE; - u32 *bRGA3_WIN1_FBC_OFF; u32 *bRGA3_WIN1_SRC_SIZE; u32 *bRGA3_WIN1_ACT_OFF; u32 *bRGA3_WIN1_ACT_SIZE; u32 *bRGA3_WIN1_DST_SIZE; u32 *bRGA3_WIN1_SCL_FAC; + /* Not used yet. */ + // u32 *bRGA3_WIN1_FBC_OFF; u32 sw = 0, sh = 0; u32 dw = 0, dh = 0; @@ -479,7 +482,8 @@ static void RGA3_set_reg_win1_info(u8 *base, struct rga3_req *msg) bRGA3_WIN1_UV_VIR_STRIDE = (u32 *) (base + RGA3_WIN1_UV_VIR_STRIDE_OFFSET); - bRGA3_WIN1_FBC_OFF = (u32 *) (base + RGA3_WIN1_FBC_OFF_OFFSET); + /* Not used yet. */ + // bRGA3_WIN1_FBC_OFF = (u32 *) (base + RGA3_WIN1_FBC_OFF_OFFSET); bRGA3_WIN1_ACT_OFF = (u32 *) (base + RGA3_WIN1_ACT_OFF_OFFSET); bRGA3_WIN1_SRC_SIZE = (u32 *) (base + RGA3_WIN1_SRC_SIZE_OFFSET); bRGA3_WIN1_ACT_SIZE = (u32 *) (base + RGA3_WIN1_ACT_SIZE_OFFSET);