From d226c884fde9050deaadd17273381d7a309abdcc Mon Sep 17 00:00:00 2001 From: Shawn Lin Date: Fri, 3 Sep 2021 10:05:05 +0800 Subject: [PATCH] mmc: sdhci-of-dwcmshc: Remove HS200 and HS400 at low speed for rockchip Rockchip platforms don't support HS200 or HS400 at low speed, so we must limit it. Signed-off-by: Shawn Lin Change-Id: I40eb9f117fd83789b6ab7a16d44049e16786698b --- drivers/mmc/host/sdhci-of-dwcmshc.c | 18 ++++++++++++++---- 1 file changed, 14 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/host/sdhci-of-dwcmshc.c b/drivers/mmc/host/sdhci-of-dwcmshc.c index 4d0dcb5013c5..9eef22efd2fa 100644 --- a/drivers/mmc/host/sdhci-of-dwcmshc.c +++ b/drivers/mmc/host/sdhci-of-dwcmshc.c @@ -339,6 +339,16 @@ static int rockchip_pltf_init(struct sdhci_host *host, struct dwcmshc_priv *priv /* Reset previous settings */ sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_TXCLK); sdhci_writel(host, 0, DWCMSHC_EMMC_DLL_STRBIN); + + /* + * Don't support highspeed bus mode with low clk speed as we + * cannot use DLL for this condition. + */ + if (host->mmc->f_max <= 52000000) { + host->mmc->caps2 &= ~(MMC_CAP2_HS200 | MMC_CAP2_HS400); + host->mmc->caps &= ~(MMC_CAP_3_3V_DDR | MMC_CAP_1_8V_DDR); + } + return 0; } @@ -413,6 +423,10 @@ static int dwcmshc_probe(struct platform_device *pdev) host->mmc_host_ops.hs400_enhanced_strobe = dwcmshc_hs400_enhanced_strobe; + err = sdhci_add_host(host); + if (err) + goto err_clk; + priv->flags = drv_data->flags; if (drv_data->flags & RK_PLATFROM) { err = rockchip_pltf_init(host, priv); @@ -420,10 +434,6 @@ static int dwcmshc_probe(struct platform_device *pdev) goto err_clk; } - err = sdhci_add_host(host); - if (err) - goto err_clk; - pm_runtime_get_noresume(&pdev->dev); pm_runtime_set_active(&pdev->dev); pm_runtime_enable(&pdev->dev);