From d26a856c7eb65afb8ea3275c48e21280165bbad7 Mon Sep 17 00:00:00 2001 From: William Wu Date: Fri, 13 Apr 2018 10:04:28 +0800 Subject: [PATCH] phy: rockchip-inno-usb2: open pre-emphasize for rk322x Open pre-emphasize in non-chirp state for rk322x USB PHY0 otg port to increase HS slew rate. Change-Id: Ia565746286a750a251619a83cbbead99c0ddecbd Signed-off-by: William Wu --- drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c index 3a52bad4b440..874a2638cbc2 100644 --- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c +++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c @@ -1873,6 +1873,17 @@ static int rk312x_usb2phy_tuning(struct rockchip_usb2phy *rphy) return 0; } +static int rk322x_usb2phy_tuning(struct rockchip_usb2phy *rphy) +{ + int ret = 0; + + /* Open pre-emphasize in non-chirp state for PHY0 otg port */ + if (rphy->phy_cfg->reg == 0x760) + ret = regmap_write(rphy->grf, 0x76c, 0x00070004); + + return ret; +} + static int rk3308_usb2phy_tuning(struct rockchip_usb2phy *rphy) { int ret; @@ -2173,6 +2184,7 @@ static const struct rockchip_usb2phy_cfg rk322x_phy_cfgs[] = { { .reg = 0x760, .num_ports = 2, + .phy_tuning = rk322x_usb2phy_tuning, .clkout_ctl = { 0x0768, 4, 4, 1, 0 }, .port_cfgs = { [USB2PHY_PORT_OTG] = {