From d40bd17e0a10c7731322b82bbba42881185d579b Mon Sep 17 00:00:00 2001 From: Nanxin Qin Date: Sat, 24 Feb 2018 19:22:41 +0800 Subject: [PATCH] media: adds the register ops for media codec io efuse bus [1/2]. PD#161104: adds the register ops for media codec io efuse bus Change-Id: I6fc625848442754b089428fd8cb10a3047fa4062 Signed-off-by: Nanxin Qin --- MAINTAINERS | 4 ++ arch/arm64/boot/dts/amlogic/g12a_skt.dts | 3 ++ .../common/arch/registers/register_map.c | 23 ++++++++++++ .../common/arch/registers/register_ops_m8.c | 1 + .../linux/amlogic/media/registers/register.h | 1 + .../amlogic/media/registers/register_map.h | 2 + .../amlogic/media/registers/register_ops.h | 3 ++ .../amlogic/media/registers/regs/efuse_regs.h | 37 +++++++++++++++++++ .../amlogic/media/registers/regs/hevc_regs.h | 4 +- include/linux/amlogic/media/utils/vdec_reg.h | 11 ++++++ 10 files changed, 87 insertions(+), 2 deletions(-) create mode 100644 include/linux/amlogic/media/registers/regs/efuse_regs.h diff --git a/MAINTAINERS b/MAINTAINERS index ed1fb796aaa4..c94b9ef7bcf3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -14375,3 +14375,7 @@ AMLOGIC G12A Dolby Vision DRIVER M: Zhilei Wu F: drivers/amlogic/media/enhancement/amdolby_vision* F: include/linux/amlogic/media/amdolbyvision/* + +AMLOGIC G12A Media codec io bus +M: Nanxin Qin +F: include/linux/amlogic/media/registers/regs/efuse_regs.h diff --git a/arch/arm64/boot/dts/amlogic/g12a_skt.dts b/arch/arm64/boot/dts/amlogic/g12a_skt.dts index 8fbea5be966f..6819e28d49c1 100644 --- a/arch/arm64/boot/dts/amlogic/g12a_skt.dts +++ b/arch/arm64/boot/dts/amlogic/g12a_skt.dts @@ -610,6 +610,9 @@ io_dmc_base{ reg = <0x0 0xff638000 0x0 0x2000>; }; + io_efuse_base{ + reg = <0x0 0xff630000 0x0 0x2000>; + }; }; codec_mm { diff --git a/drivers/amlogic/media/common/arch/registers/register_map.c b/drivers/amlogic/media/common/arch/registers/register_map.c index 87f98cfced41..d9eae8f43662 100644 --- a/drivers/amlogic/media/common/arch/registers/register_map.c +++ b/drivers/amlogic/media/common/arch/registers/register_map.c @@ -45,6 +45,7 @@ enum { CODECIO_AOBUS_BASE, CODECIO_VCBUS_BASE, CODECIO_DMCBUS_BASE, + CODECIO_EFUSE_BASE, CODECIO_BUS_MAX, }; @@ -311,6 +312,28 @@ void codecio_write_resetbus(unsigned int reg, unsigned int val) pr_err("write reset reg %x error %d\n", reg, ret); } +int codecio_read_efusebus(unsigned int reg) +{ + int ret, val; + + ret = codecio_reg_read(CODECIO_EFUSE_BASE, reg << 2, &val); + if (ret) { + pr_err("read reset reg %x error %d\n", reg, ret); + return -1; + } + + return val; +} + +void codecio_write_efusebus(unsigned int reg, unsigned int val) +{ + int ret; + + ret = codecio_reg_write(CODECIO_EFUSE_BASE, reg << 2, val); + if (ret) + pr_err("write reset reg %x error %d\n", reg, ret); +} + static int codec_io_probe(struct platform_device *pdev) { int i = 0; diff --git a/drivers/amlogic/media/common/arch/registers/register_ops_m8.c b/drivers/amlogic/media/common/arch/registers/register_ops_m8.c index 2aee23bc7df6..a98ba71e7b7d 100644 --- a/drivers/amlogic/media/common/arch/registers/register_ops_m8.c +++ b/drivers/amlogic/media/common/arch/registers/register_ops_m8.c @@ -65,6 +65,7 @@ static struct chip_register_ops m8_ops[] __initdata = { {IO_AIU_BUS, 0, codecio_read_aiubus, codecio_write_aiubus}, {IO_DEMUX_BUS, 0, codecio_read_demuxbus, codecio_write_demuxbus}, {IO_RESET_BUS, 0, codecio_read_resetbus, codecio_write_resetbus}, + {IO_EFUSE_BUS, 0, codecio_read_efusebus, codecio_write_efusebus}, }; static struct chip_register_ops ex_gx_ops[] __initdata = { diff --git a/include/linux/amlogic/media/registers/register.h b/include/linux/amlogic/media/registers/register.h index efd14b09b160..ef2df5800105 100644 --- a/include/linux/amlogic/media/registers/register.h +++ b/include/linux/amlogic/media/registers/register.h @@ -39,5 +39,6 @@ #include "regs/demux_regs.h" #include "regs/ao_regs.h" #include "regs/dmc_regs.h" +#include "regs/efuse_regs.h" #endif diff --git a/include/linux/amlogic/media/registers/register_map.h b/include/linux/amlogic/media/registers/register_map.h index d638feca95f7..2b7c084923c6 100644 --- a/include/linux/amlogic/media/registers/register_map.h +++ b/include/linux/amlogic/media/registers/register_map.h @@ -37,4 +37,6 @@ int codecio_read_demuxbus(unsigned int reg); void codecio_write_demuxbus(unsigned int reg, unsigned int val); int codecio_read_resetbus(unsigned int reg); void codecio_write_resetbus(unsigned int reg, unsigned int val); +int codecio_read_efusebus(unsigned int reg); +void codecio_write_efusebus(unsigned int reg, unsigned int val); #endif diff --git a/include/linux/amlogic/media/registers/register_ops.h b/include/linux/amlogic/media/registers/register_ops.h index 23d28a4a6bc2..4d5d058a28f3 100644 --- a/include/linux/amlogic/media/registers/register_ops.h +++ b/include/linux/amlogic/media/registers/register_ops.h @@ -43,6 +43,7 @@ enum IO_VPP_BUS, IO_DMC_BUS, IO_RESET_BUS, + IO_EFUSE_BUS, BUS_MAX }; @@ -67,6 +68,7 @@ int register_reg_ops_mgr(int cputype[], struct chip_register_ops *sops_list, int ops_size); int register_reg_ex_ops_mgr(int cputype[], struct chip_register_ops *ex_ops_list, int ops_size); + #define DEF_BUS_OPS(BUS_TYPE, name)\ static inline void codec_##name##bus_write(unsigned int reg, u32 val)\ {\ @@ -113,5 +115,6 @@ DEF_BUS_OPS(IO_PARSER_BUS, pars); DEF_BUS_OPS(IO_AIU_BUS, aiu); DEF_BUS_OPS(IO_DEMUX_BUS, demux); DEF_BUS_OPS(IO_RESET_BUS, reset); +DEF_BUS_OPS(IO_EFUSE_BUS, efuse); #endif diff --git a/include/linux/amlogic/media/registers/regs/efuse_regs.h b/include/linux/amlogic/media/registers/regs/efuse_regs.h new file mode 100644 index 000000000000..0f16c8b005e7 --- /dev/null +++ b/include/linux/amlogic/media/registers/regs/efuse_regs.h @@ -0,0 +1,37 @@ +/* + * include/linux/amlogic/media/registers/regs/efuse_regs.h + * + * Copyright (C) 2017 Amlogic, Inc. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + */ + +#ifndef EFUSE_REGS_HEADER_ +#define EFUSE_REGS_HEADER_ + +#define EFUSE_CLR (0x0) +#define EFUSE_START (0x1) +#define EFUSE_WDATA0 (0x4) +#define EFUSE_WDATA1 (0x5) +#define EFUSE_WDATA2 (0x6) +#define EFUSE_WDATA3 (0x7) +#define EFUSE_RDATA0 (0x8) +#define EFUSE_RDATA1 (0x9) +#define EFUSE_RDATA2 (0xa) +#define EFUSE_RDATA3 (0xb) +#define EFUSE_LIC0 (0xc) +#define EFUSE_LIC1 (0xd) +#define EFUSE_LIC2 (0xe) +#define EFUSE_LIC3 (0xf) + +#endif + diff --git a/include/linux/amlogic/media/registers/regs/hevc_regs.h b/include/linux/amlogic/media/registers/regs/hevc_regs.h index 6b6eb989419e..3258b90f752f 100644 --- a/include/linux/amlogic/media/registers/regs/hevc_regs.h +++ b/include/linux/amlogic/media/registers/regs/hevc_regs.h @@ -304,8 +304,8 @@ #define HEVC_DBLK_CFG9 0x3509 #define HEVC_DBLK_CFGA 0x350a #define HEVC_DBLK_CFGE 0x350e -#define HEVC_DBLK_STS0 0x350b -#define HEVC_DBLK_STS1 0x350c +#define HEVC_DBLK_STS0 0x350b /* changes the val to 0x350f on g12a */ +#define HEVC_DBLK_STS1 0x350c /* changes the val to 0x3510 on g12a */ #define HEVC_SAO_VERSION 0x3600 #define HEVC_SAO_CTRL0 0x3601 #define HEVC_SAO_CTRL1 0x3602 diff --git a/include/linux/amlogic/media/utils/vdec_reg.h b/include/linux/amlogic/media/utils/vdec_reg.h index 37fc657f6280..68080534a85d 100644 --- a/include/linux/amlogic/media/utils/vdec_reg.h +++ b/include/linux/amlogic/media/utils/vdec_reg.h @@ -175,6 +175,17 @@ #define SET_RESET_REG_MASK(r, mask)\ WRITE_RESET_REG(r, READ_RESET_REG(r) | (mask)) +#define WRITE_EFUSE_REG(r, val) codec_efusebus_write(r, val) +#define READ_EFUSE_REG(r) codec_efusebus_read(r) +#define WRITE_EFUSE_REG_BITS(r, val, start, len) \ + WRITE_EFUSE_REG(r, (READ_EFUSE_REG(r) & ~(((1L<<(len))-1)<<(start)))|\ + ((unsigned int)((val)&((1L<<(len))-1)) << (start))) + +#define CLEAR_EFUSE_REG_MASK(r, mask)\ + WRITE_EFUSE_REG(r, READ_EFUSE_REG(r) & ~(mask)) +#define SET_EFUSE_REG_MASK(r, mask)\ + WRITE_EFUSE_REG(r, READ_EFUSE_REG(r) | (mask)) + #define ASSIST_MBOX1_CLR_REG VDEC_ASSIST_MBOX1_CLR_REG #define ASSIST_MBOX1_MASK VDEC_ASSIST_MBOX1_MASK #define ASSIST_AMR1_INT0 VDEC_ASSIST_AMR1_INT0