From d4fcb0f9a49c013bfdf8dc4ee3f909450d8a0afb Mon Sep 17 00:00:00 2001 From: Finley Xiao Date: Mon, 13 Feb 2023 14:37:13 +0800 Subject: [PATCH] arm64: dts: rockchip: rk3562: Change dclk vop1 parent to apll Signed-off-by: Finley Xiao Change-Id: I883e0523495431c686d45ff645dc8bfd89788a13 --- arch/arm64/boot/dts/rockchip/rk3562.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3562.dtsi b/arch/arm64/boot/dts/rockchip/rk3562.dtsi index 7043950f032c..3f5f60a5f94b 100644 --- a/arch/arm64/boot/dts/rockchip/rk3562.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3562.dtsi @@ -1601,7 +1601,7 @@ power-domains = <&power RK3562_PD_VO>; rockchip,grf = <&ioc_grf>; assigned-clocks = <&cru DCLK_VOP>, <&cru DCLK_VOP1>; - assigned-clock-parents = <&cru PLL_VPLL>, <&cru PLL_HPLL>; + assigned-clock-parents = <&cru PLL_VPLL>, <&cru PLL_APLL>; status = "disabled"; vop_out: ports {