diff --git a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_clk.c b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_clk.c
index 1366e75becdf..7b4613a7c319 100644
--- a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_clk.c
+++ b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_clk.c
@@ -1044,8 +1044,8 @@ next:
 		p_enc[j].hpll_clk_out = (custom_timing->frac_freq * 10);
 		pr_info("[N2][%s] vic == HDMI_CUSTOMBUILT, frac_freq %d\n",
 				__func__, custom_timing->frac_freq);
-		/* check if hpll clk output is under (100*10)MHz */
-		if (p_enc[j].hpll_clk_out < 1000000) {
+		/* check if hpll clk output is under (140*10)MHz */
+		if (p_enc[j].hpll_clk_out < 1400000) {
 			p_enc[j].hpll_clk_out *= 4;
 			/* control od dividers */
 			p_enc[j].od1 = 4;
@@ -1057,6 +1057,10 @@ next:
 			p_enc[j].od2 = 1;
 			p_enc[j].od3 = 2;
 		}
+
+		pr_info("[N2] hpll_clk_out %d, od1 %d, od2 %d, od3 %d\n",
+			p_enc[j].hpll_clk_out,
+			p_enc[j].od1, p_enc[j].od2, p_enc[j].od3);
 	}
 
 	hdmitx_set_cts_sys_clk(hdev);