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drm/rockchip: use DRM_BUS_FLAG_PIXDATA_NEGEDGE to identify dclk polarity

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Change-Id: Ie5c708d0d52e8909d5dc9257e0b6b76d3d960d82
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
This commit is contained in:
Sandy Huang
2020-07-14 17:59:10 +08:00
committed by Tao Huang
parent 99ce805e13
commit d5272ec9bd
7 changed files with 11 additions and 7 deletions
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1
drivers/gpu/drm/rockchip/analogix_dp-rockchip.c
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@@ -270,6 +270,7 @@ rockchip_dp_drm_encoder_atomic_check(struct drm_encoder *encoder,
s->bus_format = di->bus_formats[0];
else
s->bus_format = MEDIA_BUS_FMT_RGB888_1X24;
s->bus_flags = di->bus_flags;
s->tv_state = &conn_state->tv;
s->eotf = TRADITIONAL_GAMMA_SDR;
s->color_space = V4L2_COLORSPACE_DEFAULT;

1
drivers/gpu/drm/rockchip/dw-mipi-dsi.c
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@@ -1352,6 +1352,7 @@ dw_mipi_dsi_encoder_atomic_check(struct drm_encoder *encoder,
s->bus_format = MEDIA_BUS_FMT_RGB888_1X24;
s->output_type = DRM_MODE_CONNECTOR_DSI;
s->bus_flags = info->bus_flags;
s->tv_state = &conn_state->tv;
s->eotf = TRADITIONAL_GAMMA_SDR;
s->color_space = V4L2_COLORSPACE_DEFAULT;

5
drivers/gpu/drm/rockchip/rockchip_drm_drv.c
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@@ -614,7 +614,10 @@ static int setup_initial_state(struct drm_device *drm_dev,
mode->crtc_hsync_end == set->crtc_hsync_end &&
mode->crtc_vsync_end == set->crtc_vsync_end &&
drm_mode_vrefresh(mode) == set->vrefresh &&
mode->flags == set->flags &&
/* we just need to focus on DRM_MODE_FLAG_ALL flag, so here
* we compare mode->flags with set->flags & DRM_MODE_FLAG_ALL.
*/
mode->flags == (set->flags & DRM_MODE_FLAG_ALL) &&
mode->picture_aspect_ratio == set->picture_aspect_ratio) {
found = 1;
match = 1;

3
drivers/gpu/drm/rockchip/rockchip_drm_drv.h
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@@ -118,7 +118,8 @@ struct rockchip_crtc_state {
int output_mode;
int output_bpc;
int output_flags;
int bus_format;
u32 bus_format;
u32 bus_flags;
int yuv_overlay;
int post_r2y_en;
int post_y2r_en;

6
drivers/gpu/drm/rockchip/rockchip_drm_vop.c
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@@ -2909,7 +2909,7 @@ static void vop_crtc_atomic_enable(struct drm_crtc *crtc,
if (vop->mcu_timing.mcu_pix_total)
vop_mcu_mode(crtc);
dclk_inv = (adjusted_mode->flags & DRM_MODE_FLAG_PPIXDATA) ? 0 : 1;
dclk_inv = (s->bus_flags & DRM_BUS_FLAG_PIXDATA_NEGEDGE) ? 1 : 0;
VOP_CTRL_SET(vop, dclk_pol, dclk_inv);
val = (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC) ?
@@ -4015,13 +4015,9 @@ static int vop_plane_init(struct vop *vop, struct vop_win *win,
unsigned long possible_crtcs)
{
struct rockchip_drm_private *private = vop->drm_dev->dev_private;
struct drm_plane *share = NULL;
uint64_t feature = 0;
int ret;
if (win->parent)
share = &win->parent->base;
ret = drm_universal_plane_init(vop->drm_dev, &win->base, possible_crtcs, &vop_plane_funcs,
win->data_formats, win->nformats, NULL, win->type, NULL);
if (ret) {

1
drivers/gpu/drm/rockchip/rockchip_lvds.c
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@@ -190,6 +190,7 @@ rockchip_lvds_encoder_atomic_check(struct drm_encoder *encoder,
s->output_mode = ROCKCHIP_OUT_MODE_AAAA;
s->output_type = DRM_MODE_CONNECTOR_LVDS;
s->bus_flags = info->bus_flags;
s->tv_state = &conn_state->tv;
s->eotf = TRADITIONAL_GAMMA_SDR;
s->color_space = V4L2_COLORSPACE_DEFAULT;

1
drivers/gpu/drm/rockchip/rockchip_rgb.c
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@@ -206,6 +206,7 @@ rockchip_rgb_encoder_atomic_check(struct drm_encoder *encoder,
}
s->output_type = DRM_MODE_CONNECTOR_DPI;
s->bus_flags = info->bus_flags;
s->tv_state = &conn_state->tv;
s->eotf = TRADITIONAL_GAMMA_SDR;
s->color_space = V4L2_COLORSPACE_DEFAULT;